Abstract: An optoelectronic semiconductor chip includes a carrier and a semiconductor body arranged on the carrier with a semiconductor layer sequence, wherein the semiconductor layer sequence includes an active region arranged between a first semiconductor layer and a second semiconductor layer and generates or receives electromagnetic radiation, the first semiconductor layer connects to a first contact in an electrically-conductive manner, the first contact is formed on a rear side of the carrier facing away from the semiconductor body, the second semiconductor layer connects to both a second contact and a third contact in an electrically-conductive manner, and the second contact is formed on the front side of the carrier facing towards the semiconductor body and the third contact on the rear side of the carrier facing away from the semiconductor body.

Abstract: The invention relates to a semiconductor component comprising at least one semiconductor chip (10) having a semiconductor body (1) with an active region (12), a conversion element (6) and a carrier (3), the carrier (3) comprising a first moulded body (33), a first conductor body (31) and a second conductor body (32), the conductor body (31, 32) being connected to the active region (12) in an electrically conducting manner. A side of the conversion element (6) facing away from the active region (12) forms a front side (101) of the semiconductor chip (10) and a side of the carrier (3) facing away from the active region (12) forms a rear side (102) of the semiconductor chip (10), and lateral surfaces (103) of the semiconductor chip connect the front side (101) and the rear side (102) together.

Abstract: A semiconductor chip includes an electrically insulating layer including a first opening and a second opening, an electrically conductive first connection point, and an electrically conductive second connection point, wherein a carrier mechanically connects to a semiconductor body, the active region electrically connects to a first conductor body and a second conductor body, the electrically insulating layer covers the carrier on a side thereof facing away from the semiconductor body, the first connection point electrically connects to the first conductor body through the first opening, the second connection point electrically connects to the second conductor body through the second opening, the first conductor body is at a first distance from a second conductor body, the first connection point is at a second distance from the second connection point, and the first distance is less than the second distance.

Abstract: Described is an optoelectronic semiconductor chip (1) with a built-in bridging element (9, 9A) for overvoltage protection.

Abstract: The invention relates to an optoelectronic component (100) comprising a semiconductor layer sequence (1) having an active layer (10), wherein the active layer (10) is designed to produce or absorb electromagnetic radiation in intended operation. Furthermore, the component (100) comprises a first contact structure (11) and a second structure (12), by means of which the semiconductor layer sequence (1) can be electrically contacted in intended operation. In operation, a voltage is applied to the contact structures (11, 12), wherein an operation-related voltage difference ?Ubet between the contact structures (11, 12) arises. When the voltage difference is increased, a first arc-over occurs in or on the component (100) between the two contact structures (11, 12). A spark gap (3) between the contact structures (11, 12), which arises in the event of the first arc-over, passes predominantly through a surrounding medium in the form of gas or vacuum and/or through a potting.

Abstract: A method for producing an optoelectronic device is disclosed. The method include preforming an inductive excitation of a current by an inductive component of the optoelectronic device such that the optoelectronic device emits electromagnetic radiation, measuring of at least one electro-optical characteristic of the optoelectronic device and applying a converter material to an emission side of the optoelectronic device, wherein a quantity of the converter material is determined from the measurement of the electro-optical characteristic.

Abstract: An optoelectronic semiconductor component includes an active layer arranged between a p-type semiconductor region and an n-type semiconductor region, a carrier including a plastic and a first via and a second via, a p-contact layer and an n-contact layer arranged between the carrier and a semiconductor body at least in some regions, wherein the p-contact layer electrically joins the first via and the p-type semiconductor region, and the n-contact layer electrically joins the second via and the n-type semiconductor region, a metallic reinforcing layer arranged at least in some regions between the n-contact layer and the carrier, wherein the metallic reinforcing layer is at least 5 ?m thick, and at least one p-contact feed-through arranged between the first via and the p-contact layer, wherein the p-contact feed-through is at least 5 ?m thick and surrounded in a lateral direction by the reinforcing layer at least in some regions.

Abstract: A method for producing an optoelectronic component is disclosed. In an embodiment the method includes a metallization with first mask structures is deposited directionally, and then a first passivation material is deposited non-directionally onto the metallization. Further, cutouts are introduced into the semiconductor body, such that the cutouts extend right into an n-type semiconductor region, and a second passivation material is applied on side faces of the cutouts. Furthermore, an n-type contact material is applied, structured and passivated. Moreover, contact structures are arranged on the semiconductor body and electrically connected to the n-type contact material and the metallization, wherein the contact structures and the semiconductor body are covered with a potting.

Abstract: The invention relates to a semiconductor component comprising: a semiconductor chip (10) which has a semiconductor body (1) with an active region (12) and a substrate (3) with a first conductor body (31), a second conductor body (32) and a first moulded body (33); and a second moulded body (5); wherein the second moulded body (5) completely surrounds the semiconductor chip (10) in lateral directions (L), the semiconductor chip (10) extends all the way through the second moulded body (5) in a vertical direction (V), at least some parts of an upper side and a lower side of the semiconductor chip (10) are not covered by the second moulded body (5), the substrate (3) is mechanically connected to the semiconductor body (2), the active region (12) is connected to the first conductor body (31) and the second conductor body (32) in an electroconductive manner, and the second moulded body (5) is directly adjacent to the substrate (3) and the semiconductor body (1).

Abstract: The invention relates to a method for producing a nitride semiconductor component (10), comprising the following steps: epitaxially growing a nitride semiconductor layer sequence (2) on a growth substrate (1), wherein recesses (7) are formed on a boundary surface (5A) of a semiconductor layer (5) of the semiconductor layer sequence (2), growing a p-doped contact layer (8) over the semiconductor layer (5), wherein the p-doped contact layer (8) at least partially fills the recesses, and wherein the p-doped contact layer (8) has a lower dopant concentration in first regions (81) arranged at least partially in the recesses (7) than in second regions (82) arranged outside of the recesses (7), and applying a connection layer (9), which has a metal, a metal alloy, or a transparent conductive oxide, to the p-doped contact layer (8). The invention further relates to a nitride semiconductor component (10) that can be produced by means of the method.

Abstract: A component having a metal carrier and a method for producing a component are disclosed. In an embodiment the component includes a carrier having a metallic carrier layer, an insulating layer and a first through-contact extending in a vertical direction throughout the carrier layer, wherein the through-contact is electrically isolated from the carrier layer via the insulating layer. The component further includes a semiconductor body and a wiring structure arranged in the vertical direction between the carrier and the semiconductor body at least places and electrically contacting the semiconductor body, wherein the wiring structure has a first connection area and a second connection area, wherein the connection areas adjoin the carrier and are assigned to different electrical polarities of the component, wherein the first through-contact is in electrical contact with one of the connection areas, and wherein the component is configured to be externally electrically connectable via the carrier.

Abstract: A component includes a carrier having a front side facing towards a semiconductor body and a rear side facing away from the semiconductor body, each of which is formed at least in places by a surface of a shaped body, a metal layer contains a first sub-region and a second sub-region, wherein the first sub-region and the second sub-region adjoin the shaped body in a lateral direction, are electrically connectable in a vertical direction on the front side of the carrier, are assigned to different electrical polarities of the component and are thus configured to electrically contact the semiconductor body, and the carrier has a side face running perpendicularly or obliquely to the rear side of the carrier and is configured as a mounting surface of the component, wherein at least one of the sub-regions is electrically connectable via the side face and exhibits singulation traces.

Abstract: An optoelectronic arrangement is specified, comprising a moulded body (2) having a base surface (2b), a first pixel group (41) with a multiplicity of pixels (1) assigned thereto, each having a first semiconductor region (11), a second semiconductor region (12) and an active region (10), a multiplicity of separating structures (3) arranged between the pixels (1), and at least one first contact structure (51, 52, 53) having a first contact plane (51) and a first contact location (52), which is freely accessible at the base surface (2b), wherein the pixels (1) of the first pixel group (41) are arranged alongside one another at the top surface (2a), the first semiconductor regions (11) and/or the second semiconductor regions (12) of adjacent pixels (1) of the first pixel group (41) are electrically insulated from one another by means of the separating structures (3), a first contact structure (51, 52, 53) is assigned one-to-one to the first pixel group (41), and the first semiconductor regions (11) of the pixels

Abstract: A component includes a carrier with a mold body made of an electrically insulating plastic material and a metal layer, wherein the metal layer includes a first subregion and a second subregion, and at least one of the subregions extends in a vertical direction through a mold body to electrically contact a semiconductor body, and the first and second segments are spatially separated from one another in a lateral direction and electrically conductively connect to one another via a connecting structure, wherein the connecting structure, the first subregion and the second subregion adjoin the mold body and are arranged on the same side of the semiconductor body.

Abstract: A video wall module and a method for producing a video wall module are disclosed. In embodiments, the video wall module includes a plurality of light emitting diode chips, each light emitting diode chip comprising a top electrode arranged at a top side of the light emitting diode chip, a bottom electrode arranged at a bottom side of the light emitting diode chip and a molded body embedding the light emitting diode chips, a front-side metallization arranged at the front side of the molded body, wherein the top electrodes are connected to the front-side metallization, a rear-side metallization arranged at a rear side of the molded body, wherein the bottom electrodes are connected to the rear-side metallization, a dielectric layer arranged at the rear side of the molded body and an outer metallization arranged at the dielectric layer, wherein the rear-side metallization is electrically conductively connected to the outer metallization.

Abstract: A method for producing optoelectronic conversion semiconductor chips and a composite of conversion semiconductor chips are disclosed. In an embodiment the method includes growing a semiconductor layer sequence on a growth substrate, applying an electric contact on to a rear side of the semiconductor layer sequence facing away from the growth substrate, thinning the growth substrate, after thinning, cutting the growth substrate at least to the semiconductor layer sequence thereby forming a first intermediate space, applying a conversion layer on to the thinned growth substrate and singulating at least the thinned growth substrate and the semiconductor layer sequence.

Abstract: An optoelectronic semiconductor component is disclosed, comprising: a semiconductor body (1) having a semiconductor layer sequence (2) with a p-type semiconductor region (3), an n-type semiconductor region (5), and an active layer (4) arranged between the p-type semiconductor region (3) and the n-type semiconductor region (5); a support (10) having a plastic material and a first via (11) and a second via (12); a p-contact layer (7) and an n-contact layer (8), at least some regions of which are arranged between the support (10) and the semiconductor body (1), wherein the p-contact layer (7) connects the first via (11) to the p-type semiconductor region (3) and the n-contact layer (8, 8A) connects the second via (12) to the n-type semiconductor region (5); and an ESD protection element (15) which is arranged between the support (10) and the semiconductor body (1), wherein the ESD protection element (15) is electrically conductively connected to the first via (11) and to the second via (12), and wherein a forwar

Abstract: An optoelectronic lamp device includes an optoelectronic semiconductor component including a top side including a light-emitting face, and a housing embedding the semiconductor component and leaving free the light-emitting face, wherein a housing face is coated with a light-scattering dielectric resist layer that may scatter light incident on a face of the resist layer facing away from the housing face.

Abstract: An optoelectronic component includes a boundary layer is arranged between a semiconductor body and a metallic layer in a lateral direction, adjoins the semiconductor body at least in places, covers an active layer laterally, and has a lower refractive index compared to the semiconductor body, a metallic layer is configured to prevent the electromagnetic radiation generated during operation of the component and passes through the boundary layer from impinging on a mold body, the boundary layer is formed from a radiation-transmitting dielectric material having a refractive index of 1 to 2, and a layer thickness of the boundary layer is at least 400 nm and selected such that an amplitude of an evanescent wave, which is obtained in the event of total internal reflection at an interface between the boundary layer and the semiconductor body, is reduced to less than 37% of its original value within the boundary layer.

Abstract: An optoelectronic semiconductor chip includes a carrier and a semiconductor body arranged on the carrier with a semiconductor layer sequence, wherein the semiconductor layer sequence includes an active region arranged between a first semiconductor layer and a second semiconductor layer and generates or receives electromagnetic radiation, the first semiconductor layer connects to a first contact in an electrically-conductive manner, the first contact is formed on a rear side of the carrier facing away from the semiconductor body, the second semiconductor layer connects to both a second contact and a third contact in an electrically-conductive manner, and the second contact is formed on the front side of the carrier facing towards the semiconductor body and the third contact on the rear side of the carrier facing away from the semiconductor body.