Abstract: A method of observing reaction intermediaries during a chemical reaction and comprising detecting an electrical signal output from an ion sensitive field effect transistor exposed to said reaction, and monitoring the detected electrical signal to discriminate discrete fluctuations in the electrical signal, the discrete fluctuations indicating reaction intermediaries occurring during a chemical reaction.

Abstract: According to a first aspect of the present invention there is provided a digital signal processing circuit, one or more switches of the circuit being provided by an ion sensitive field effect transistor.

Abstract: A sensing apparatus comprising an ion sensitive field effect transistor arranged to generate an electrical output signal in response to localised fluctuations of ionic charge at or adjacent the surface of the transistor, and means for detecting the electrical output signal from the ion sensitive field effect transistor, the localised fluctuations of ionic charge indicating events occurring during a chemical reaction.

Abstract: A retinal prosthetic device comprises image capture means (20) arranged to capture an image, light producing means (30) arranged to define a plurality of light paths along each of which a light beam can be directed towards a respective position on a retina, and control means (24) arranged to process the captured image and control the light producing means so as to produce a stimulating array of light beams along a group of the light paths, the group being dependent upon the captured image.

Abstract: A sensing apparatus comprising an ion sensitive field effect transistor arranged to generate an electrical output signal in response to localized fluctuations of ionic charge at or adjacent the surface of the transistor, and means for detecting the electrical output signal from the ion sensitive field effect transistor, the localized fluctuations of ionic charge indicating events occurring during a chemical reaction.

Abstract: A signal processing circuit includes an ion sensitive field effect transistor, a reference electrode for the ion sensitive field effect transistor, a metal oxide semiconductor transistor having its gate coupled to the reference electrode, and a biasing circuit. The biasing circuit is configured to bias the ion sensitive field effect transistor and the metal oxide semiconductor field effect transistor to operate in a weak inversion region and to provide an output current signal.

Abstract: A method and apparatus for measuring activity in the peripheral nervous system comprises a nerve cuff having an array of chemical detectors such as chemFETS or ISFETS. Activity within the nerve causes chemical responses which can be detected. The use of chemical rather than electrical detection minimises interference problems and allows the cuffs to be made smaller.

Abstract: A digital circuit comprises: a first arm including a first metal oxide semiconductor field effect transistor (M3) configured to act as a load device; a second arm including a second metal oxide semiconductor field effect transistor (M4) configured to act as a load device; and a switch (M1, M2) for selecting one of the first and second arms. Each of the first and second transistors (M3, M4) has a channel length of 100 nm or below and is biased to operate in the weak inversion regime. In an alternative circuit, each load device (M3, M4) has its bulk connected to its drain and is biased to operate in the weak inversion regime.

Abstract: A signal processing circuit comprising one or more ion sensitive field effect transistors, ISFETs, and a biasing circuit for biasing the or each ion sensitive field effect transistor to operate in the weak inversion region.

Abstract: Use of a pH sensor comprising an ion-sensitive field effect transistor (ISFET) to perform real time detection/quantification of nucleic acid amplification, e.g. polymerase chain reaction (PCR) nucleic acid amplification, based on detection of protons released during the primer extension phase.

Abstract: An ultra-wideband wireless information transmission method comprising transmitting electromagnetic data pulses and reference pulses over the transmission medium, information being encoded as a time shift between the data pulses and the reference pulses, at least two of the data pulses sharing a common reference pulse, and receiving the data and reference pulses and using the associated timing information to recover said information.

Abstract: A reference circuit comprising first and second field effect transistors connected to form a first current mirror, and third and fourth field effect transistors connected to form a second current mirror, wherein a property of the first transistor is mismatched relative to the second transistor such that the threshold voltage of the first transistor is significantly higher than the threshold voltage of the second transistor, and the drain current versus gate-source voltage responses of the first and second transistors have substantially different gradients for current levels at which the reference circuit is operated.

Abstract: A reference circuit comprising first and second field effect transistors connected to form a first current mirror, and a third and fourth field effect transistors connected to form a second current mirror, wherein a property of the first transistor is mismatched relative to the second transistor such that the threshold voltage of the first transistor is significantly higher than the threshold voltage of the second transistor, and the drain current versus gate-source voltage responses of the first and second transistors have substantially different gradients for current levels at which the reference current is operated.

Abstract: A circuit comprising a digital processor, analogue processing means, a digital to analogue converter for converting digital values output from the digital processor into analogue values which are processed by the analogue processing means, and an analogue to digital converter for converting resulting analogue values into digital values for input to the digital processor, wherein the analogue processing means comprises one or more analogue processors, and the circuit is dynamically reconfigurable under the control of the digital processor, such that analogue values are processed according to a first function by the analogue processing means, and following reconfiguration, analogue values are processed according to a second function by the analogue processing means.

Abstract: A circuit comprising a digital processor, analogue processing means, a digital to analogue converter for converting digital values output from the digital processor into analogue values which are processed by the analogue processing means, and an analogue to digital converter for converting resulting analogue values into digital values for input to the digital processor, wherein the analogue processing means comprises one or more analogue processors, and the circuit is dynamically reconfigurable under the control of the digital processor, such that analogue values are processed according to a first function by the analogue processing means, and following reconfiguration, analogue values are processed according to a second function by the analogue processing means.

Abstract: A sensing apparatus comprising an ion sensitive field effect transistor arranged to generate an electrical output signal in response to localised fluctuations of ionic charge at or adjacent the surface of the transistor, and means for detecting the electrical output signal from the ion sensitive field effect transistor, the localised fluctuations of ionic charge indicating events occurring during a chemical reaction.

Abstract: A circuit implemented in a MOS device for operation with an internally non-linear topology, the circuit including at least first and second voltage ports, at least one voltage comparator for comparing the voltage at at least one of the voltage ports with a reference voltage, at least one of a current source or current sink for selectively sourcing current to or sinking current from the at least one of the voltage ports to maintain the voltage thereat in a voltage frame, thereby providing the circuit with a single stable dc operating point.

Abstract: A signal processing circuit which provides an accurate, continuously tunable impedance includes a tunable continuous time transconductor G(s) which may, for example, be an opto-electronic inductor. This has a discrete time current processor-H(z) connected between its input and output so as to provide current feedback. The discrete time current processor may be based on a switched current memory which can be adapted to provide scaler, differentiator or integrator configurations.

Abstract: A transconductance device particularly suitable for use as a high frequency active filter has an input stage including at least one field effect transistor (M.sub.1) arranged to drive a laser diode (LD.sub.1) and an output stage including at least one photodiode (PD.sub.1) optically coupled to the laser diode. The output stage is preferably provided with a high impedance bias current supply circuit. In an alternative arrangement particularly useful as an operational amplifier, a differential input stage includes a pair of laser diodes (LD.sub.1 and LD.sub.2) optically coupled to respective photodiodes (PD.sub.1 and PD.sub.2) connected in series, the output being taken from the junction of the two photodiodes.

Abstract: An amplifier stage suitable for current conveyors and current mode feedback operational amplifiers has low input resistance and operates at low power. The amplifier stage comprises a buffer having inverting and non-inverting inputs and a pair of current outputs, and a pair of multiple output current mirrors which operate in conjunction with the buffer to generate an output current at a high gain node in response to an input signal applied to the buffer inputs. Each multiple output current mirror has a low impedance current input for receiving current signals generated by the buffer and multiple high impedance current outputs for providing current feedback to the inverting input of the buffer and output current to the high gain node of the amplifier stage. The magnitudes of the feedback and output currents are determined by the resistances of current scaling resistors associated with the low impedance current input and each of the high impedance current outputs.