Patents by Inventor Christophe Marcadal

Christophe Marcadal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070144436
    Abstract: A gas coupler is capable of conducting gas between a gas component, gas source and substrate processing chamber. The gas coupler comprises a metal block comprising a gas component seating surface having a plurality of gas component coupling ports. The block also has a plurality of sidewalls at right angles to the gas component seating surface, each sidewall comprising a counterbored gas orifice. A plurality of right-angled internal passageways are each connected to a gas component coupling port. Each internal passageway terminates at counterbored gas orifice on a different sidewall surface so that each gas component coupling port is fluidly connected to a different sidewall.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 28, 2007
    Inventors: Joel Huston, Jeffery Tobin, Christophe Marcadal
  • Publication number: 20070128862
    Abstract: Embodiments of the invention provide an apparatus configured to form a material during an atomic layer deposition (ALD) process, such as a plasma-enhanced ALD (PE-ALD) process. In one embodiment, a showerhead assembly comprises a showerhead and a plasma baffle that are used to disperse process gases within a plasma-enhanced vapor deposition chamber. The showerhead plate comprises an inner area configured to position the plasma baffle therein and an outer area which has a plurality of holes for emitting a process gas. The plasma baffle comprises a conical nose disposed on an upper surface to receive another process gas, a lower surface to emit the process gas and a plurality of openings configured to flow the process gas from above the upper surface into a process region. The openings are preferably slots that are positioned at predetermined angle for emitting the process gas with a circular flow pattern.
    Type: Application
    Filed: November 6, 2006
    Publication date: June 7, 2007
    Inventors: Paul Ma, Kavita Shah, Dien-Yeh Wu, Seshadri Ganguli, Christophe Marcadal, Frederick Wu, Schubert Chu
  • Publication number: 20070128863
    Abstract: Embodiments of the invention provide an apparatus configured to form a material during an atomic layer deposition (ALD) process, such as a plasma-enhanced ALD (PE-ALD) process. In one embodiment, a lid assembly for conducting a vapor deposition process within a process chamber is provided which includes an insulation cap and a plasma screen. In one example, the insulation cap has a centralized channel configured to flow a first process gas from an upper surface to an expanded channel and an outer channel configured to flow a second process gas from an upper surface to a groove which is encircling the expanded channel. In one example, the plasma screen has an upper surface containing an inner area with a plurality of holes and an outer area with a plurality of slots. The insulation cap may be positioned on top of the plasma screen to form a centralized gas region with the expanded channel and a circular gas region with the groove.
    Type: Application
    Filed: November 6, 2006
    Publication date: June 7, 2007
    Inventors: Paul Ma, Kavita Shah, Dien-Yeh Wu, Seshadri Ganguli, Christophe Marcadal, Frederick Wu, Schubert Chu
  • Publication number: 20070128864
    Abstract: Embodiments of the invention provide a method for forming a material on a substrate during an atomic layer deposition (ALD) process, such as a plasma-enhanced ALD (PE-ALD) process. In one embodiment, a method is provided which includes flowing at least one process gas through at least one conduit to form a circular gas flow pattern, exposing a substrate to the circular gas flow pattern, sequentially pulsing at least one chemical precursor into the process gas and igniting a plasma from the process gas to deposit a material on the substrate. In one example, the circular gas flow pattern has circular geometry of a vortex, a helix, a spiral, or a derivative thereof. Materials that may be deposited by the method include ruthenium, tantalum, tantalum nitride, tungsten or tungsten nitride. Other embodiments of the invention provide an apparatus configured to form the material during the PE-ALD process.
    Type: Application
    Filed: November 6, 2006
    Publication date: June 7, 2007
    Inventors: PAUL MA, KAVITA SHAH, DIEN-YEH WU, SESHADRI GANGULI, CHRISTOPHE MARCADAL, FREDERICK WU, SCHUBERT CHU
  • Publication number: 20070119371
    Abstract: Embodiments of the invention provide an apparatus configured to form a material during an atomic layer deposition (ALD) process, such as a plasma-enhanced ALD (PE-ALD) process. In one embodiment, a lid assembly is configured to expose a substrate to a sequence of gases and plasmas during a PE-ALD process. The lid assembly comprises components that are capable of being electrically insulated, electrically grounded or RF energized. In one example, the lid assembly comprises a grounded gas manifold assembly positioned above electrically insulated components, such as an insulation cap, a plasma screen insert and an isolation ring. A showerhead, a plasma baffle and a water box are positioned between the insulated components and become RF hot when activated by a plasma generator. Other embodiments of the invention provide deposition processes to form layers of materials within the process chamber.
    Type: Application
    Filed: November 6, 2006
    Publication date: May 31, 2007
    Inventors: PAUL MA, Kavita Shah, Dien-Yeh Wu, Seshadri Ganguli, Christophe Marcadal, Frederick Wu, Schubert Chu
  • Publication number: 20070119370
    Abstract: Embodiments of the invention provide an apparatus configured to form a material during an atomic layer deposition (ALD) process, such as a plasma-enhanced ALD (PE-ALD) process. In one embodiment, a process chamber is configured to expose a substrate to a sequence of gases and plasmas during a PE-ALD process. The process chamber comprises components that are capable of being electrically insulated, electrically grounded or RF energized. In one example, a chamber body and a gas manifold assembly are grounded and separated by electrically insulated components, such as an insulation cap, a plasma screen insert and an isolation ring. A showerhead, a plasma baffle and a water box are positioned between the insulated components and become RF hot when activated by a plasma generator. Other embodiments of the invention provide deposition processes to form layers of materials within the process chamber.
    Type: Application
    Filed: November 6, 2006
    Publication date: May 31, 2007
    Inventors: PAUL MA, Kavita Shah, Dien-Yeh Wu, Seshadri Ganguli, Christophe Marcadal, Frederick Wu, Schubert Chu
  • Publication number: 20070077750
    Abstract: Embodiments of the invention provide a method for depositing ruthenium materials on a substrate by various vapor deposition processes, such as atomic layer deposition (ALD) and plasma-enhanced ALD (PE-ALD). In one aspect, the process has little or no initiation delay and maintains a fast deposition rate while forming a ruthenium material. The ruthenium material may be deposited with good step coverage, strong adhesion, and contains a low carbon concentration for high electrical conductivity. The method for depositing the ruthenium material on a substrate generally includes sequentially exposing the substrate to a pyrrolyl ruthenium precursor and a reagent during the ALD process. The pyrrolyl ruthenium precursor contains ruthenium and at least one pyrrolyl ligand. In some examples, the reagent may contain a plasma of ammonia, nitrogen, or hydrogen during a PE-ALD process. In other examples, a reducing gas may be used during a thermal ALD process.
    Type: Application
    Filed: September 6, 2006
    Publication date: April 5, 2007
    Inventors: Paul Ma, Kavita Shah, Dien-Yeh Wu, Seshadri Ganguli, Christophe Marcadal, Frederick Wu, Schubert Chu
  • Publication number: 20070067609
    Abstract: Embodiments of the present invention are directed to an apparatus for generating a precursor for a semiconductor processing system (320). The apparatus includes a canister (300) having a sidewall (402), a top portion and a bottom portion. The canister (300) defines an interior volume (438) having an upper region (418) and a lower region (434). In one embodiment, the apparatus further includes a heater (430) partially surrounding the canister (300). The heater (430) creates a temperature gradient between the upper region (418) and the lower region (434). Also claimed is a method of forming a barrier layer from purified pentakis(dimethylamido)tantalum, for example a tantalum nitride barrier layer by atomic layer deposition.
    Type: Application
    Filed: May 27, 2004
    Publication date: March 22, 2007
    Inventors: Ling Chen, Vincent Ku, Hua Chung, Christophe Marcadal, Seshadri Ganguli, Jenny Lin, Dien-Yeh Wu, Alan Ouye, Mei Chang
  • Publication number: 20070054487
    Abstract: Embodiments of the invention provide a method for depositing ruthenium materials on a substrate by various vapor deposition processes, such as atomic layer deposition (ALD) and plasma-enhanced ALD (PE-ALD). In one aspect, the process has little or no initiation delay and maintains a fast deposition rate while forming a ruthenium material. The ruthenium material may be deposited with good step coverage, strong adhesion, and contains a low carbon concentration for high electrical conductivity. The method for depositing the ruthenium material on a substrate generally includes sequentially exposing the substrate to a pyrrolyl ruthenium precursor and a reagent during the ALD process. The pyrrolyl ruthenium precursor contains ruthenium and at least one pyrrolyl ligand. In some examples, the reagent may contain a plasma of ammonia, nitrogen, or hydrogen during a PE-ALD process. In other examples, a reducing gas may be used during a thermal ALD process.
    Type: Application
    Filed: September 6, 2006
    Publication date: March 8, 2007
    Inventors: PAUL MA, KAVITA SHAH, DIEN-YEH WU, SESHADRI GANGULI, CHRISTOPHE MARCADAL, FREDERICK WU, SCHUBERT CHU
  • Publication number: 20060257295
    Abstract: Embodiments of an apparatus for generating a chemical precursor used in a vapor deposition processing system are provide which include a canister having a sidewall, a top, and a bottom forming an interior volume which is in fluid communication with an inlet port and an outlet port. The canister contains a plurality of baffles that extend from the bottom to an upper portion of the interior volume and form an extended mean flow path between the inlet port and the outlet port. In one embodiment, the baffles are contained on a prefabricated insert positioned on the bottom of the canister. In one example, an inlet tube may extend from the inlet port into the interior region and be positioned substantially parallel to the baffles. An outlet end of the inlet tube may be adapted to direct a gas flow away from the outlet port, such as towards the sidewall or top of the canister.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 16, 2006
    Inventors: Ling Chen, Vincent Ku, Hua Chung, Christophe Marcadal, Seshadri Ganguli, Jenny Lin, Dien-Yeh Wu, Alan Ouye, Mei Chang
  • Publication number: 20060199372
    Abstract: A method and apparatus for forming layers on a substrate comprising depositing a metal seed layer on a substrate surface having apertures, depositing a transition metal layer over the copper seed layer, and depositing a bulk metal layer over the transition metal layer. Also a method and apparatus for forming a via through a dielectric to reveal metal at the base of the via, depositing a transition metal layer, and depositing a first metal layer on the transition metal layer. Additionally, a method and apparatus for depositing a transition metal layer on an exposed metal surface, and depositing a layer thereover selected from the group consisting of a capping layer and a low dielectric constant layer.
    Type: Application
    Filed: March 1, 2005
    Publication date: September 7, 2006
    Inventors: Hua Chung, Seshadri Ganguli, Christophe Marcadal, Jick Yu
  • Patent number: 7026238
    Abstract: Embodiments of the present invention provide a process sequence and related hardware for filling a patterned feature on a substrate with a metal, such as copper. The sequence comprises first forming a reliable barrier layer in the patterned feature to prevent diffusion of the metal into the dielectric layer through which the patterned feature is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the barrier layer at the bottom of the patterned feature, depositing a second barrier layer, and then filling the patterned feature with a metal, such as copper.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: April 11, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Ming Xi, Paul Frederick Smith, Ling Chen, Michael X. Yang, Mei Chang, Fusen Chen, Christophe Marcadal, Jenny C. Lin
  • Publication number: 20060019495
    Abstract: In one example of the invention, a method for depositing a tantalum-containing material on a substrate in a process chamber is provided which includes exposing the substrate to a tantalum precursor that contains TAIMATA and to at least one secondary precursor to deposit a tantalum-containing film during an atomic layer deposition (ALD) process. The ALD process is repeated until the tantalum-containing film is deposited with a predetermined thickness. Usually, the TAIMATA is preheated prior pulsing the tantalum precursor into the process chamber. A metal layer, such as tungsten or copper, may be deposited on the tantalum-containing material. The tantalum-containing material may include tantalum, tantalum nitride, tantalum silicon nitride, tantalum boron nitride, tantalum phosphorous nitride or tantalum oxynitride. The tantalum-containing material may be deposited as a barrier or adhesion layer within a via or as a gate electrode material within a source/drain device.
    Type: Application
    Filed: February 19, 2005
    Publication date: January 26, 2006
    Inventors: Christophe Marcadal, Rongjun Wang, Hua Chung, Nirmalya Maity
  • Publication number: 20050255690
    Abstract: A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.
    Type: Application
    Filed: July 19, 2005
    Publication date: November 17, 2005
    Inventors: Ling Chen, Seshadri Ganguli, Wei Cao, Christophe Marcadal
  • Patent number: 6958296
    Abstract: The present invention provides a method of forming a titanium silicon nitride barrier layer on a semiconductor wafer, comprising the steps of depositing a titanium nitride layer on the semiconductor wafer; plasma-treating the titanium nitride layer in a N2/H2 plasma; and exposing the plasma-treated titanium nitride layer to a silane ambient, wherein silicon is incorporated into the titanium nitride layer as silicon nitride thereby forming a titanium silicon nitride barrier layer. Additionally, there is provided a method of improving the barrier performance of a titanium nitride layer comprising the step of introducing silicon into the titanium nitride layer such that the silicon is incorporated into the titanium nitride layer as silicon nitride. Also provided is a method of integrating copper into a semiconductor device and a method of improving copper wettability at a copper/titanium nitride interface in a semiconductor device.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: October 25, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Ling Chen, Christophe Marcadal, Hyungsuk Alexander Yoon
  • Patent number: 6953742
    Abstract: A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.
    Type: Grant
    Filed: October 25, 2003
    Date of Patent: October 11, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Ling Chen, Seshadri Ganguli, Wei Cao, Christophe Marcadal
  • Publication number: 20050189072
    Abstract: A precursor and method for filling a feature in a substrate. The method generally includes depositing a barrier layer, the barrier layer being formed from pentakis(dimethylamido)tantalum having less than about 5 ppm of impurities. The method additionally may include depositing a seed layer over the barrier layer and depositing a conductive layer over the seed layer. The precursor generally includes pentakis(dimethylamido)tantalum having less than about 5 ppm of impurities. The precursor is generated in a canister coupled to a heating element configured to reduce formation of impurities.
    Type: Application
    Filed: May 2, 2005
    Publication date: September 1, 2005
    Inventors: Ling Chen, Vincent Ku, Hua Chung, Christophe Marcadal, Seshadri Ganguli, Jenny Lin, Dien-Yeh Wu, Alan Ouye, Mei Chang
  • Patent number: 6905541
    Abstract: A precursor and method for filling a feature in a substrate. The method generally includes depositing a barrier layer, the barrier layer being formed from pentakis(dimethylamido)tantalum having less than about 5 ppm of chlorine. The method additionally may include depositing a seed layer over the barrier layer and depositing a conductive layer over the seed layer. The precursor generally includes pentakis(dimethylamido)tantalum having less than about 5 ppm of chlorine. The precursor is generated in a canister having a surrounding heating element configured to reduce formation of impurities.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: June 14, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Ling Chen, Vincent W. Ku, Hua Chung, Christophe Marcadal, Seshadri Ganguli, Jenny Lin, Dien-Yeh Wu, Alan Ouye, Mei Chang
  • Publication number: 20050074968
    Abstract: A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.
    Type: Application
    Filed: October 25, 2003
    Publication date: April 7, 2005
    Inventors: Ling Chen, Seshadri Ganguli, Wei Cao, Christophe Marcadal
  • Publication number: 20040256351
    Abstract: A method for processing substrates is provided. The method includes depositing and etching a low k dielectric layer on a substrate, pre-cleaning the substrate with a plasma, and depositing a barrier layer on the substrate. Pre-cleaning the substrate minimizes the diffusion of the barrier layer into the low k dielectric layer and/or enhances the deposition of the barrier layer.
    Type: Application
    Filed: December 19, 2003
    Publication date: December 23, 2004
    Inventors: Hua Chung, Nikolaos Bekiaris, Christophe Marcadal, Ling Chen