Abstract: Embodiments of the present invention provide a process sequence and related hardware for filling a patterned feature on a substrate with a metal, such as copper. The sequence comprises first forming a reliable barrier layer in the patterned feature to prevent diffusion of the metal into the dielectric layer through which the patterned feature is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the barrier layer at the bottom of the patterned feature, depositing a second barrier layer, and then filling the patterned feature with a metal, such as copper.

Abstract: The present invention provides a method of forming a titanium silicon nitride barrier layer on a semiconductor wafer, comprising the steps of depositing a titanium nitride layer on the semiconductor wafer; plasma-treating the titanium nitride layer in a N2/H2 plasma; and exposing the plasma-treated titanium nitride layer to a silane ambient, wherein silicon is incorporated into the titanium nitride layer as silicon nitride thereby forming a titanium silicon nitride barrier layer. Additionally, there is provided a method of improving the barrier performance of a titanium nitride layer comprising the step of introducing silicon into the titanium nitride layer such that the silicon is incorporated into the titanium nitride layer as silicon nitride. Also provided is a method of integrating copper into a semiconductor device and a method of improving copper wettability at a copper/titanium nitride interface in a semiconductor device.

Abstract: A precursor and method for filling a feature in a substrate. The method generally includes depositing a barrier layer, the barrier layer being formed from pentakis(dimethylamido)tantalum having less than about 5 ppm of chlorine. The method additionally may include depositing a seed layer over the barrier layer and depositing a conductive layer over the seed layer. The precursor generally includes pentakis(dimethylamido)tantalum having less than about 5 ppm of chlorine. The precursor is generated in a canister having a surrounding heating element configured to reduce formation of impurities.

Abstract: Methods and an apparatus of forming a titanium silicon nitride (TiSiN) layer are disclosed. The titanium silicon nitride (TiSiN) layer may be formed using a cyclical deposition process by alternately adsorbing a titanium-containing precursor, a silicon-containing gas and a nitrogen-containing gas on a substrate. The titanium-containing precursor, the silicon-containing gas and the nitrogen-containing gas react to form the titanium silicon nitride (TiSiN) layer on the substrate. The formation of the titanium silicon nitride (TiSiN) layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, a titanium silicon nitride (TiSiN) layer may be used as a diffusion barrier for a copper metallization process.

Abstract: A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.

Abstract: A method for forming a tungsten-containing copper interconnect barrier layer (e.g., a tungsten [W] or tungsten-nitride [WXN] copper interconnect barrier layer) on a substrate with a high (e.g., greater than 30%) sidewall step coverage and ample adhesion to underlying dielectric layers. The method includes first depositing a thin titanium-nitride (TiN) or tantalum nitride (TaN) nucleation layer on the substrate, followed by the formation of a tungsten-containing copper interconnect barrier layer (e.g., a W or WXN copper interconnect barrier layer) overlying the substrate. The tungsten-containing copper interconnect barrier layer can, for example, be formed using a Chemical Vapor Deposition (CVD) technique that employs a fluorine-free tungsten-containing gas (e.g., tungsten hexacarbonyl [W(CO)6]) or a WF6-based Atomic Layer Deposition (ALD) technique.

Abstract: The present invention provides a method of forming a titanium silicon nitride barrier layer on a semiconductor wafer, comprising the steps of depositing a titanium nitride layer on the semiconductor wafer; plasma-treating the titanium nitride layer in a N2/H2 plasma; and exposing the plasma-treated titanium nitride layer to a silane ambient, wherein silicon is incorporated into the titanium nitride layer as silicon nitride thereby forming a titanium silicon nitride barrier layer. Additionally, there is provided a method of improving the barrier performance of a titanium nitride layer comprising the step of introducing silicon into the titanium nitride layer such that the silicon is incorporated into the titanium nitride layer as silicon nitride. Also provided is a method of integrating copper into a semiconductor device and a method of improving copper wettability at a copper/titanium nitride interface in a semiconductor device.

Abstract: A deposition system for performing chemical vapor deposition comprising deposition chamber and a vaporizer coupled to said chamber. In one aspect, the vaporizer has a relatively short mixing passageway to mix a carrier gas with a liquid precursor to produce a fine aerosol-like dispersion of liquid precursor which is vaporized by a hot plate.

Abstract: A barrier layer structure and a method of forming the structure. The barrier layer structure comprises a bilayer, with a first layer formed by chemical vapor deposition and a second layer formed by physical vapor deposition. The first barrier layer comprises a metal or a metal nitride and the second barrier layer comprises a metal or a metal nitride. The barrier bilayer is applicable to copper metallization.

Abstract: A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.

Abstract: A method for forming a tungsten-containing copper interconnect barrier layer (e.g., a tungsten [W] or tungsten-nitride [WXN] copper interconnect barrier layer) on a substrate with a high (e.g., greater than 30%) sidewall step coverage and ample adhesion to underlying dielectric layers. The method includes first depositing a thin titanium-nitride (TiN) or tantalum nitride (TaN) nucleation layer on the substrate, followed by the formation of a tungsten-containing copper interconnect barrier layer (e.g., a W or WXN copper interconnect barrier layer) overlying the substrate. The tungsten-containing copper interconnect barrier layer can, for example, be formed using a Chemical Vapor Deposition (CVD) technique that employs a fluorine-free tungsten-containing gas (e.g., tungsten hexacarbonyl [W(CO)6]) or a WF6-based Atomic Layer Deposition (ALD) technique.

Abstract: The present invention provides a method of forming a titanium silicon nitride barrier layer on a semiconductor wafer, comprising the steps of depositing a titanium nitride layer on the semiconductor wafer; plasma-treating the titanium nitride layer in a N2/H2 plasma; and exposing the plasma-treated titanium nitride layer to a silane ambient, wherein silicon is incorporated into the titanium nitride layer as silicon nitride thereby forming a titanium silicon nitride barrier layer. Additionally, there is provided a method of improving the barrier performance of a titanium nitride layer comprising the step of introducing silicon into the titanium nitride layer such that the silicon is incorporated into the titanium nitride layer as silicon nitride. Also provided is a method of integrating copper into a semiconductor device and a method of improving copper wettability at a copper/titanium nitride interface in a semiconductor device.

Abstract: A method and resultant structure of forming barrier layers in a via hole extending through an inter-level dielectric layer. A first barrier layer of TiSiN is conformally coated by chemical vapor deposition onto the bottom and sidewalls of the via holes and in the field area on top of the dielectric layer. A single plasma sputter reactor is used to perform two steps. In the first step, the wafer rather than the target is sputtered with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls. In the second step, a second barrier layer, for example of Ta/TaN, is sputter deposited onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.

Abstract: In accordance with the present invention, a method is provided for forming an improved tungsten layer. In one embodiment, a CVD method for depositing a tungsten layer on a substrate includes forming a bilayer of titanium-nitride/titanium (TiN/Ti) over the substrate, placing the substrate in a deposition zone of a substrate processing chamber, and introducing a fluorine-free tungsten-containing precursor and a carrier gas into the deposition zone for forming a tungsten nucleation layer over the TiN/Ti bilayer. The Ti layer is between the TiN layer and the substrate. After the tungsten nucleation formation, a process gas including a tungsten-containing source and a reduction agent are introduced into the deposition zone for forming the bulk tungsten layer. In one embodiment, the fluorine-free tungsten-containing precursor includes W(CO)6, and the carrier gas is Argon.

Abstract: A method of forming tantalum nitride (TaN) compound layers for use in integrated circuit fabrication processes is disclosed. The tantalum nitride (TaN) compound layer is formed by thermally decomposing a tantalum containing metal organic precursor. After the tantalum nitride (TaN) compound layer is formed, it is plasma treated.

Abstract: Provided herein is a method of depositing alpha-tantalum film on a semiconductor wafer by depositing a tantalum nitride film on a wafer; and then depositing a tantalum film over the tantalum nitride film using wafer bias. The tantalum film as deposited is in alpha phase. Also provided is a method of depositing Cu barrier and seed layer on a semiconductor wafer, comprising the steps of depositing a tantalum nitride layer on a wafer; depositing a tantalum layer over the tantalum nitride layer using wafer bias, wherein the resulting tantalum barrier layer is in alpha phase; and then depositing Cu seed layer over the alpha-tantalum barrier layer. Further provided is a method of depositing alpha-tantalum film/layer using two-chamber process, wherein the tantalum nitride and subsequently deposited tantalum films/layers can be deposited in two separate chambers, such as IMP or SIP chambers. Still further provided is a method of depositing alpha-tantalum film by depositing PVD tantalum film on CVD films.

Abstract: A method of forming tantalum nitride (TaN) compound layers for use in integrated circuit fabrication processes is disclosed. The tantalum nitride (TaN) compound layer is formed by thermally decomposing a tantalum containing metal organic precursor. After the tantalum nitride (TaN) compound layer is formed, it is plasma treated.

Abstract: Embodiments of the present invention provide a process sequence and related hardware for filling a patterned feature on a substrate with a metal, such as copper. The sequence comprises first forming a reliable barrier layer in the patterned feature to prevent diffusion of the metal into the dielectric layer through which the patterned feature is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the barrier layer at the bottom of the patterned feature, depositing a second barrier layer, and then filling the patterned feature with a metal, such as copper.

Abstract: A deposition system for performing chemical vapor deposition comprising deposition chamber having a lid and a vaporizer attached to the lid is provided. Additionally, one or more valves disposed between the lid and the vaporizer to limit the flow of precursor material to the chamber and to improve purging of a precursor material delivery system attached to the vaporizer. The precursor delivery system has one or more conduction lines. One of the conduction lines is a flexible conduction line in the form of a multiple turn coil having a torsional elasticity suitable for allowing detachment of the lid from the chamber without having to break or disassemble a conduction line. Preferably, the flexible conduction line is a thirty (30) turn coil having a diameter of approximately three (3) inches fabricated from stainless steel tubing.

Abstract: Copper films having improved properties are deposited by chemical vapor deposition from an organocopper precursor of a blend of copper hexafluoroacetylacetonate trimethylvinylsilane and from about 1.0 to 5.0 percent by weight of trimethylvinylsilane that is vaporized in a vaporizer, and passed into a chemical vapor deposition chamber. Separately up to about 2 percent by weight of the precursor blend of water vapor is added directly to the chamber.