Patents by Inventor Christopher C. Wanner

Christopher C. Wanner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11635798
    Abstract: An example computing system may include computer module bays, a power subsystem to supply power to computer modules installed in the computer module bays, and a system controller. The power subsystem may also implement overcurrent protection (OCP) based on an OCP threshold parameter. The system controller may include dynamic OCP adjustment logic that repeatedly updates the OCP threshold parameter during normal operation of the computing system. The dynamic OCP adjustment logic may update the OCP threshold parameter by determining a power requirement of the computing system based on a current configuration of the computing system, determining a new OCP threshold based on the power requirement, and instructing the power subsystem to change a value of the OCP threshold parameter to a new value based on the new OCP threshold.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: April 25, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Christopher C. Wanner
  • Patent number: 11190002
    Abstract: Examples herein relate to an apparatus. In some examples, an apparatus may include a circuit to direct a power signal to at least one electrical component. The circuit may include a protection device to regulate power to the electrical component, detection circuitry to detect when the protection device has failed, and an alert handling logic to receive a signal from the detection circuitry that the protection device has failed.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: November 30, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Bradley D. Winick, Christopher C. Wanner, Howard Leverenz
  • Publication number: 20200257348
    Abstract: An example computing system may include computer module bays, a power subsystem to supply power to computer modules installed in the computer module bays, and a system controller. The power subsystem may also implement overcurrent protection (OCP) based on an OCP threshold parameter. The system controller may include dynamic OCP adjustment logic that repeatedly updates the OCP threshold parameter during normal operation of the computing system. The dynamic OCP adjustment logic may update the OCP threshold parameter by determining a power requirement of the computing system based on a current configuration of the computing system, determining a new OCP threshold based on the power requirement, and instructing the power subsystem to change a value of the OCP threshold parameter to a new value based on the new OCP threshold.
    Type: Application
    Filed: March 14, 2019
    Publication date: August 13, 2020
    Inventor: Christopher C. Wanner
  • Publication number: 20190237959
    Abstract: Examples herein relate to an apparatus. In some examples, an apparatus may include a circuit to direct a power signal to at least one electrical component. The circuit may include a protection device to regulate power to the electrical component, detection circuitry to detect when the protection device has failed, and an alert handling logic to receive a signal from the detection circuitry that the protection device has failed.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 1, 2019
    Inventors: Bradley D. Winick, Christopher C. Wanner, Howard Leverenz
  • Patent number: 10063011
    Abstract: Examples disclose an electrical connector comprising a first pin and a second pin. Each pin has a different length corresponding to a different data signaling rate.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: August 28, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Christopher C. Wanner
  • Patent number: 9779037
    Abstract: Various embodiments described herein provide for establishing connectivity of nodes by employing base management controllers associated with the nodes. For some embodiments, a first data is received at a resource manager from a first base management controller (BMC) associated with a first node, wherein the resource manager is associated with a server computer system. A second data is received at the resource manager from a second BMC associated with a second node. A classification of the first node and the second node are determined and a compatibility of the first node with the second node based on the first data and the second. A topology is generated, at the resource manager, of the first node and the second node.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: October 3, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Christopher C Wanner
  • Publication number: 20170244198
    Abstract: Examples disclose an electrical connector comprising a first pin and a second pin. Each pin has a different length corresponding to a different data signaling rate.
    Type: Application
    Filed: March 4, 2015
    Publication date: August 24, 2017
    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventor: Christopher C. WANNER
  • Patent number: 9645337
    Abstract: A modular connector infrastructure includes device connector modules having optical connectors to optically connect to respective subsets of electronic devices in a system. The device connector modules are removably connected to the electronic devices.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: May 9, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kevin B. Leigh, George D. Megason, David W. Sherrod, Christopher C. Wanner
  • Publication number: 20160070077
    Abstract: A modular connector infrastructure includes device connector modules having optical connectors to optically connect to respective subsets of electronic devices in a system. The device connector modules are removably connected to the electronic devices.
    Type: Application
    Filed: November 16, 2015
    Publication date: March 10, 2016
    Inventors: Kevin B. Leigh, George D. Megason, David W. Sherrod, Christopher C. Wanner
  • Patent number: 9213157
    Abstract: A modular connector infrastructure includes device connector modules having optical connectors to optically connect to respective subsets of electronic devices in a system. The device connector modules are removably connected to the electronic devices.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: December 15, 2015
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Kevin B. Leigh, George D. Megason, David W. Sherrod, Christopher C. Wanner
  • Publication number: 20150006700
    Abstract: Establishing connectivity of nodes. A first data is received at a resource manager from a first base management controller (BMC) associated with a first node, wherein the resource manager is associated with a server computer system. A second data is received at the resource manager from a second BMC associated with a second node. A classification of the first node and the second node are determined and a compatibility of the first node with the second node based on the first data and the second. A topology is generated, at the resource manager, of the first node and the second node.
    Type: Application
    Filed: January 30, 2012
    Publication date: January 1, 2015
    Inventor: Christopher C. Wanner
  • Publication number: 20140334782
    Abstract: A modular connector infrastructure includes device connector modules having optical connectors to optically connect to respective subsets of electronic devices in a system. The device connector modules are removably connected to the electronic devices.
    Type: Application
    Filed: January 6, 2012
    Publication date: November 13, 2014
    Inventors: Kevin B. Leigh, George D. Megason, David W. Sherrod, Christopher C. Wanner
  • Publication number: 20140003283
    Abstract: Embodiments provide methods, apparatuses, and systems for transmitting an auto-negotiation message via one lane of a plurality of lanes to determine a link configuration between a first device and a second device, wherein the link configuration utilizes a plurality of lanes. In response to the auto-negotiation message, the network device may determine that one of the plurality of lanes is inoperative. The network device may then reconfigure the link configuration to utilize a subset of the plurality of lanes.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Inventors: David J. Koenen, Christopher C. Wanner
  • Patent number: 7272732
    Abstract: At least one computer system receives power from a power system having a maximum power output based on a nominal power consumption of the at least one computer system. The power system is operable to detect an amount of power consumed by the at least one computer system, and compare the power consumption to a threshold based on the maximum power output of the power supply. The power system is operable to place one or more components of the at least one computer system in a lower-power state to reduce power consumption in response to the amount of power consumed by the at least one computer system exceeding the threshold.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: September 18, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Keith Istvan Farkas, Gopalakrishnan Janakiraman, Robert Stets, Chandrakant D. Patel, Christopher C. Wanner
  • Patent number: 7020757
    Abstract: A memory subsystem includes multiple memory modules coupled by point-to-point links. A memory controller is coupled by a point-to-point link to a first memory module, which is turn is coupled by another point-to-point link to another memory module. Further memory modules may be coupled by respective point-to-point links in the memory subsystem. In some arrangements, each memory module tracks commands issued to other memory modules, such as more upstream memory modules. Also, in one example implementation, a clock is embedded within a data stream transmitted over a point-to-point link, so that an external clock is not employed in this example implementation.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: March 28, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael Ruhovets, Christopher C. Wanner
  • Publication number: 20040268166
    Abstract: At least one computer system receives power from a power system having a maximum power output based on a nominal power consumption of the at least one computer system. The power system is operable to detect an amount of power consumed by the at least one computer system, and compare the power consumption to a threshold based on the maximum power output of the power supply. The power system is operable to place one or more components of the at least one computer system in a lower-power state to reduce power consumption in response to the amount of power consumed by the at least one computer system exceeding the threshold.
    Type: Application
    Filed: June 30, 2003
    Publication date: December 30, 2004
    Inventors: Keith Istvan Farkas, Gopalakrishnan Janakiraman, Robert Stets, Chandrakant D. Patel, Christopher C. Wanner
  • Publication number: 20040193821
    Abstract: A memory subsystem includes multiple memory modules coupled by point-to-point links. A memory controller is coupled by a point-to-point link to a first memory module, which is turn is coupled by another point-to-point link to another memory module. Further memory modules may be coupled by respective point-to-point links in the memory subsystem. In some arrangements, each memory module tracks commands issued to other memory modules, such as more upstream memory modules. Also, in one example implementation, a clock is embedded within a data stream transmitted over a point-to-point link, so that an external clock is not employed in this example implementation.
    Type: Application
    Filed: March 27, 2003
    Publication date: September 30, 2004
    Inventors: Michael Ruhovets, Christopher C. Wanner
  • Patent number: 6088517
    Abstract: A computer system having separate, yet compatible DMA controllers on a bus. Each DMA controller for controlling at least one DMA channel, each DMA controller having an independent set of registers for performing DMA operations and a configuration register for indicating channel status and designation. A DMA master for compatibly communicating with a processor and for initializing and communicating with the multiple DMA controllers.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: July 11, 2000
    Assignee: Compaq Computer Corporation
    Inventors: Christopher C. Wanner, Jeffrey C. Stevens, Robert A. Lester, Dwight D. Riley, David J. Maguire, James Edwards
  • Patent number: 5802318
    Abstract: A keyboard system according to the present invention includes a serial bus host controller coupled to a serial bus keyboard. The keyboard includes both keyboard scan logic and scan code conversion logic for passing to the host controller over the serial bus. The host controller includes circuitry for processing the data between the serial bus and a host bus. The host controller further includes 8042 emulation logic for providing a hardware compatible interface to the keyboard controller. The 8042 emulation logic also includes circuitry for communicating over the serial bus during times when the serial bus has not yet been initialized.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: September 1, 1998
    Assignee: Compaq Computer Corporation
    Inventors: David E. Murray, David R. Wooten, Randall L. Hess, Christopher C. Wanner, Jeff W. Wolford
  • Patent number: 5778199
    Abstract: A method or apparatus of blocking access to a first device via a bus carrying an address enable signal in a computer system. A second device detects appearance of predetermined bus address information, and the address enable signal is blocked from the first device if the predetermined bus address information is present. A third device connected to the bus and the first device both are responsive to the predetermined bus address information, which includes bus addresses having upper bits with a non-zero value.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: July 7, 1998
    Assignee: Compaq Computer Corporation
    Inventors: Christopher C. Wanner, Robert L. Woods