Abstract: A Toffoli magic state to be injected in preparation of a Toffoli gate may be prepared using a bottom-up approach. In the bottom-up approach, computational basis states are prepared in a fault tolerant manner using a STOP algorithm. The computational basis states are further used to prepare the Toffoli magic state. The STOP algorithm tracks syndrome outcomes and can be used to determine when to stop repeating syndrome measurements such that faults are guaranteed to be below a threshold level. Also, the STOP algorithm may be used in growing repetition code from a first code distance to a second code distance, such as for use in the computational basis states.

Abstract: High-fidelity measurements of qubits are achieved by increasing a number of measurements taken by use of a swap operation and a readout qubit, deflating a bosonic qubit for which measurement outcomes are affected by single photon/phonon loss events, deflating a bosonic qubit enabling readout in other basis, and evolving the qubit under a Hamiltonian that couples a mode to be measured to another mode where the Hamiltonian is selected from a three wave mixing interaction, and/or a combination of these techniques.

Abstract: A fault tolerant quantum computer is implemented using hybrid acoustic-electric qubits. A control circuit includes an asymmetrically threaded superconducting quantum interference devices (ATS) that excites excite phonons in a mechanical resonator by driving a storage mode of the mechanical resonator and dissipates phonons from the mechanical resonator via an open transmission line coupled to the control circuit, wherein the open transmission line is configured to absorb photons from a dump mode of the control circuit.

Abstract: Techniques regarding encoding a quantum circuit to a trivalent lattice scheme to identify flag qubit outcomes are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph component that can encode a quantum circuit to a trivalent lattice that maps an ancilla qubit to a plurality of data qubits via a plurality of flag qubits based on a connectivity scheme of the quantum circuit.

Abstract: Fault-tolerant error correction (EC) is desirable for performing large quantum computations. In this disclosure, example fault-tolerant EC protocols are disclosed that use flag circuits, which signal when errors resulting from ? faults have weight greater than ?. Also disclosed are general constructions for these circuits (also referred to as flag qubits) for measuring arbitrary weight stabilizers. The example flag EC protocol is applicable to stabilizer codes of arbitrary distance that satisfy a set of conditions and uses fewer qubits than other schemes, such as Shor, Steane and Knill error correction. Also disclosed are examples of infinite code families that satisfy these conditions and analyze the behaviour of distance-three and -five examples numerically. Using fewer resources than Shor EC, the example flag EC protocols can be used in low-overhead fault-tolerant EC protocols using large low density parity check quantum codes.

Abstract: A method of error correction for a quantum computer includes identifying each of a plurality of physical qubits arranged in a lattice pattern over a surface in a quantum processor of the quantum computer as a one of a data qubit, an ancilla qubit or a flag qubit to define a plurality of data qubits, ancilla qubits and flag qubits. Each pair of interacting data qubits interact with a flag qubit and adjacent flag qubits both interact with a common ancilla qubit. The method further includes performing measurements of weight-four stabilizers, weight-two stabilizers, or both of a surface code formed using at least a sub-plurality of the plurality of physical qubits, or performing measurements of weight-four Bacon-Shor type gauge operators; and correcting fault-tolerantly quantum errors in one or more of the at least sub-plurality of physical qubits based on a measurement from at least one flag qubit.

Abstract: A quantum computer includes a quantum processor that includes a first plurality of qubits arranged in a hexagonal lattice pattern such that each is substantially located at a hexagon apex, and a second plurality of qubits each arranged substantially along a hexagon edge. Each of the first plurality of qubits is coupled to three nearest-neighbor qubits of the second plurality of qubits, and each of the second plurality of qubits is coupled to two nearest-neighbor qubits of the first plurality of qubits. Each of the second plurality of qubits is a control qubit at a control frequency. Each of the first plurality of qubits is a target qubit at one of a first target frequency or a second target frequency. The quantum computer includes an error correction device configured to operate on the hexagonal lattice pattern of the plurality of qubits so as to detect and correct data errors.

Abstract: Fault-tolerant error correction (EC) is desirable for performing large quantum computations. In this disclosure, example fault-tolerant EC protocols are disclosed that use flag circuits, which signal when errors resulting from ? faults have weight greater than ?. Also disclosed are general constructions for these circuits (also referred to as flag qubits) for measuring arbitrary weight stabilizers. The example flag EC protocol is applicable to stabilizer codes of arbitrary distance that satisfy a set of conditions and uses fewer qubits than other schemes, such as Shor, Steane and Knill error correction. Also disclosed are examples of infinite code families that satisfy these conditions and analyze the behaviour of distance-three and -five examples numerically. Using fewer resources than Shor EC, the example flag EC protocols can be used in low-overhead fault-tolerant EC protocols using large low density parity check quantum codes.