Patents by Inventor Christopher L. Rumer

Christopher L. Rumer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11056466
    Abstract: Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A gap forms between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package. Additionally, interstitial gaps form between each of the PoP semiconductor packages disposed on an organic substrate. A curable fluid material, such as a molding compound, may be flowed both in the interstitial spaces between the PoP semiconductor packages and into the gap between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Omkar Karhade, Christopher L. Rumer, Nitin Deshpande, Robert M. Nickerson
  • Publication number: 20190385983
    Abstract: Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A gap forms between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package. Additionally, interstitial gaps form between each of the PoP semiconductor packages disposed on an organic substrate. A curable fluid material, such as a molding compound, may be flowed both in the interstitial spaces between the PoP semiconductor packages and into the gap between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package.
    Type: Application
    Filed: August 27, 2019
    Publication date: December 19, 2019
    Applicant: Intel Corporation
    Inventors: OMKAR KARHADE, CHRISTOPHER L. RUMER, NITIN DESHPANDE, ROBERT M. NICKERSON
  • Patent number: 10438930
    Abstract: Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A gap forms between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package. on an organic substrate. A curable fluid material, such as a molding compound, may be flowed both in the interstitial spaces between the PoP semiconductor packages and into the gap between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: October 8, 2019
    Assignee: Intel Corporation
    Inventors: Omkar Karhade, Christopher L. Rumer, Nitin Deshpande, Robert M. Nickerson
  • Publication number: 20190103385
    Abstract: The present disclosure is directed to systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A thermally conductive member that includes at least one thermally conductive member may be disposed between the first semiconductor package and the second semiconductor package. The thermally conductive member may include: a single thermally conductive element; multiple thermally conductive elements; or a core that includes at least one thermally conductive element. The thermally conductive elements are thermally conductively coupled to an upper surface of the first semiconductor package and to the lower surface of the second semiconductor package to facilitate the transfer of heat from the first semiconductor package to the second semiconductor package.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Intel Corporation
    Inventors: OMKAR KARHADE, ROBERT L. SANKMAN, NITIN A. DESHPANDE, MITUL MODI, THOMAS J. DE BONIS, ROBERT M. NICKERSON, ZHIMIN WAN, HAIFA HARIRI, SRI CHAITRA J. CHAVALI, NAZMIYE ACIKGOZ AKBAY, FADI Y. HAFEZ, CHRISTOPHER L. RUMER
  • Publication number: 20190006319
    Abstract: Systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages are provided. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A gap forms between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package. Additionally, interstitial gaps form between each of the PoP semiconductor packages disposed on an organic substrate. A curable fluid material, such as a molding compound, may be flowed both in the interstitial spaces between the PoP semiconductor packages and into the gap between the upper surface of the first semiconductor package and the lower surface of the second semiconductor package.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventors: OMKAR KARHADE, CHRISTOPHER L. RUMER, NITIN DESHPANDE, ROBERT M. NICKERSON
  • Publication number: 20170154828
    Abstract: A method and machine-readable medium including non-transitory program instructions that when executed by a processor cause the processor to perform a method including measuring at least one parameter of a substrate or a die; and establishing or modifying a thermal compression bonding recipe based on the at least one parameter, wherein the thermal compression bonding recipe is operable for thermal compression bonding of the die and the substrate. A thermal compression bonding tool including a pedestal operable to hold a substrate during a thermal compression bonding process and a bond head operable to engage a die, the tool including a controller machine readable instructions to process a substrate and a die combination, the instructions including an algorithm to implement or modify a thermal compression bonding process based on a parameter of a substrate or die.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 1, 2017
    Inventors: Timothy A. GOSSELIN, Patrick NARDI, Kartik SRINIVASAN, Amram EITAN, Ji Yong PARK, Christopher L. RUMER, George S. KOSTIEW
  • Patent number: 8193072
    Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: June 5, 2012
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Daoqiang Lu, Christopher L. Rumer, Paul A. Koning, Darcy E. Fleming, Gudbjorg H. Oskarsdottir, Tiffany Byrne
  • Patent number: 7996989
    Abstract: Embodiments of the invention includes a heat dissipating device. The heat dissipating device includes a main body having a surface, wherein the surface is plated or coated with at least two different metals to form a design effective for bonding to solder and for adhering to polymer in a polymer solder hybrid. The heat dissipating device also includes surface perturbations.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: August 16, 2011
    Assignee: Intel Corporation
    Inventors: Ashay A. Dani, Sabina J. Houle, Christopher L. Rumer, Thomas J Fitzgerald
  • Publication number: 20110059596
    Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.
    Type: Application
    Filed: November 2, 2010
    Publication date: March 10, 2011
    Inventors: Eric J. Li, Daoqiang Lu, Christopher L. Rumer, Paul A. Koning, Darcy E. Fleming, Gudbjorg H. Oskarsdottir, Tiffany Byrne
  • Patent number: 7897486
    Abstract: Formulations and processes for forming wafer coat layers are disclosed. In one embodiment, an organic surface protectant is incorporated into a wafer coat formulation deposited onto a semiconductor wafer prior to the laser scribe operation. Upon removal of the wafer coat layer, the organic surface protectant remains on the bumps and thereby prevents oxidation of the bumps between die prep and chip and attach. In an alternative embodiment, an ultraviolet light absorber is added to the wafer coat formulation to enhance the wafer coat layer's energy absorption and thereby improve the laser's ability to ablate the wafer coat layer. In an alternative embodiment, a conformal wafer coat layer is deposited on the wafer and die bumps, thereby reducing wafer coat layer thickness variations that can impact the laser scribing ability.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: March 1, 2011
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Daoqiang Lu, Christopher L. Rumer, Paul A. Koning, Darcy E. Fleming, Gudbjorg H. Oskarsdottir, Tiffany Byrne
  • Patent number: 7846778
    Abstract: An integrated heat spreader, heat sink or heat pipe with pre-attached phase change thermal interface material and a method of making an electronic assembly.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: December 7, 2010
    Assignee: Intel Corporation
    Inventors: Christopher L. Rumer, Sabina J. Houle, Saikumar Jayaraman, Paul A. Koning, Ashay Dani
  • Patent number: 7619318
    Abstract: In some embodiments, a method includes providing a composition which includes a base at least partially filled with filler particles and applying the composition as an underfill composition. At least some of the filler particles are electrically conductive.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: November 17, 2009
    Assignee: Intel Corporation
    Inventors: Christopher L. Rumer, Tian-An Chen, Vijay Wakharkar, Paul A. Koning
  • Patent number: 7611966
    Abstract: A method is described for laser scribing or dicing portions of a workpiece using multi-source laser systems. In one embodiment, a first laser melts portions of the workpiece prior to a second laser ablating the portions of the workpiece.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: November 3, 2009
    Assignee: Intel Corporation
    Inventors: Eric J. Li, Sergei L. Voronov, Christopher L. Rumer
  • Patent number: 7527090
    Abstract: Embodiments of the invention includes a heat dissipating device. The heat dissipating device includes a main body having a surface, wherein the surface is plated or coated with at least two different metals to form a design effective for bonding to solder and for adhering to polymer in a polymer solder hybrid. The heat dissipating device also includes surface perturbations.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: May 5, 2009
    Assignee: Intel Corporation
    Inventors: Ashay A. Dani, Sabina J. Houle, Christopher L. Rumer, Thomas J Fitzgerald
  • Patent number: 7473995
    Abstract: An integrated heat spreader, heat sink or heat pipe with pre-attached phase change thermal interface material and a method of making an electronic assembly.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: January 6, 2009
    Assignee: Intel Corporation
    Inventors: Christopher L. Rumer, Sabina J. Houle, Saikumar Jayaraman, Paul A. Koning, Ashay Dani
  • Publication number: 20080185713
    Abstract: Embodiments of the invention includes a heat dissipating device. The heat dissipating device includes a main body having a surface, wherein the surface is plated or coated with at least two different metals to form a design effective for bonding to solder and for adhering to polymer in a polymer solder hybrid. The heat dissipating device also includes surface perturbations.
    Type: Application
    Filed: April 3, 2008
    Publication date: August 7, 2008
    Inventors: Ashay A. Dani, Sabina J. Houle, Christopher L. Rumer, Thomas J Fitzgerald
  • Patent number: 7358606
    Abstract: A device and method identify and compensate for tensile stress due to heat-caused expansion and contraction between an integrated heat spreader and thermal interface material. This device and method change the shape of the integrated heat spreader based upon the identification of the location of the highest tensile and/or shear stress so that additional thermal interface material is deposited between the integrated heat spreader and a die. Utilizing this method and device, heat is efficiently transferred from the die to the integrated heat spreader.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: April 15, 2008
    Assignee: Intel Corporation
    Inventors: Christopher L. Rumer, Sabina J. Houle
  • Patent number: 7311967
    Abstract: A thermal interface material is described for thermal coupling of an electronic component to a thermally conductive member. The thermal interface material includes a viscoelastic polymer matrix material, fusible solder particles in the matrix material, and filler particles in the matrix material. The solder particles have a melting temperature below a selected temperature (e.g. 157° C. for indium) and the filler particles have a melting temperature substantially above the selected temperature (e.g. 961° C. for silver). The filler particles keep the thermal interface material intact under adverse thermal and stress conditions.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: December 25, 2007
    Assignee: Intel Corporation
    Inventors: Ashay A. Dani, Paul A. Koning, Saikumar Jayaraman, Christopher L. Rumer
  • Patent number: 7304381
    Abstract: In some embodiments, an integrated circuit package includes a substrate and a heat spreader coupled to the substrate by fasteners. Thermal interface material thermally couples the die to the heat spreader. The heat spreader is provided over the die and is attached to the substrate with fasteners rather than a sealant-adhesive. Some examples of suitable fasteners may include rivets, barbed connectors, and gripping clips.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: December 4, 2007
    Assignee: Intel Corporation
    Inventors: Christopher L. Rumer, Sabina J. Houle, Oswald L. Skeete, Mike T. Reiter, Jeff R. Wienrich
  • Patent number: 7303977
    Abstract: A laser micromachining method is disclosed wherein a workpiece is milled using an incident beam from a laser beam focused above the surface of the workpiece. The incident beam is guided by a plasma channel generated by the incident beam. The plasma channel, which has a relatively constant diameter over an extended distance, is generated by continual Kerr effect self-focusing balanced by ionization of air beam defocusing.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: December 4, 2007
    Assignee: Intel Corporation
    Inventors: Sergei L. Voronov, Christopher L. Rumer