Abstract: A method of doping a substrate may include exposing a substrate surface of the semiconductor substrate to a plasma clean, performing a deposition of a dopant layer on the substrate surface using a plasma source, after the plasma clean, the dopant layer comprising a dopant element; and exposing the substrate to an implant process when the dopant layer is disposed on the substrate surface, wherein the implant process introduces an ion species comprising the dopant element into the substrate, wherein the substrate is maintained under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer, and the implant process, and wherein at least a portion of the dopant layer is implanted into the substrate during the implant process.

Abstract: A method of method of treating a semiconductor substrate. The method may include, in a beamline ion implanter, exposing a substrate surface of the semiconductor substrate to a plasma clean and exposing the substrate surface to a hydrogen treatment from a plasma source. The method may further include, in the beamline ion implanter, exposing the substrate to an implant process after formation of the hydrogen passivation, wherein the substrate is maintained under vacuum over a process duration spanning the plasma clean, the hydrogen treatment, and the implant process.

Abstract: Provided herein are approaches for controlling radicals in proximity to a wafer. In some embodiments, a system may include a radical source operable to generate radicals in proximity to the wafer, and a filter positioned between the radical source and the wafer, wherein the filter includes a first plate operable to control radicals generated by the radical source. The system may further include an ion source operable to deliver an ion beam to the wafer, wherein the ion beam passes outside the filter.

Abstract: A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.

Abstract: A method may include providing a substrate in a plasma chamber, the substrate comprising a monocrystalline semiconductor, having an upper surface. The method may include initiating a plasma in the plasma chamber, the plasma comprising an amorphizing ion species, and applying a pulse routine to the substrate, the pulse routine comprising a plurality of extraction voltage pulses, wherein a plurality of ion pulses are directed to the substrate, and wherein an ion dose per pulse is greater than a threshold for low dose amorphization.

Abstract: Provided herein are approaches for controlling radicals in proximity to a wafer. In some embodiments, a system may include a radical source operable to generate radicals in proximity to the wafer, and a filter positioned between the radical source and the wafer, wherein the filter includes a first plate operable to control radicals generated by the radical source. The system may further include an ion source operable to deliver an ion beam to the wafer, wherein the ion beam passes outside the filter.

Abstract: A method may include providing a substrate in a plasma chamber, the substrate comprising a monocrystalline semiconductor, having an upper surface. The method may include initiating a plasma in the plasma chamber, the plasma comprising an amorphizing ion species, and applying a pulse routine to the substrate, the pulse routine comprising a plurality of extraction voltage pulses, wherein a plurality of ion pulses are directed to the substrate, and wherein an ion dose per pulse is greater than a threshold for low dose amorphization.

Abstract: A beamline architecture including a wafer handling chamber, a load-lock coupled to the wafer handling chamber for facilitating transfer of workpieces between an atmospheric environment and the wafer handling chamber, a plasma chamber coupled to the wafer handling chamber and containing a plasma source for performing at least one of a plasma pre-clean process, a plasma enhanced chemical vapor deposition process, a plasma annealing process, a pre-heating process, and an etching process on workpieces, a process chamber coupled to the wafer handling chamber and adapted to perform an ion implantation process on workpieces, and a valve disposed between the wafer handling chamber and the plasma chamber for sealing the plasma chamber from the wafer handling chamber and the process chamber, wherein a pressure within the plasma chamber and a pressure within the process chamber can be varied independently of one another.

Abstract: A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.

Abstract: A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.

Abstract: A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.

Abstract: A method of doping a substrate. The method may include implanting a dose of a helium species into the substrate through a surface of the substrate at an implant temperature of 300° C. or greater. The method may further include depositing a doping layer containing a dopant on the surface of the substrate, and annealing the substrate at an anneal temperature, the anneal temperature being greater than the implant temperature.

Abstract: A method of doping a substrate. The method may include implanting a dose of a helium species into the substrate through a surface of the substrate at an implant temperature of 300° C. or greater. The method may further include depositing a doping layer containing a dopant on the surface of the substrate, and annealing the substrate at an anneal temperature, the anneal temperature being greater than the implant temperature.

Abstract: A method of doping a substrate. The method may include implanting a dose of a helium species into the substrate through a surface of the substrate at an implant temperature of 300 ° C. or greater. The method may further include depositing a doping layer containing a dopant on the surface of the substrate, and annealing the substrate at an anneal temperature, the anneal temperature being greater than the implant temperature.

Abstract: A method of doping a substrate. The method may include implanting a dose of a helium species into the substrate through a surface of the substrate at an implant temperature of 300° C. or greater. The method may further include depositing a doping layer containing a dopant on the surface of the substrate, and annealing the substrate at an anneal temperature, the anneal temperature being greater than the implant temperature.

Abstract: A method of doping a compound semiconductor substrate includes: setting a first substrate temperature for the compound semiconductor substrate in a first temperature range; implanting a dopant species into the compound semiconductor substrate at a first ion dose at the first substrate temperature; and annealing the compound semiconductor substrate after the implanting the ions. In conjunction with the annealing, the first ion dose is effective to generate a first dopant activation in the first temperature range higher than a second dopant activation resulting from implantation of the first ion dose at a second substrate temperature below the first temperature range, and is higher than a third dopant activation resulting from implantation of the first ion dose at a third substrate temperature above the first temperature range.

Abstract: A technique for forming 3D structures is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for forming 3D structures. The method may comprise providing a substrate comprising at least two vertically extending fins that are spaced apart from one another to define a trench; depositing a dielectric material in the trench between the at least two vertically extending fins; providing an etch stop layer within the dielectric material, the etch stop layer having a first side and a second opposite side; removing the dielectric material near the first side of the etch stop layer.

Abstract: A method for processing a substrate includes providing a set of patterned structures separated by a first gap on the substrate and directing first implanting ions to the substrate at a first ion energy, where the first implanting ions are effective to impact the substrate in regions defined by the first gap. The method also includes directing depositing ions to the substrate where the second ions are effective to deposit material on at least a portion of the set of patterned structures to form expanded patterned structures, where the expanded patterned structures are characterized by a second gap smaller than the first gap. The method further includes directing second implanting ions to the substrate at a second ion energy, where the second implanting ions effective to impact the substrate in regions defined by the second gap, the second ion energy comprising a higher ion energy than the first ion energy.

Abstract: A method of doping a compound semiconductor substrate includes: setting a first substrate temperature for the compound semiconductor substrate in a first temperature range; implanting a dopant species into the compound semiconductor substrate at a first ion dose at the first substrate temperature; and annealing the compound semiconductor substrate after the implanting the ions. In conjunction with the annealing, the first ion dose is effective to generate a first dopant activation in the first temperature range higher than a second dopant activation resulting from implantation of the first ion dose at a second substrate temperature below the first temperature range, and is higher than a third dopant activation resulting from implantation of the first ion dose at a third substrate temperature above the first temperature range.

Abstract: A surface of an insulating workpiece is implanted to form either hydrophobic or hydrophilic implanted regions. A conductive coating is deposited on the workpiece. The coating may be a polymer in one instance. This coating preferentially forms either on the implanted regions if these implanted regions are hydrophilic or on the non-implanted regions if the implanted regions are hydrophobic.