Patents by Inventor Christopher Wiegand
Christopher Wiegand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220140230Abstract: An apparatus is provided which comprises: a magnetic junction including: a stack of structures including: a first structure comprising a magnet with an unfixed perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device, wherein the first structure has a first dimension along the x-y plane and a second dimension in the z-plane, wherein the second dimension is substantially greater than the first dimension. The magnetic junction includes a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures; and an interconnect adjacent to the third structure, wherein the interconnect comprises a spin orbit material.Type: ApplicationFiled: January 18, 2022Publication date: May 5, 2022Applicant: Intel CorporationInventors: Sasikanth MANIPATRUNI, Kaan OGUZ, Chia-Ching LIN, Christopher WIEGAND, Tanay GOSAVI, Ian YOUNG
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Patent number: 11276730Abstract: A perpendicular spin orbit memory device includes a first electrode having a magnetic material and platinum and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first electrode, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.Type: GrantFiled: January 11, 2019Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Kevin O'Brien, Christopher Wiegand, Tofizur Rahman, Noriyuki Sato, Gary Allen, James Pellegren, Angeline Smith, Tanay Gosavi, Sasikanth Manipatruni, Kaan Oguz, Benjamin Buford, Ian Young
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Patent number: 11264558Abstract: An apparatus is provided which comprises: a magnetic junction including: a stack of structures including: a first structure comprising a magnet with an unfixed perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device, wherein the first structure has a first dimension along the x-y plane and a second dimension in the z-plane, wherein the second dimension is substantially greater than the first dimension. The magnetic junction includes a second structure comprising one of a dielectric or metal; and a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures; and an interconnect adjacent to the third structure, wherein the interconnect comprises a spin orbit material.Type: GrantFiled: September 11, 2018Date of Patent: March 1, 2022Assignee: Intel CorporationInventors: Sasikanth Manipatruni, Kaan Oguz, Chia-Ching Lin, Christopher Wiegand, Tanay Gosavi, Ian Young
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Publication number: 20220043411Abstract: A method for low-latency generation and input of sensor data for control units or control unit networks includes: computing, by a simulator system or device, environmental data sets at a simulation frequency using an environment model of a virtual environment scene, wherein each environmental data set is associated with a respective point in time in an overall simulation time at which point in time the respective environment data set is available for further processing; and executing, by the simulator system or device or by at least one additional system or device, at least one sensor simulation model, wherein the at least one sensor simulation model generates sensor data sets at a sampling frequency, based on the environmental data sets, for further processing by at least one control unit, wherein each sensor data set is associated with a respective start time and respective time of completion in the overall simulation time.Type: ApplicationFiled: August 5, 2021Publication date: February 10, 2022Inventors: Matthias Gehrke, Gregor Sievers, Christian Lindemann, Carsten Scharfe, Christopher Wiegand
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Patent number: 11062752Abstract: A perpendicular spin orbit torque memory device includes a first electrode having tungsten and at least one of nitrogen or oxygen and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first magnet, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.Type: GrantFiled: January 11, 2019Date of Patent: July 13, 2021Assignee: Intel CorporationInventors: Tofizur Rahman, James Pellegren, Angeline Smith, Christopher Wiegand, Noriyuki Sato, Tanay Gosavi, Sasikanth Manipatruni, Kaan Oguz, Kevin O'Brien, Benjamin Buford, Ian Young
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Patent number: 11063088Abstract: A memory device includes a first electrode, a second electrode and a magnetic tunnel junction (MTJ) between the first electrode and the second electrode. The MTJ includes a fixed magnet, a free magnet and a tunnel barrier between the fixed magnet and the free magnet. The MTJ further includes a conductive layer between the free magnet and the second electrode, the conductive layer having a metallic dopant, where the metallic dopant has a concentration that increase with distance from an interface between the free magnet and the conductive layer. A capping layer is between the conductive layer and the second electrode.Type: GrantFiled: December 6, 2019Date of Patent: July 13, 2021Assignee: Intel CorporationInventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Juan G. Alzate-Vinasco, Yu-Jin Chen, Tanmoy Pramanik
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Publication number: 20210175284Abstract: A memory device includes a first electrode, a second electrode and a magnetic tunnel junction (MTJ) between the first electrode and the second electrode. The MTJ includes a fixed magnet, a free magnet and a tunnel barrier between the fixed magnet and the free magnet. The MTJ further includes a conductive layer between the free magnet and the second electrode, the conductive layer having a metallic dopant, where the metallic dopant has a concentration that increase with distance from an interface between the free magnet and the conductive layer. A capping layer is between the conductive layer and the second electrode.Type: ApplicationFiled: December 6, 2019Publication date: June 10, 2021Applicant: Intel CorporationInventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Juan G. Alzate-Vinasco, Yu-Jin Chen, Tanmoy Pramanik
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Patent number: 10943950Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode, a magnetic junction on the conductive layer and a second electrode above the magnetic junction. The magnetic junction includes a magnetic structure including a first magnetic layer including cobalt, a non-magnetic layer including platinum or tungsten on the first magnetic layer and a second magnetic layer including cobalt on the non-magnetic layer. The magnetic junction further includes an anti-ferromagnetic layer on the magnet structure, a fixed magnet above the anti-ferromagnetic layer, a free magnet above the fixed magnet and a tunnel barrier between the fixed magnet and the free magnet.Type: GrantFiled: March 27, 2019Date of Patent: March 9, 2021Assignee: Intel CorporationInventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Michael Robinson, Huiying Liu
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Publication number: 20200343301Abstract: A memory apparatus includes a first electrode having a spin orbit material. The memory apparatus further includes a first memory device on a portion of the first electrode and a first dielectric adjacent to a sidewall of the first memory device. The memory apparatus further includes a second memory device on a portion of the first electrode and a second dielectric adjacent to a sidewall of the second memory device. A second electrode is on and in contact with a portion of the first electrode, where the second electrode is between the first memory device and the second memory device. The second electrode has a lower electrical resistance than an electrical resistance of the first electrode. The memory apparatus further includes a first interconnect structure and a second interconnect, each coupled with the first electrode.Type: ApplicationFiled: April 26, 2019Publication date: October 29, 2020Inventors: Benjamin Buford, Angeline Smith, Noriyuki Sato, Tanay Gosavi, Kaan Oguz, Christopher Wiegand, Kevin O'Brien, Tofizur Rahman, Gary Allen, Sasikanth Manipatruni, Emily Walker
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Publication number: 20200313076Abstract: A spin orbit memory device includes a first electrode including a beta-phase material. The spin orbit memory device further includes a material layer stack on a portion of the first electrode. The material layer stack includes a first layer on the first electrode, where the first layer includes a bcc material such as molybdenum. The material layer stack further includes layers of a perpendicular magnetic tunnel junction (pMTJ) device on the first layer. The pMTJ device includes a free magnet structure on the first layer, where the free magnet structure includes a first magnet and a second magnet on the first magnet. The pMTJ device further includes a fixed magnet above the free magnet structure and a tunnel barrier layer between the magnet structure and the third magnet and a second electrode coupled with the second magnet.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Applicant: Intel CorporationInventors: Kaan OGUZ, Christopher WIEGAND, Noriyuki SATO, Angeline SMITH, Tanay GOSAVI
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Publication number: 20200313084Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode and a magnetic junction directly on the conductive layer. The magnetic junction further includes a pinning structure above the conductive layer, a fixed magnet above the pinning structure, a tunnel barrier on the fixed magnet, a free magnet on the tunnel barrier layer and a second electrode above the free magnet. The conductive layer including iridium and the pinning structure including iridium provide switching efficiency.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Applicant: Intel CorporationInventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Michael Robinson, Huiying Liu
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Publication number: 20200313075Abstract: A memory device includes a first electrode including a spin-orbit material, a magnetic junction on a portion of the first electrode and a first structure including a dielectric on a portion of the first electrode. The first structure has a first sidewall and a second sidewall opposite to the first sidewall. The memory device further includes a second structure on a portion of the first electrode, where the second structure has a sidewall adjacent to the second sidewall of the first structure. The memory device further includes a first conductive interconnect above and coupled with each of the magnetic junction and the second structure and a second conductive interconnect below and coupled with the first electrode, where the second conductive interconnect is laterally distant from the magnetic junction and the second structure.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Applicant: Intel CorporationInventors: Noriyuki SATO, Angeline SMITH, Tanay GOSAVI, Sasikanth MANIPATRUNI, Kaan OGUZ, Kevin O'Brien, Benjamin BUFORD, Tofizur RAHMAN, Rohan PATIL, Nafees KABIR, Michael CHRISTENSON, Ian YOUNG, Hui Jae YOO, Christopher WIEGAND
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Publication number: 20200312908Abstract: A spin orbit memory device includes a material layer stack on a spin orbit electrode. The material layer stack includes a magnetic tunnel junction (MTJ) and a synthetic antiferromagnetic (SAF) structure on the MTJ. The SAF structure includes a first magnet structure and a second magnet structure separated by an antiferromagnetic coupling layer. The first magnet structure includes a first magnet and a second magnet separated by a single layer of a non-magnetic material such as platinum. The second magnet structure includes a stack of bilayers, where each bilayer includes a layer of platinum on a layer of a magnetic material such.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Applicant: Intel CorporationInventors: Kaan OGUZ, Christopher WIEGAND, Noriyuki SATO, Angeline SMITH, Tanay GOSAVI
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Publication number: 20200313074Abstract: A memory device includes a first electrode, a second electrode and a magnetic junction between the first and the second electrode. The magnetic junction includes a first magnetic structure that includes a first magnet including an alloy of cobalt and tungsten, and a second magnet above the first magnet. The first and the second magnets are separated by a non-magnetic spacer layer. The magnetic junction further includes a layer including a metal and oxygen on the first magnetic structure. The tunnel barrier layer has an <001> crystal texture. The magnetic junction further includes a third magnet on the tunnel barrier layer. The third magnet has a magnetization which can change in response to torque from a current tunneling through the tunnel barrier layer.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Applicant: Intel CorporationInventors: Angeline Smith, Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Andrew Smith, James Pellegren
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Publication number: 20200312907Abstract: A memory device includes a first electrode, a conductive layer including iridium above the first electrode, a magnetic junction on the conductive layer and a second electrode above the magnetic junction. The magnetic junction includes a magnetic structure including a first magnetic layer including cobalt, a non-magnetic layer including platinum or tungsten on the first magnetic layer and a second magnetic layer including cobalt on the non-magnetic layer. The magnetic junction further includes an anti-ferromagnetic layer on the magnet structure, a fixed magnet above the anti-ferromagnetic layer, a free magnet above the fixed magnet and a tunnel barrier between the fixed magnet and the free magnet.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Applicant: Intel CorporationInventors: Daniel Ouellette, Christopher Wiegand, Justin Brockman, Tofizur Rahman, Oleg Golonzka, Angeline Smith, Andrew Smith, James Pellegren, Aaron Littlejohn, Michael Robinson, Huiying Liu
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Publication number: 20200303623Abstract: An apparatus includes a first interconnect structure above a substrate, a memory device above and coupled with the first interconnect structure in a memory region. The memory device includes a non-volatile memory element, an electrode on the non-volatile memory element, and a metallization structure on a portion of the electrode. The apparatus further includes a second interconnect structure in a logic region above the substrate, where the second interconnect structure is laterally distant from the first interconnect structure. The logic region further includes a second metallization structure coupled to the second interconnect structure and a conductive structure between the second metallization structure and the second interconnect structure. The apparatus further includes a dielectric spacer that extends from the memory device to the conductive structure.Type: ApplicationFiled: March 19, 2019Publication date: September 24, 2020Applicant: Intel CorporationInventors: Christopher WIEGAND, Gokul MALYAVANATHAM, Oleg GOLONZKA
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Publication number: 20200227104Abstract: A perpendicular spin orbit torque memory device includes a first electrode having tungsten and at least one of nitrogen or oxygen and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first magnet, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.Type: ApplicationFiled: January 11, 2019Publication date: July 16, 2020Applicant: Intel CorporationInventors: Tofizur Rahman, James Pellegren, Angeline Smith, Christopher Wiegand, Noriyuki Sato, Tanay Gosavi, Sasikanth Manipatruni, Kaan Oguz, Kevin O'Brien, Benjamin Buford, Ian Young
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Publication number: 20200227474Abstract: A perpendicular spin orbit memory device includes a first electrode having a magnetic material and platinum and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first electrode, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.Type: ApplicationFiled: January 11, 2019Publication date: July 16, 2020Inventors: Kevin O'Brien, Christopher Wiegand, Tofizur Rahman, Noriyuki Sato, Gary Allen, James Pellegren, Angeline Smith, Tanay Gosavi, Sasikanth Manipatruni, Kaan Oguz, Benjamin Buford, Ian Young
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Publication number: 20200105998Abstract: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit coupling material and a perpendicular magnetic tunnel junction (pMTJ) device on a portion of the electrode. The pMTJ device includes a free magnet, a fixed magnet and a tunnel barrier layer in between, where at least one of the fixed magnet or the free magnet includes two magnetic layers and a spacer layer comprising tungsten in between.Type: ApplicationFiled: September 27, 2018Publication date: April 2, 2020Applicant: Intel CorporationInventors: Angeline SMITH, Sasikanth MANIPATRUNI, Christopher WIEGAND, Tofizur RAHMAN, Noriyuki SATO, Benjamin BUFORD
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Publication number: 20200105324Abstract: A magnetic tunnel junction (MTJ) for use in a magnetic spin orbit torque random access memory device (SOT MRAM) is described. Magnetic tunnel junctions described herein include a multi-magnet free layer over a spin orbit torque electrode. The multi-magnet free layer includes at least three sub-layers: a first magnetic sub-layer in direct contact with the SOT electrode having a first magnetic stability, a second magnetic sub-layer having a second magnetic stability greater than the first magnetic stability, and a magnetic coupling layer between the first and second sub-layers.Type: ApplicationFiled: September 27, 2018Publication date: April 2, 2020Applicant: INTEL CORPORATIONInventors: Angeline Smith, Sasikanth Manipatruni, MD Tofizur Rahman, Noriyuki Sato, Tanay Gasovi, Christopher Wiegand, Ian Young