Patents by Inventor Chuan Huang
Chuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240143651Abstract: The present disclosure relates to the field of image definition recognition, and discloses a logging image definition recognition method and device, medium and electronic equipment. The method comprises: establishing a logging image sample library comprising a plurality of logging images; acquiring actual definition information corresponding to the respective logging images; acquiring a plurality of definitions corresponding to the respective logging images; determining target weights corresponding to the respective target image definition determination algorithms according to the plurality of definitions and the actual definition information corresponding to the respective logging images; and determining a definition of a target logging image by the respective target image definition determination algorithms and the target weights corresponding to the respective target image definition determination algorithms.Type: ApplicationFiled: October 19, 2021Publication date: May 2, 2024Applicant: China Oilfield Services Ltd.Inventors: Lin Huang, Shusheng Guo, Zhenxue Hou, Chuan Fan, Danian Xu, Da Sheng, Wei Long, Guohua Zhang, Jiajie Cheng, Dong Li, Zhang Zhang, Lu Yin, Chaohua Zhang, Guibin Zhang
-
Publication number: 20240147661Abstract: A zoned heat dissipation control system for a water cooling radiator and a water cooling heat dissipation system having the zoned heat dissipation control system includes a plurality of fans, a plurality of heat dissipation zones defined on the water cooling radiator, a thermal detector, and a control unit. At least one of the fans is disposed within each of the heat dissipation zones. The thermal detector is disposed within at least one of the heat dissipation zones and configured to detect the temperature of the water cooling radiator. The control unit is electrically connected to the fans and the thermal detector and configured to modulate the rotational speed of the fan within each of the heat dissipation zones based on the detected data from the thermal detector.Type: ApplicationFiled: October 31, 2023Publication date: May 2, 2024Inventors: SHUN-CHIH HUANG, TAI-CHUAN MAO, PO-SHENG CHIU, WEI-EN SHIH, CHIH-CHIA LIN
-
Publication number: 20240145338Abstract: A heat sink and an electronic device are provided. The electronic device includes a circuit board and a heat sink. The circuit board has a heat source, and the heat sink contacts the heat source to dissipate the heat. The heat sink includes a heat dissipating plate and a cover plate. The heat dissipating plate has an inlet region, an outlet region and a vaporization region between the inlet region and the outlet region. The vaporization region is disposed corresponding to the heat source. The cover plate covers on the heat dissipating plate, and a space between the cover plate and the heat dissipating plate forms a channel with an inlet and an outlet. A cooling liquid flows into the channel from the inlet, is vaporized to a gas while passing through the vaporization region, and the vaporized gas dissipates outside the channel through the outlet.Type: ApplicationFiled: August 24, 2023Publication date: May 2, 2024Applicant: Giga Computing Technology Co., Ltd.Inventors: Jian-Hung Lin, Ching-Chuan Huang, Nobuhiro Adachi
-
Publication number: 20240134107Abstract: A light source device includes a light guide plate, an optical adhesive, and a light source element. The light guide plate includes a light guide substrate and an enhancement layer. The light guide substrate has a light incident surface, a first surface, and a second surface. The first surface is opposite to the second surface, and the light incident surface extends between the first surface and the second surface. The enhancement layer is disposed on the light guide substrate. A thickness of the enhancement layer is from 1 micrometer to 25 micrometers and a first refractive index of the light guide substrate is greater than a second refractive index of the enhancement layer. The optical adhesive is interposed between the first surface of the light guide substrate and the optical adhesive. The light source element is disposed beside the light incident surface to emit light toward the light incident surface.Type: ApplicationFiled: June 26, 2023Publication date: April 25, 2024Applicant: E Ink Holdings Inc.Inventors: Hsin-Tao Huang, Yu-Chuan Wen, Jen-Pin Yu, Ching-Huan Liao, Ya-Chin Chang
-
Publication number: 20240132078Abstract: A driving model training method, a driver identification method, an apparatus, a device and a medium are provided. The training method comprises: acquiring training behavior data of a user wherein the training behavior data are associated with a user identifier; acquiring training driving data associated with the user identifier based on the training behavior data; acquiring positive and negative samples from the training driving data based on the user identifier, and dividing the positive and negative samples into a training set and a test set; training the training set using a bagging algorithm, and acquiring an original driving model; testing the original driving model using the test set, and acquiring a target driving model. The training method effectively enhances generalization of the driving model, solves the problem of poor identification results of the existing driving identification model, and improves the accuracy rate of identifying driving of drivers.Type: ApplicationFiled: December 25, 2023Publication date: April 25, 2024Inventors: Xin Jin, Zhuangwei Wu, Chuan Zhang, Yuanyuan Zhao, Duxin Huang, Yongjian Liang, Li Huo
-
Patent number: 11968906Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a contact hole in the first IMD layer; forming a bottom electrode layer in the contact hole; forming a magnetic tunneling junction (MTJ) stack on the bottom electrode layer; and removing the MTJ stack and the bottom electrode layer to form a MTJ on a bottom electrode. Preferably, the bottom electrode protrudes above a top surface of the first IMD layer.Type: GrantFiled: May 25, 2020Date of Patent: April 23, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jin-Yan Chiou, Wei-Chuan Tsai, Hsin-Fu Huang, Yen-Tsai Yi, Hsiang-Wen Ke
-
Publication number: 20240120313Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
-
Publication number: 20240117451Abstract: Positive reference spiked in collected sample for use in qualitatively and quantitatively detecting viral RNA.Type: ApplicationFiled: March 10, 2021Publication date: April 11, 2024Inventors: Shuwei YANG, Liancheng HUANG, Feifei FENG, Longwen SU, Kun LIN, Can TANG, Chen LIANG, Yuanmei WANG, Yanqing CAI, Yilin PANG, Chuan SHEN, Zhixue YU
-
Publication number: 20240120317Abstract: A fan-out semiconductor device includes stacked semiconductor dies having die bond pads arranged in columns exposed at a sidewall of the stacked semiconductor dies. The stacked dies are encapsulated in a photo imageable dielectric (PID) material, which is developed to form through-hole cavities that expose the columns of bond pads of each die at the sidewall. The through-hole cavities are plated or filled with an electrical conductor to form conductive through-holes coupling die bond pads within the columns to each other.Type: ApplicationFiled: July 13, 2023Publication date: April 11, 2024Applicant: Western Digital Technologies, Inc.Inventors: Cheng-Hsiung Yang, Chien Te Chen, Cong Zhang, Ching-Chuan Hsieh, Yu-Ying Tan, Juan Zhou, Ai-wen Wang, Yih-Fran Lee, Yu-Wen Huang
-
Patent number: 11955552Abstract: A semiconductor device structure includes a source/drain feature comprising a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface. The structure also includes a dielectric layer having a continuous surface in contact with the entire second surface of the source/drain feature, a semiconductor layer having a first surface, a second surface opposing the first surface, and a sidewall connecting the first surface to the second surface, wherein the sidewall of the semiconductor layer is in contact with the sidewall of the source/drain feature. The structure also includes a gate dielectric layer in contact with the continuous surface of the dielectric layer and the second surface of the semiconductor layer, and a gate electrode layer surrounding a portion of the semiconductor layer.Type: GrantFiled: November 14, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Li-Zhen Yu, Huan-Chieh Su, Shih-Chuan Chiu, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
-
Publication number: 20240114614Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.Type: ApplicationFiled: September 29, 2022Publication date: April 4, 2024Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
-
Publication number: 20240110715Abstract: A system for detecting and cleaning indoor air pollution includes gas detection devices and filtering devices. The gas detection devices are adapted to detect a qualitative property and a concentration of an air pollution and output an air pollution data to perform an intelligent computation. The filtering devices are physical-typed or chemical-typed for filtering the air pollution. The filtering devices include one or more movable filtering devices, and the movable filtering device includes a gas detection device. After the intelligent computation is performed to locate an air pollution location, a control command is transmitted to the movable filtering device selectively and intelligently, and the movable filtering device receives the control command and is moved to the air pollution location. Therefore, the movable filtering device allows the air pollution data to approach to a non-detection state, thus a gas in the indoor space is cleaned to a safe and breathable state.Type: ApplicationFiled: January 13, 2023Publication date: April 4, 2024Inventors: Hao-Jan MOU, Chin-Chuan WU, Yung-Lung HAN, Chi-Feng HUANG
-
Patent number: 11945885Abstract: A vinyl-containing copolymer is copolymerized from (a) first compound, (b) second compound, and (c) third compound. (a) First compound is an aromatic compound having a single vinyl group. (b) Second compound is polybutadiene or polybutadiene-styrene having side vinyl groups. (c) Third compound is an acrylate compound. The vinyl-containing copolymer includes 0.003 mol/g to 0.010 mol/g of benzene ring, 0.0005 mol/g to 0.008 mol/g of vinyl group, and 1.2*10?5 mol/g to 2.4*10?4 mol/g of ester group.Type: GrantFiled: December 29, 2022Date of Patent: April 2, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Cheng-Po Kuo, Shin-Liang Kuo, Shu-Chuan Huang, Yan-Ting Jiang, Jian-Yi Hang, Wen-Sheng Chang
-
Patent number: 11949016Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.Type: GrantFiled: May 13, 2021Date of Patent: April 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Hao Lin, Chih-Chuan Yang, Chih-Hsuan Chen, Bwo-Ning Chen, Cha-Hon Chou, Hsin-Wen Su, Chih-Hsiang Huang
-
Publication number: 20240107776Abstract: An antiferroelectric field effect transistor (Anti-FeFET) of a memory cell includes an antiferroelectric layer instead of a ferroelectric layer. The antiferroelectric layer may operate based on a programmed state and an erased state in which the antiferroelectric layer is in a fully polarized alignment and a non-polarized alignment (or a random state of polarization), respectively. This enables the antiferroelectric layer in the FeFET to provide a sharper/larger voltage drop for an erase operation of the FeFET (e.g., in which the FeFET switches or transitions from the programmed state to the erased state) relative to a ferroelectric material layer that operates based on switching between two opposing fully polarized states.Type: ApplicationFiled: January 5, 2023Publication date: March 28, 2024Inventors: Chun-Chieh LU, Chih-Yu CHANG, Yu-Chuan SHIH, Huai-Ying HUANG, Yu-Ming LIN
-
Publication number: 20240096609Abstract: The physical vapor deposition tool includes a magnet component, a single cathode, and a power circuit for biasing a pedestal that supports a semiconductor substrate. During a deposition operation that deposits an inert metal material, the physical vapor deposition tool may modulate an electromagnetic field emanating from the magnet component that includes spiral-shaped bands having different ranges of magnetic strength. The physical vapor deposition tool may have an increased throughput relative to a physical vapor deposition tool without the magnet component, the single cathode, and the power circuit. Additionally, or alternatively, the inert metal material may have a grain size that is greater relative to a grain size of an inert metal material deposited using the physical vapor deposition tool without the magnet component, the single cathode, and the power circuit.Type: ApplicationFiled: January 31, 2023Publication date: March 21, 2024Inventors: Yen-Liang LIN, Yu-Kang HUANG, Yu-Chuan TAI
-
Publication number: 20240097301Abstract: The present invention discloses an integrated choke assembly comprising: a base having a main body structure, a first protruding part and a second protruding part. A first choke has a first magnetic core and a first winding, wherein the first protruding part is arranged through the first opening of the first magnetic core so that the first choke is arranged on the upper surface of the main body structure, and the first winding is wound on the first magnetic core. A second choke has a second magnetic core and a second winding, wherein the second protruding part is arranged through the second opening of the second magnetic core so that the second choke is arranged on the lower surface of the main body structure, and the second winding is wound on the second magnetic core.Type: ApplicationFiled: October 16, 2022Publication date: March 21, 2024Inventors: Pang-Chuan CHEN, Chih-Shin HUANG, Shu-Cheng LEE
-
Patent number: 11935947Abstract: An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.Type: GrantFiled: October 8, 2019Date of Patent: March 19, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
-
Publication number: 20240088795Abstract: A multi-phase regulator circuit includes one or more switching converter circuits. Each switching converter circuit includes a transformer including a primary winding and a multi-segment secondary winding, a primary side switch circuit configured to connect the primary winding to an input of the multi-phase regulator circuit, and multiple secondary side circuits including multiple coupled-inductor circuits. Each coupled-inductor circuit includes a first winding magnetically coupled to a second winding. Each segment of the transformer multi-segment secondary winding is operatively coupled to the first winding of a coupled-inductor circuit and each of the first windings is connected to an output of the multi-phase regulator circuit.Type: ApplicationFiled: September 9, 2022Publication date: March 14, 2024Inventors: Xingxuan Huang, Chuan Shi, Xinyu Liang, Jonathan Paolucci
-
Patent number: 11924995Abstract: A water cooling head with sparse and dense fins, including a main body, a first fin set and a second fin set. Wherein a chamber is formed inside the main body, the main body has a first plate and a second plate, the main body forms an inlet channel and an outlet channel, so that the cooling water passes through the chamber. The first fin set and the second fin set are arranged in the chamber, and the first fin set and the second fin set are connected to the first plate respectively. The first fin set comprises several first fins spaced apart, the first fins divide the chamber to form several first channels. The second fin set comprises several second fins spaced apart, the second fins divide the chamber to form several second channels. The water cooling head can increase the overall heat sinking efficiency.Type: GrantFiled: April 23, 2021Date of Patent: March 5, 2024Inventors: Chi-Chuan Wang, Cheng-Chen Cheng, Chuan-Chan Huang, Jen-Chieh Huang