Abstract: A network managing device for handling a data flow comprises a topology generating module, for generating a topology of at least one device of a network, and for determining at least one intelligent electric device (IED) of the at least one device according to the topology; a transmitting module, coupled to the topology generating module, for transmitting a request to a reception-transmission device, wherein the request is for requesting a substation information associated with the at least one IED; a receiving module, coupled to the transmitting module, for receiving the substation information from the reception-transmission device; a shortest path generating module, coupled to the receiving module, for generating a first shortest path of the at least one IED according to the substation information; and a data flow processing module, coupled to the shortest path generating module, for generating a data flow according to the first shortest path.

Abstract: A fan module includes a fan, a fan frame, a pair of quick release brackets, and a connector set. The fan frame has a bottom wall and sidewalls surrounding the bottom wall to form an accommodating space. The fan is suitable for being placed in the accommodating space. The quick release brackets are assembled at two opposite sides of the fan. The connector set includes first and second connectors. The first connector is fixed at one of the quick release brackets. The second connector is fixed at the fan frame. When the fan is placed at the accommodating space, the first connector and the second connector are inserted into each other, and an orthographic projection of the first connector at the bottom wall of the fan frame falls within a range of an orthographic projection of the quick release bracket at the bottom wall of the fan frame.

Abstract: An energy storage system and a control method thereof are provided. The control method includes steps of: (a) providing an energy storage system including N energy storage modules; (b) obtaining a first sequence and a second sequence by sorting the N energy storage units based on the quantity of electricity in descending order and ascending order respectively; (c) determining a required power of the power grid according to a grid frequency; (d) when the required power is positive, controlling first X energy storage units in the first sequence to discharge for collectively providing an electrical energy, having same magnitude with the required power, to the power grid; and (e) when the required power is negative, controlling first Y energy storage units in the second sequence to collectively receive an electrical energy, having same magnitude with the required power, from the power grid for charging.

Abstract: A semiconductor device includes a FEOL structure and a BEOL structure. The BEOL structure is formed over the FEOL structure and includes a conductive layer, an etching stop layer (ESL) structure, a through via and a barrier layer. The ESL structure is formed over the conductive layer and has a first recess and a lateral surface. The through via passes through the ESL structure to form the first recess and the lateral surface. The barrier layer covers the lateral surface and the first recess. The first recess is recessed with respect to the lateral surface, and the first recess has a first depth ranging between 1 nm and 7 nm.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

Abstract: A semiconductor manufacturing apparatus for performing a process is disclosed. An apparatus includes a chamber configured to receive a wafer for an etching process; a conductive focus ring disposed within the chamber and configured to focus an electric field to control an etch direction of the etching process; and an insulative cover ring disposed within the chamber, wherein the insulative cover ring is configured to modify the electric field, wherein the insulative cover ring has an inner annular insulative portion and outer annular insulative portion, and wherein a gap is defined between the inner annular insulative portion and the outer annular insulative portion.

Abstract: A method includes forming a first etch stop layer (ESL) over a conductive feature, forming a first dielectric layer on the first ESL, forming a second ESL on the first dielectric layer, forming a second dielectric layer on the second ESL, forming a trench in the second dielectric layer, forming a first opening in a bottom surface of the trench extending through the second dielectric layer, and forming a second opening in a bottom surface of the first opening. The second opening extends through the first dielectric layer and the first ESL. The second opening exposes a top surface of the conductive feature. The method further includes widening the first opening to a second width, filling the trench with a conductive material to form a conductive line, and filling the second opening and the first opening with the conductive material to form a conductive via.

Abstract: Disclosed is a novel and innovative class of buck-boost bidirectional inverters achieve ultra high efficiency in applications requiring converting of one or more low and variable DC voltages of one or more power sources (which may include a battery, a low-voltage DC sourse, or a set of PV soloar panels) to an AC voltage (e.g., connected to a grid) through a single-stage power conversion with step modulation.

Abstract: An LED circuit board structure includes first color LEDs, second color LEDs, third color LEDs, a carrier board, first testing wires, first connecting wires, second testing wires and second connecting wires. Each of the first testing wire is located at the carrier board and electrically connects two first color LEDs in a pixel-front-side-pattern region in parallel. The first connecting wire electrically connects two first testing wires in adjacent two pixel-front-side-pattern regions. Each of the second testing wire is located at the carrier board and electrically connects two second color LEDs in a pixel-front-side-pattern region in parallel. The second connecting wire electrically connects two second testing wires in adjacent two pixel-front-side-pattern regions.

Abstract: A protection device for a substrate container includes a container door and a limiter for pushing against and securing a substrate, a support member and an elastic connecting component for engaging and securing the container body, and an antistatic member having elasticity interference to provide an electrostatic dissipation path as electrostatic protection for the substrate. The protection device for a substrate container improves a protection effect of a substrate stored in the substrate container, and prevents hazards to a substrate caused by vibration, dust, and static electricity.

Abstract: A process includes depositing an edge fill dielectric over a first workpiece and a device disposed thereon. The edge fill dielectric is patterned so that only the edge portions remain. A second dielectric material is formed over the first workpiece, device, and edge fill dielectric. A planarization process levels the second dielectric material and the device. A bonding layer is formed thereon and a second workpiece bonded thereto by a dielectric-to-dielectric bond.

Abstract: A supporting device and a protective case for a probe card are provided. The protective case includes the supporting device, a case body, an upper cover, and plural switching members. The supporting device has plural quick-release members and plural bevel grooves. The case body has plural arrangement grooves each configured to mate with the corresponding quick-release member to fasten the supporting device to the case body. The probe card is connected with a protecting cover that includes plural fastening members fastened to the probe card. When the protecting cover and the probe card connected therewith are placed on the supporting device, the bevel grooves actuate the fastening members and thereby unfasten the fastening members from the probe card. The switching members are provided on the case body and are each lockable to a corresponding engaging member on the upper cover to lock the upper cover the case body together.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

Abstract: A manufacturing method of a light-emitting diode package structure includes the steps as follows. A substrate is provided. At least one light-emitting diode and at least one dummy plug are arranged on the substrate in an arranging step. The light-emitting diode and the dummy plug are covered by the patternable material in a coating step. A portion of the light-emitting diode and a portion of the dummy plug are exposed in a patterning step. A conductive layer is in contact with and electrically connected to the light-emitting diode and the dummy plug in a deposition step. A protective layer is formed on the conductive layer in a protective layer forming step. The substrate is separated and a light-emitting diode package structure is formed in a releasing step. A material of the conductive layer includes an indium tin oxide material or a transparent conductive material.

Abstract: A wireless communication system for performing communication and computing includes a plurality of cells configured to perform the communication between at least one user equipment and at least one network; and an Artificial Intelligence (AI) computing platform comprising a plurality of AI slices to perform the computing, wherein the plurality of cells are located in air, space, sea, or land.

Abstract: An encapsulation process method for wafer-level light-emitting diode dies is provided, in which a wafer structure having a plurality of light-emitting diode dies thereon is adhered to a temporary substrate, and by sequentially performing a laser cutting and a laser punch-through process, the light-emitting diode die turns to be conductive. Then, a transparent conductive film is sputtered thereon the die, and black matrix photoresist and quantum dot color filter are further disposed for performing a color conversion process. After that, the light-emitting diode dies are divided into package structures, and a glue removal process is used to separate the wafer structure from the temporary substrate, so that the wafer structure can be transferred to a target substrate. By employing the present invention, the conventional carrier board can be omitted, and the packaging yield of the vertical light emitting diode die packages is certainly optimized.

Abstract: An operation assistance system can collect on-site data and perform fault diagnosis analysis to provide an operational guidance for helping users to operate a subject device. In the operation assistance system, a user device is configured to observe the subject device, capture live video, and simultaneously display visual aids. The monitor device is coupled to the subject device to monitor various sensor states of the subject device to determine a fault status. The server is coupled to the user device and the monitor device, providing visual aids to the user device based on the fault status. The user device is also configured to allow the wearer to perceive the visual aids displayed as in a specific relative position in the space where the subject device is located.

Abstract: Disclosed herein is a phage-displayed single-chain variable fragment (scFv) library, which comprises a plurality of phage-displayed scFvs characterized with a specific sequence in each CDR. The present phage-displayed scFv library is useful in selecting an antibody fragment exhibiting a binding affinity and specificity to mesothelin (MSLN). Also disclosed herein are a recombinant antibody specific to MSLN, an immunoconjugate comprising the recombinant antibody, and uses thereof in treating cancers.

Abstract: A coating material includes a modified particle and a reactive compound. The modified particle includes a core, and a silane coupling agent having an epoxy group (or a double-bond) grafted onto a surface of the core. When the silane coupling agent having the epoxy group is grafted onto the surface of the core, the reactive compound includes a non-silicon multi-epoxy compound and a silicon-containing multi-epoxy compound. When the silane coupling agent having the double-bond is grafted onto the surface of the core, the reactive compound includes a multi double-bond compound.

Abstract: A composition and a method for preparing the same are provided. The method for preparing the composition includes providing a polyethylene terephthalate waste. The polyethylene terephthalate waste is subjected to a depolymerization in the presence of a catalyst and an alcoholysis agent to obtain a mixture, wherein an oxidizing atmosphere is continuously introduced into the depolymerization. The mixture is subjected to a solid-liquid separation to obtain a solid. The solid is subjected to a purification to obtain the composition.