Patents by Inventor Chuan Jin
Chuan Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240089857Abstract: A terminal device receives a reference signal from a first cell, where time domain resources occupied by the reference signal are fewer than total time domain resources occupied by a synchronization signal block (SSB) of the first cell and system information (SI) of the first cell. The terminal device sends a wake-up signal (WUS) to the first cell, where the wake-up signal is used to wake up the first cell to send the SSB and/or the SI. In this way, the terminal device can quickly access the cell, to reduce a delay of accessing the cell by the terminal device, and improve communication performance. The time domain resources occupied by the reference signal are fewer than the total time domain resources occupied by the SSB of the first cell and the SI of the first cell.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Yinghao JIN, Chuan MA
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Patent number: 11543351Abstract: An all-in-one handheld machine for testing drugs in hairs comprises a handheld shell, a control mechanism, a fluorescent immune reagent card test mechanism, an identity recognition mechanism, and a control instruction input unit communicatively connected to the control mechanism are provided in the shell; a shell surface is provided with a reagent card inlet that corresponds to a reagent card socket of the test mechanism; the control mechanism is controllably connected to the test mechanism and the identity recognition mechanism, and is communicatively connected with a communication unit; the control mechanism, the test mechanism and the identity recognition mechanism are all electrically connected to a power supply module. The invention can achieve the functions of identity card reading and wireless data transmission, and the test for trace drug residues in hairs, thereby meeting the requirements for rapidity, portability and accuracy of an on-site test.Type: GrantFiled: June 26, 2020Date of Patent: January 3, 2023Assignees: Beijing Zhong-Tianfeng Security Protection Technologies Co., Ltd., First Research Institute of The Ministry of Public Security of PRCInventors: Bin Li, Qing Wang, Jun Han, Chuan Jin, Minnan Zhang
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Publication number: 20210025822Abstract: An all-in-one handheld machine for testing drugs in hairs comprises a handheld shell, a control mechanism, a fluorescent immune reagent card test mechanism, an identity recognition mechanism, and a control instruction input unit communicatively connected to the control mechanism are provided in the shell; a shell surface is provided with a reagent card inlet that corresponds to a reagent card socket of the test mechanism; the control mechanism is controllably connected to the test mechanism and the identity recognition mechanism, and is communicatively connected with a communication unit; the control mechanism, the test mechanism and the identity recognition mechanism are all electrically connected to a power supply module. The invention can achieve the functions of identity card reading and wireless data transmission, and the test for trace drug residues in hairs, thereby meeting the requirements for rapidity, portability and accuracy of an on-site test.Type: ApplicationFiled: June 26, 2020Publication date: January 28, 2021Applicants: Beijing Zhong-Tianfeng Security Protection Technologies Co., Ltd., First Research Institute of The Ministry of Public Security of PRCInventors: Bin Li, Qing Wang, Jun Han, Chuan Jin, Minnan Zhang
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Patent number: 10818829Abstract: A flip-chip light-emitting module includes a main circuit board, a heat dissipation substrate, a package assembly, and a light-emitting chip. The package assembly includes a frame surrounding the heat dissipation substrate and a lens unit disposed in the frame. The frame includes a first conductive path and at least two second conductive paths separated from each other, and the first conductive path and the second conductive paths are electrically connected to the main circuit board. The light-emitting chip is disposed on a heat dissipation substrate including a top conductive contact and a light-emitting surface on the same side of the light-emitting chip. The top conductive contact is electrically connected to the first conductive path through a conductor. The lens unit is provided with at least one light-transmitting conductive layer electrically connected to the at least two second conductive paths.Type: GrantFiled: February 26, 2019Date of Patent: October 27, 2020Assignee: AZUREWAVE TECHNOLOGIES, INC.Inventor: Chuan Jin
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Publication number: 20200185582Abstract: A flip-chip light-emitting module includes a main circuit board, a heat dissipation substrate, a package assembly, and a light-emitting chip. The package assembly includes a frame surrounding the heat dissipation substrate and a lens unit disposed in the frame. The frame includes a first conductive path and at least two second conductive paths separated from each other, and the first conductive path and the second conductive paths are electrically connected to the main circuit board. The light-emitting chip is disposed on a heat dissipation substrate including a top conductive contact and a light-emitting surface on the same side of the light-emitting chip. The top conductive contact is electrically connected to the first conductive path through a conductor. The lens unit is provided with at least one light-transmitting conductive layer electrically connected to the at least two second conductive paths.Type: ApplicationFiled: February 26, 2019Publication date: June 11, 2020Inventor: Chuan Jin
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Publication number: 20200185350Abstract: The present invention provides an image capturing module and a portable electronic device. An image capturing module includes a circuit substrate, an image sensing chip, a filter element, and a lens assembly. The circuit substrate has an upper surface, a lower surface, and a through opening. The image sensing chip is placed on the lower surface of the circuit substrate and below the through opening. The filter element is placed on the upper surface of the circuit substrate and above the through opening. The lens assembly includes a holding structure and a lens structure. The lower surface of the circuit substrate includes a first solder area, a second solder area, and a first solderless area. The upper surface of the image sensing chip includes an image sensing area, a first conductive area, a second conductive area, and a first non-conductive area.Type: ApplicationFiled: February 26, 2019Publication date: June 11, 2020Inventor: Chuan Jin
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Publication number: 20200185447Abstract: The present invention provides an image capturing module and a portable electronic device, including a circuit substrate, an image sensing chip, a filter element, and a lens assembly. The upper surface of the circuit substrate includes a chip placing area, a first solder area, and a second solder area. The upper surface of the image sensing chip includes an image sensing area, a carrier area, a first conductive area, and a second conductive area, and the carrier area surrounds the image sensing area. The lower surface of the filter element has a light transmitting area and a connecting area surrounding the light transmitting area. The first conductive area and the second conductive area of the image sensing chip are electrically and respectively connected to the first solder area and the second solder area of the circuit substrate.Type: ApplicationFiled: February 26, 2019Publication date: June 11, 2020Inventor: CHUAN JIN
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Patent number: 10658414Abstract: The present invention provides an image capturing module and a portable electronic device, including a circuit substrate, an image sensing chip, a filter element, and a lens assembly. The upper surface of the circuit substrate includes a chip placing area, a first solder area, and a second solder area. The upper surface of the image sensing chip includes an image sensing area, a carrier area, a first conductive area, and a second conductive area, and the carrier area surrounds the image sensing area. The lower surface of the filter element has a light transmitting area and a connecting area surrounding the light transmitting area. The first conductive area and the second conductive area of the image sensing chip are electrically and respectively connected to the first solder area and the second solder area of the circuit substrate.Type: GrantFiled: February 26, 2019Date of Patent: May 19, 2020Assignee: AZUREWAVE TECHNOLOGIES, INC.Inventor: Chuan Jin
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Patent number: 10388541Abstract: A wafer coating system includes a wafer chuck, a flowing insulating material sprayer and a wafer tilting lifting pin. The wafer chuck has a carrier part and a rotating part, which the carrier part is mounted on the rotating part to carry a wafer, and the rotating part is configured to rotate with a predetermined axis. The flowing insulating material sprayer is above the wafer chuck and configured to spray a flowing insulating material to the wafer, and the wafer tilting lifting pin is configured to form a first acute angle between the wafer and direction of gravity.Type: GrantFiled: April 13, 2016Date of Patent: August 20, 2019Assignee: XINTEC INC.Inventors: Yu-Tung Chen, Quan-Qun Su, Chuan-Jin Shiu, Chien-Hui Chen, Hsiao-Lan Yeh, Yen-Shih Ho
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Publication number: 20190209615Abstract: T-cells useful in T-cell immunotherapy comprise a CAR, TCR and/or nucleic acid sequence(s) encoding a CAR and/or a TCR. The T-cells also comprise HP-NAP, an immunological equivalent fragment thereof and/or nucleic acid sequence(s) encoding HAP-NAP and/or an immunological equivalent fragment thereof. The T-cells have improved effects in immunotherapy including improved cytotoxicity, stimulation of chemokine and cytokine secretion, promoting dendritic cell maturation and recruitment and activation of innate immune cells.Type: ApplicationFiled: September 15, 2016Publication date: July 11, 2019Inventors: Di YU, Magnus ESSAND, Chuan JIN, Mohanraj RAMACHANDRAN, Jing MA
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Patent number: 9613904Abstract: A semiconductor structure includes a first substrate, a second substrate, a dam layer, a photoresist layer, and a conductive layer. The first substrate has a conductive pad. The second substrate has a through via, a sidewall surface surrounding the through via, a first surface, and a second surface opposite to the first surface. The through via penetrates through the first and second surfaces. The conductive pad is aligned with the through via. The dam layer is located between the first substrate and the second surface. The dam layer protrudes toward the through via. The photoresist layer is located on the first surface, the sidewall surface, the dam layer protruding toward the through via, and between the conductive pad and the dam layer protruding toward the through via. The conductive layer is located on the photoresist layer and the conductive pad.Type: GrantFiled: April 27, 2016Date of Patent: April 4, 2017Assignee: XINTEC INC.Inventors: Yu-Tung Chen, Chien-Min Lin, Chuan-Jin Shiu, Chih-Wei Ho, Yen-Shih Ho
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Publication number: 20160329283Abstract: A semiconductor structure includes a first substrate, a second substrate, a dam layer, a photoresist layer, and a conductive layer. The first substrate has a conductive pad. The second substrate has a through via, a sidewall surface surrounding the through via, a first surface, and a second surface opposite to the first surface. The through via penetrates through the first and second surfaces. The conductive pad is aligned with the through via. The dam layer is located between the first substrate and the second surface. The dam layer protrudes toward the through via. The photoresist layer is located on the first surface, the sidewall surface, the dam layer protruding toward the through via, and between the conductive pad and the dam layer protruding toward the through via. The conductive layer is located on the photoresist layer and the conductive pad.Type: ApplicationFiled: April 27, 2016Publication date: November 10, 2016Inventors: Yu-Tung CHEN, Chien-Min LIN, Chuan-Jin SHIU, Chih-Wei HO, Yen-Shih HO
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Publication number: 20160307779Abstract: A wafer coating system includes a wafer chuck, a flowing insulating material sprayer and a wafer tilting lifting pin. The wafer chuck has a carrier part and a rotating part, which the carrier part is mounted on the rotating part to carry a wafer, and the rotating part is configured to rotate with a predetermined axis. The flowing insulating material sprayer is above the wafer chuck and configured to spray a flowing insulating material to the wafer, and the wafer tilting lifting pin is configured to form a first acute angle between the wafer and direction of gravity.Type: ApplicationFiled: April 13, 2016Publication date: October 20, 2016Inventors: Yu-Tung CHEN, Quan-Qun SU, Chuan-Jin SHIU, Chien-Hui CHEN, Hsiao-Lan YEH, Yen-Shih HO
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Patent number: 9230927Abstract: A method of fabricating a wafer-level chip package is provided. First, a wafer with two adjacent chips is provided, the wafer having an upper surface and a lower surface, and one side of each chip includes a conducting pad on the lower surface. A recess and an isolation layer extend from the upper surface to the lower surface, which the recess exposes the conducting pad. A part of the isolation layer is disposed in the recess with an opening to expose the conducting pad. A conductive layer is formed on the isolation layer and the conductive pad, and a photo-resist layer is spray coated on the conductive layer. The photo-resist layer is exposed and developed to expose the conductive layer, and the conductive layer is etched to form a redistribution layer. After stripping the photo-resist layer, a solder layer is formed on the isolation layer and the redistribution layer.Type: GrantFiled: October 7, 2014Date of Patent: January 5, 2016Assignee: XINTEC INC.Inventors: Chuan-Jin Shiu, Tsang-Yu Liu, Chih-Wei Ho, Shih-Hsing Chan, Ching-Jui Chuang
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Publication number: 20150154623Abstract: An advocate and reward process is dedicated to mobile users. The process includes the following steps: a consumer posts an advocate on the Electronic Menu and Reward (EMR) Bank for an ordered product or service; the consumer earns certain value of reward points based on the influence level of the advocate. The customer can redeem the reward points in his account when the reward points reach a certain level. Meanwhile, the merchant pays the same value reward points and a transaction fee to the EMR Bank. A customer can be linked to the EMR Bank system from smartphone applications, such as the On Location Master Menu (OLMM).Type: ApplicationFiled: May 24, 2013Publication date: June 4, 2015Inventor: Yan Chuan Jin
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Publication number: 20150099357Abstract: A method of fabricating a wafer-level chip package is provided. First, a wafer with two adjacent chips is provided, the wafer having an upper surface and a lower surface, and one side of each chip includes a conducting pad on the lower surface. A recess and an isolation layer extend from the upper surface to the lower surface, which the recess exposes the conducting pad. A part of the isolation layer is disposed in the recess with an opening to expose the conducting pad. A conductive layer is formed on the isolation layer and the conductive pad, and a photo-resist layer is spray coated on the conductive layer. The photo-resist layer is exposed and developed to expose the conductive layer, and the conductive layer is etched to form a redistribution layer. After stripping the photo-resist layer, a solder layer is formed on the isolation layer and the redistribution layer.Type: ApplicationFiled: October 7, 2014Publication date: April 9, 2015Inventors: Chuan-Jin SHIU, Tsang-Yu LIU, Chih-Wei HO, Shih-Hsing CHAN, Ching-Jui CHUANG
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Patent number: 8900913Abstract: An embodiment of the invention provides a method for forming a chip package which includes: providing a substrate having a first surface and a second surface, wherein at least one optoelectronic device is formed in the substrate; forming an insulating layer on the substrate; forming a conducting layer on the insulating layer on the substrate, wherein the conducting layer is electrically connected to the at least one optoelectronic device; and spraying a solution of light shielding material on the second surface of the substrate to form a light shielding layer on the second surface of the substrate.Type: GrantFiled: August 17, 2012Date of Patent: December 2, 2014Inventors: Chuan-Jin Shiu, Po-Shen Lin, Shen-Yuan Mao, Cheng-Chi Peng
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Patent number: 8890191Abstract: An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device formed in the substrate; a conducting layer disposed on the substrate, wherein the conducting layer is electrically connected to the optoelectronic device; an insulating layer disposed between the substrate and the conducting layer; a light shielding layer disposed on the second surface of the substrate and directly contacting with the conducting layer, wherein the light shielding layer has a light shielding rate of more than about 80% and has at least an opening exposing the conducting layer; and a conducting bump disposed in the opening of the light shielding layer to electrically contact with the conducting layer, wherein all together the light shielding layer and the conducting bump substantially and completely cover the second surface of the substrate.Type: GrantFiled: June 28, 2012Date of Patent: November 18, 2014Inventors: Chuan-Jin Shiu, Po-Shen Lin, Yi-Ming Chang
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Patent number: 8836134Abstract: A method of fabricating a semiconductor stacked package is provided. A singulation process is performed on a wafer and a substrate, on which the wafer is stacked. A portion of the wafer on a cutting region is removed, to form a stress concentrated region on an edge of a chip of the wafer. The wafer and the substrate are then cut, and a stress is forced to be concentrated on the edge of the chip of the wafer. As a result, the edge of the chip is warpaged. Therefore, the stress is prevented from extending to the inside of the chip. A semiconductor stacked package is also provided.Type: GrantFiled: January 10, 2013Date of Patent: September 16, 2014Assignee: Xintec Inc.Inventors: Po-Shen Lin, Chuan-Jin Shiu, Bing-Siang Chen, Chen-Han Chiang, Chien-Hui Chen, Hsi-Chien Lin, Yen-Shih Ho
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Patent number: D932690Type: GrantFiled: December 24, 2019Date of Patent: October 5, 2021Inventors: Chuan Jin, Yumi Yamaguchi