Patents by Inventor Chuan Ling

Chuan Ling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10909948
    Abstract: A ubiquitous auto calibration device is provided, which includes microcontroller unit, flex bus, image receiver image processing module, and an image output unit. The microcontroller unit is provided for receiving the electronic signal and performing a self-adjusting process to the electronic signal. The flex bus is connected with the microcontroller unit, and is provided for transmitting the electronic signal to the image processing module after performing the self-adjusting process. The image receiver is provided for receiving the image signal from the image receiving interface. The image processing module is provided for performing an image calibration process to the image signal, so that the image signal can obey the color temperature standard, Gamma value, uniformity and color gamut standards when the panel outputs the image signal.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: February 2, 2021
    Assignee: Diva Laboratories, Ltd.
    Inventors: Chih-An Chen, Wei-Peng Wang, Ching-Min Huang, Tzu-Hui Lee, Chuan-Ling Peng, Chi-Chou Huang, Huei-Jiun Li, Mei-Chuan Ku
  • Publication number: 20200365113
    Abstract: A ubiquitous auto calibration device is provided, which includes microcontroller unit, flex bus, image receiver image processing module, and an image output unit. The microcontroller unit is provided for receiving the electronic signal and performing a self-adjusting process to the electronic signal. The flex bus is connected with the microcontroller unit, and is provided for transmitting the electronic signal to the image processing module after performing the self-adjusting process. The image receiver is provided for receiving the image signal from the image receiving interface. The image processing module is provided for performing an image calibration process to the image signal, so that the image signal can obey the color temperature standard, Gamma value, uniformity and color gamut standards when the panel outputs the image signal.
    Type: Application
    Filed: August 30, 2019
    Publication date: November 19, 2020
    Inventors: Chih-An CHEN, Wei-Peng WANG, Ching-Min HUANG, Tzu-Hui LEE, Chuan-Ling PENG, Chi-Chou HUANG, Huei-Jiun LI, Mei-Chuan KU
  • Patent number: 10835105
    Abstract: A display correction system applied for an endoscope is provided which includes a color checker, a light-shielding tank, an endoscope has a lens that is sleeved in the light shielding tank and the lens is disposed toward the view window, the lens of the light-shielding tank is sequentially aligned the color block of the color checker through the view window to capture the image of the color block. The monitor has a captured image window which is provided for displaying the image of the color that is captured by the endoscope. The display correction device is provided for correcting the image signal from the color block that is transmitted by the endoscope, such that the image is displayed on the monitor is corresponding to the image of the electrical signal, and the color of the image on the monitor is the same as the true color of the color block.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: November 17, 2020
    Assignee: Diva Laboratories, Ltd.
    Inventors: Ching-Min Huang, Chuan-Ling Peng
  • Patent number: 10614746
    Abstract: An automatic gamma curve setting method for the display is provided, which can automatically detect the input image as a grayscale image or a color image, and classify the input image as a grayscale image or a color image according to the image value, and automatically perform the corresponding Gamma curve to provide a diagnostic platform for the user to make a correct judgment through the correct image presentation.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: April 7, 2020
    Assignee: DIVA LABORATORIES, LTD.
    Inventor: Chuan-Ling Peng
  • Publication number: 20200051487
    Abstract: An automatic gamma curve setting method for the display is provided, which can automatically detect the input image as a grayscale image or a color image, and classify the input image as a grayscale image or a color image according to the image value, and automatically perform the corresponding Gamma curve to provide a diagnostic platform for the user to make a correct judgment through the correct image presentation.
    Type: Application
    Filed: December 4, 2018
    Publication date: February 13, 2020
    Inventor: CHUAN-LING PENG
  • Patent number: 9951410
    Abstract: An infrared surface light source generating device includes a substrate layer and a carbon material layer formed on a surface of the substrate layer and having a sheet resistance value ranged between 0.01 and 1000?/?. The carbon material layer is able to emit far infrared rays when it is heated by an amount of external low-power energy to a temperature above 36° C. A method of manufacturing the above infrared surface light source generating device is also disclosed. The method includes the steps of (A) providing a substrate layer and (B) forming a carbon material layer that is located on a surface of the substrate layer and has a sheet resistance value ranged between 0.01 and 1000?/?. Since the method involves only a simplified manufacturing process, the infrared surface light source generating device can be manufactured at reduced cost.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: April 24, 2018
    Assignees: H&H-T CO., LTD.
    Inventor: Chuan Ling Hu
  • Publication number: 20170198385
    Abstract: A manufacturing method a coating layer structure applied to a machine element includes: forming a continuous graphene structure layer on a metal substrate; and forming a coating layer on the continuous graphene structure layer for cooperatively protecting the metal substrate. The continuous graphene structure layer is disposed between the metal substrate and the coating layer to act as a buffer structure between the metal substrate and the coating layer.
    Type: Application
    Filed: June 8, 2016
    Publication date: July 13, 2017
    Inventors: YI-CHAO HUANG, CHUAN-LING HU
  • Publication number: 20160345735
    Abstract: A hanging support for hanging a panel display on a flat surface includes a mounting structure and a support structure. The support structure fixes the panel display on the mounting structure. The mounting structure is mounted on the flat surface and adjusts an angle between the panel display and the flat surface. The support structure includes a top holder, a bottom holder, and a main holder. The top holder, the bottom holder, and the main holder corporately define a clamping space to clamp two opposite edges of the display panel.
    Type: Application
    Filed: October 14, 2015
    Publication date: December 1, 2016
    Inventors: CHUN-LEI SHI, KUO-CHUAN LING, LUNG-HSING LEE, JEN-HUI OH, WEN-PIN WANG, FANG-YUAN SHYU
  • Patent number: 9349662
    Abstract: A method of fabricating integrated circuit devices is provided. The method includes forming a plurality of spaced integrated circuit dies on a semiconductor wafer and forming a dedicated test die on the semiconductor wafer adjacent the plurality of spaced integrated circuit dies, the dedicated test die including a test structure having a first width when viewed in a top view and being operable to generate wafer evaluation data. Further, the method includes forming a scribe line region interposed between the plurality of spaced integrated circuit dies, the scribe line region having a second width defined by a distance between adjacent integrated circuit dies when viewed in a top view, the second width being smaller than the first width, and the scribe line region being free of test structures.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: May 24, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuan-Ling Wu, Cheng-Hsien Chuang, Chun-Chang Chen, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20160060753
    Abstract: An infrared surface light source generating device includes a substrate layer and a carbon material layer formed on a surface of the substrate layer and having a sheet resistance value ranged between 0.01 and 1000?/?. The carbon material layer is able to emit far infrared rays when it is heated by an amount of external low-power energy to a temperature above 36° C. A method of manufacturing the above infrared surface light source generating device is also disclosed. The method includes the steps of (A) providing a substrate layer and (B) forming a carbon material layer that is located on a surface of the substrate layer and has a sheet resistance value ranged between 0.01 and 1000?/?. Since the method involves only a simplified manufacturing process, the infrared surface light source generating device can be manufactured at reduced cost.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 3, 2016
    Applicant: H&H-T CO., LTD.
    Inventor: Chuan Ling HU
  • Publication number: 20160060120
    Abstract: A method of producing reduced graphene oxide includes the steps of selecting a substrate; forming a carbon layer on a top of the substrate through sputter deposition or vapor deposition; subjecting the substrate and the carbon layer to an oxidation process at the same time for the carbon layer to form a graphene oxide layer; and subjecting the substrate and the graphene oxide layer to a reduction process at the same time to form a reduced graphene oxide layer on the substrate. With the method, low-cost, high-quality and large-area reduced graphene oxide sheet can be directly produced on different types of substrate, including metal and non-metal substrates.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 3, 2016
    Applicants: H&H-T CO., LTD.
    Inventor: Chuan Ling HU
  • Patent number: 9153620
    Abstract: A method for manufacturing the image sensor device is provided. The method includes depositing a first dielectric layer over a back surface of a substrate, forming a ridge over the first dielectric layer, depositing a second dielectric layer over the first dielectric layer, including filling in a space between two adjacent ridges. The method also includes removing the ridge to form a trench in the second dielectric layer and forming a metal grid in the trench.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: October 6, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chien Wang, Chihy-Yuan Cheng, Chuan-Ling Wu, Chun-Chang Chen, Wang-Pen Mo, Feng-Jia Shiu
  • Publication number: 20150249109
    Abstract: A method for manufacturing the image sensor device is provided. The method includes depositing a first dielectric layer over a back surface of a substrate, forming a ridge over the first dielectric layer, depositing a second dielectric layer over the first dielectric layer, including filling in a space between two adjacent ridges. The method also includes removing the ridge to form a trench in the second dielectric layer and forming a metal grid in the trench.
    Type: Application
    Filed: March 3, 2014
    Publication date: September 3, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chien Wang, Chihy-Yuan Cheng, Chuan-Ling Wu, Chun-Chang Chen, Wang-Pen Mo, Feng-Jia Shiu
  • Patent number: 8883403
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate having two different topography areas adjacent to each other. A step-forming material (SFM) is deposited over the substrate. A patterned SFM is formed in the low topography area of the two areas. The formation of the patterned SFM provides a fairly planar surface across over the substrate.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chang Chen, Shun-Shing Yang, Chuan-Ling Wu, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20140151699
    Abstract: A method of fabricating integrated circuit devices is provided. The method includes forming a plurality of spaced integrated circuit dies on a semiconductor wafer and forming a dedicated test die on the semiconductor wafer adjacent the plurality of spaced integrated circuit dies, the dedicated test die including a test structure having a first width when viewed in a top view and being operable to generate wafer evaluation data. Further, the method includes forming a scribe line region interposed between the plurality of spaced integrated circuit dies, the scribe line region having a second width defined by a distance between adjacent integrated circuit dies when viewed in a top view, the second width being smaller than the first width, and the scribe line region being free of test structures.
    Type: Application
    Filed: December 3, 2012
    Publication date: June 5, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuan-Ling Wu, Cheng-Hsien Chuang, Chun-Chang Chen, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20140080067
    Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate having two different topography areas adjacent to each other. A step-forming material (SFM) is deposited over the substrate. A patterned SFM is formed in the low topography area of the two areas. The formation of the patterned SFM provides a fairly planar surface across over the substrate.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chang Chen, Shun-Shing Yang, Chuan-Ling Wu, Wang-Pen Mo, Hung-Chang Hsieh
  • Patent number: 8663485
    Abstract: A method of manufacturing plastic metallized 3D circuit includes the steps of providing a 3D plastic main body; performing a surface pretreatment on the plastic main body; performing a metallization process on the plastic main body to deposit a thin metal film thereon; performing a photoresist coating process to form a photoresist protective layer on the thin metal film; performing an exposure and development process on the photoresist protective layer to form a patterned photoresist protective layer; performing an etching process on the exposed thin metal film to form a patterned metal circuit layer; stripping the patterned photoresist protective layer; and performing a surface treatment on the patterned metal circuit layer to form a metal protective layer. With the method, a 3D circuit pattern can be directly formed on a 3D plastic main body without providing additional circuit carrier to thereby meet the requirement for miniaturized and compact electronic devices.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: March 4, 2014
    Assignees: ICT-Lanto Limited
    Inventors: Chuan Ling Hu, Chen Lung Tsai, Yu Wei Chen, Chen Hao Chang
  • Patent number: 8608252
    Abstract: A spoke of a bicycle rim has a spoke body having a connecting end and a threaded segment formed on the connecting end. The threaded segment has multiple first thread sections and at least one second thread section. The first thread sections have a major radius, a minor radius and a pitch. The at least one second thread section is formed between the first thread sections to form at least one loosen-proofing section between the first thread sections and has a major radius, a minor radius and a pitch. The major radius of the second thread section is smaller than the major radius of the first thread sections. The minor radius of the second thread section is larger than the minor radius of the first thread sections. The pitch of the second thread section is the same as that of the first thread sections.
    Type: Grant
    Filed: December 26, 2010
    Date of Patent: December 17, 2013
    Inventor: Yi-Chuan Ling
  • Publication number: 20130302985
    Abstract: A method is described including forming a first photoresist feature and a second photoresist feature on a semiconductor substrate. A chemical material coating is formed on the semiconductor substrate. The chemical material coating interposes the first and second photoresist features. The semiconductor substrate is then rinsed; the rinsing removes the chemical material coating from the semiconductor substrate. The chemical material may mix with a residue disposed on the substrate between the first and second photoresist features. Removing the chemical material coating from the substrate may also remove the residue.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Chun-Chang Wu, Chun-Chang Chen, Chuan-Ling Wu, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20130126465
    Abstract: A method of manufacturing plastic metallized 3D circuit includes the steps of providing a 3D plastic main body; performing a surface pretreatment on the plastic main body; performing a metallization process on the plastic main body to deposit a thin metal film thereon; performing a photoresist coating process to form a photoresist protective layer on the thin metal film; performing an exposure and development process on the photoresist protective layer to form a patterned photoresist protective layer; performing an etching process on the exposed thin metal film to form a patterned metal circuit layer; stripping the patterned photoresist protective layer; and performing a surface treatment on the patterned metal circuit layer to form a metal protective layer. With the method, a 3D circuit pattern can be directly formed on a 3D plastic main body without providing additional circuit carrier to thereby meet the requirement for miniaturized and compact electronic devices.
    Type: Application
    Filed: December 30, 2011
    Publication date: May 23, 2013
    Applicants: ICT-LANTO LIMITED
    Inventors: Chuan Ling HU, Cheng Lung TSAI, Yu Wei CHEN, Chen Hao CHANG