Patents by Inventor Chuan-Ming Chang

Chuan-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200117009
    Abstract: A near-eye display apparatus is configured to be disposed in front of at least one eye of a user and includes an illumination system, a display device, and a micro-lens array. The illumination system is configured to provide an illumination beam including sub-illumination beams. The display device is located on a transmission path of the illumination beam. The sub-illumination beams form corresponding sub-illumination regions on the display device, and the display device is configured to convert the sub-illumination beams irradiating the display device and corresponding to the sub-illumination regions into sub-image beams. An exit angle of each sub-image beam emitted from the display device is less than or equal to 20 degrees. The near-eye display apparatus provided herein is capable of eliminating stray light and characterized by good quality.
    Type: Application
    Filed: October 9, 2019
    Publication date: April 16, 2020
    Applicant: Coretronic Corporation
    Inventors: Fu-Ming Chuang, Chuan-Chung Chang, Hsin-Hsiang Lo
  • Patent number: 10580477
    Abstract: A dynamic random access memory (DRAM) includes a delay lock loop (DLL), a clock tree, an off-chip driver (OCD), a phase detector (PD) and a filter. The DLL receives a reference clock and updates a delay line, and then outputs a calibrated clock via the clock tree; the PD receives the calibrated clock via the clock tree and detects a phase difference between the calibrated clock and the reference clock; and the filter activates the DLL to update the delay line according the phase difference, wherein when a READ command is received, the filter increases the number of activations for the DLL to update the delay line, thereby shortening the access time of the DRAM.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: March 3, 2020
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chuan-Jen Chang, Wen-Ming Lee
  • Publication number: 20190392890
    Abstract: A memory apparatus and an operating method thereof are provided. The memory apparatus includes a memory, a temperature sensor and a control circuit. The temperature sensor senses a temperature of the memory and generating a temperature sensing signal. The control circuit is coupled to the memory and the temperature sensor. The control circuit performs access operation on the memory and changes a frequency of the access operation with reference of a delay curve according to the temperature sensing signal.
    Type: Application
    Filed: June 26, 2018
    Publication date: December 26, 2019
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Wen-Ming Lee, Chuan-Jen Chang
  • Patent number: 10515670
    Abstract: A memory apparatus and a voltage control method of the memory apparatus are provided. The memory apparatus of the invention includes a synchronous circuit, a clock tree and a memory controller. The synchronous circuit receives a reference clock and generating a clock signal. The clock tree is coupled to an output end of the multiplexer and assigns the clock signal to a plurality of signal paths. The memory controller is coupled to the synchronous circuit and controls the synchronous circuit to adjust a frequency of the clock signal according to an operating mode of the memory apparatus.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 24, 2019
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Wen-Ming Lee, Chuan-Jen Chang
  • Publication number: 20190385648
    Abstract: A memory apparatus and a voltage control method of the memory apparatus are provided. The memory apparatus of the invention includes a synchronous circuit, a clock tree and a memory controller. The synchronous circuit receives a reference clock and generating a clock signal. The clock tree is coupled to an output end of the multiplexer and assigns the clock signal to a plurality of signal paths. The memory controller is coupled to the synchronous circuit and controls the synchronous circuit to adjust a frequency of the clock signal according to an operating mode of the memory apparatus.
    Type: Application
    Filed: June 13, 2018
    Publication date: December 19, 2019
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Wen-Ming Lee, Chuan-Jen Chang
  • Publication number: 20190378564
    Abstract: An operating method of a memory device includes the following operations: detecting a first temperature of the memory device; determining a first refresh rate according to the first temperature; and refreshing the memory array by the first refresh rate. The first refresh rate is lower than a refresh rate upper threshold.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Inventors: Chuan-Jen CHANG, Wen-Ming LEE
  • Patent number: 10504581
    Abstract: A memory apparatus and an operating method thereof are provided. The memory apparatus includes a memory, a temperature sensor and a control circuit. The temperature sensor senses a temperature of the memory and generating a temperature sensing signal. The control circuit is coupled to the memory and the temperature sensor. The control circuit performs access operation on the memory and changes a frequency of the access operation with reference of a delay curve according to the temperature sensing signal.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: December 10, 2019
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Wen-Ming Lee, Chuan-Jen Chang
  • Patent number: 10497423
    Abstract: The present disclosure provides a frequency-adjusting circuit comprising a temperature-sensing module, a computing module and a storage module. The temperature-sensing module is configured to measure temperatures of a plurality of DRAM chips. The storage module is coupled between the temperature-sensing module and the computing module, and is configured to store the temperatures of the plurality of DRAM chips. the computing module is coupled to the temperature-sensing module and is configured to compare the temperatures of the plurality of DRAM chips measured by the temperature-sensing module to determine a first temperature, to compare previous temperatures of the plurality of DRAM chips read from the storage module to determine a second temperature, and to compare the first temperature with the second temperature to determine a refresh frequency for the plurality of DRAM chips.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: December 3, 2019
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chuan-Jen Chang, Wen-Ming Lee
  • Patent number: 10491006
    Abstract: A hand-held apparatus and a method for power charging management thereof are provided. The method for power charging management includes: providing a power charging voltage and a power charging current to perform a power charging process to the hand-held apparatus, and simultaneously detecting a surface temperature of the hand-held apparatus during the power charging process; activating a power charging management mechanism when the surface temperature is higher than a reference temperature, and simultaneously reducing a voltage value of the power charging voltage; and generating a comparing result by comparing the surface temperature with a plurality of threshold temperatures after the power charging management mechanism is activated, and adjusting a current value of the power charging current based on the comparing result. The reference temperature is lower than the plurality of threshold temperatures and values of the plurality of threshold temperatures are not the same.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: November 26, 2019
    Assignee: HTC Corporation
    Inventors: Chuan-Li Wu, Chia-Ming Chang, Shih-Ping Lin
  • Publication number: 20190348108
    Abstract: The present disclosure provides a frequency-adjusting circuit comprising a temperature-sensing module, a computing module and a storage module. The temperature-sensing module is configured to measure temperatures of a plurality of DRAM chips. The storage module is coupled between the temperature-sensing module and the computing module, and is configured to store the temperatures of the plurality of DRAM chips. The computing module is coupled to the temperature-sensing module and is configured to compare the temperatures of the plurality of DRAM chips measured by the temperature-sensing module to determine a first temperature, to compare previous temperatures of the plurality of DRAM chips read from the storage module to determine a second temperature, and to compare the first temperature with the second temperature to determine a refresh frequency for the plurality of DRAM chips.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 14, 2019
    Inventors: CHUAN-JEN CHANG, WEN-MING LEE
  • Publication number: 20190348101
    Abstract: The present disclosure provides a detecting circuit. The detecting circuit includes a clock module, a clock receiver, a delay-locked loop module, a clock tree module, an off-chip driver, a pad, a phase detector, a voltage-detecting module and a control module. The clock module provides a clock signal to the clock receiver. The clock receiver sends the clock signal to the pad through the delay-locked loop module, the clock tree module and the off-chip driver. The control module is coupled to the voltage-detecting module and the delay-locked loop module. The voltage-detecting module is coupled between the control module and the clock tree module, and is configured to detect a voltage of the clock tree module and to send a voltage comparison information to the control module. The control module is configured to control a refresh frequency of the delay-locked loop module.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 14, 2019
    Inventors: CHUAN-JEN CHANG, WEN-MING LEE
  • Patent number: 10460790
    Abstract: The present disclosure provides a detecting circuit. The detecting circuit includes a clock module, a clock receiver, a delay-locked loop module, a clock tree module, an off-chip driver, a pad, a phase detector, a voltage-detecting module and a control module. The clock module provides a clock signal to the clock receiver. The clock receiver sends the clock signal to the pad through the delay-locked loop module, the clock tree module and the off-chip driver. The control module is coupled to the voltage-detecting module and the delay-locked loop module. The voltage-detecting module is coupled between the control module and the clock tree module, and is configured to detect a voltage of the clock tree module and to send a voltage comparison information to the control module. The control module is configured to control a refresh frequency of the delay-locked loop module.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: October 29, 2019
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chuan-Jen Chang, Wen-Ming Lee
  • Publication number: 20190311761
    Abstract: A dynamic random access memory (DRAM) includes a delay lock loop (DLL), a clock tree, an off-chip driver (OCD), a phase detector (PD) and a filter. The DLL receives a reference clock and updates a delay line, and then outputs a calibrated clock via the clock tree; the PD receives the calibrated clock via the clock tree and detects a phase difference between the calibrated clock and the reference clock; and the filter activates the DLL to update the delay line according the phase difference, wherein when a READ command is received, the filter increases the number of activations for the DLL to update the delay line, thereby shortening the access time of the DRAM.
    Type: Application
    Filed: April 5, 2018
    Publication date: October 10, 2019
    Applicant: Nanya Technology Corporation
    Inventors: Chuan-Jen CHANG, Wen-Ming LEE
  • Publication number: 20190250418
    Abstract: A display apparatus includes a display device and an optical element. The display device is configured to project an image beam to a first diaphragm. The optical element is disposed on the transmission path of the image beam. The optical element includes a second diaphragm, the second diaphragm is located on one side of the first diaphragm, and the first diaphragm is located between the second diaphragm and the display device. The area of the second diaphragm approximates the area of the first diaphragm. The image beam passes through the first diaphragm and the second diaphragm and is projected to a projection target.
    Type: Application
    Filed: January 28, 2019
    Publication date: August 15, 2019
    Inventors: YI-CHIEN LO, HSIN-HSIANG LO, CHUAN-CHUNG CHANG, FU-MING CHUANG
  • Publication number: 20190250456
    Abstract: A display device includes a light source, a light-directing element, a first lens, a microlens array, and a reflective display element. The light-directing element is adapted to project a lighting beam provided by the light source toward an incident direction. The first lens is configured to receive the lighting beam projected by the light-directing element and project the lighting beam toward the incident direction. The first lens is located between the microlens array and the light-directing element. The micro-image units of the reflective display element correspond to the microlenses of the microlens array respectively. Each micro-image unit converts the lighting beam into an sub-image beam and reflect the sub-image beam to the microlens array. Each sub-image beam is projected to the first lens by the corresponding microlens, and the sub-image beams pass through the light-directing element and transmit to an aperture to form an image beam.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 15, 2019
    Inventors: YI-CHIEN LO, HSIN-HSIANG LO, CHUAN-CHUNG CHANG, FU-MING CHUANG
  • Publication number: 20190250459
    Abstract: A display device includes a light source, a light-directing element, a reflective display element, and a microlens array. The light-directing element is disposed on the transmission path of a lighting beam provided by the light source for projecting the lighting beam toward the first direction. The reflective display element includes a plurality of micro-image units, wherein each micro-image unit converts the lighting beam projected from the light-directing element into an sub-image beam and reflects the sub-image beam. The microlens array is disposed on the transmission path of the sub-image beams, wherein the light-directing element is located between the microlens array and the reflective display element. The microlens array includes a plurality of microlenses. Each sub-image beam pass throughs the light-directing element and is projected to an aperture by the corresponding microlens, and the sub-image beams pass through the aperture to form an image beam.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 15, 2019
    Inventors: YI-CHIEN LO, HSIN-HSIANG LO, CHUAN-CHUNG CHANG, FU-MING CHUANG
  • Publication number: 20190210569
    Abstract: A wiper blade having a wiper strip, a primary frame and a pair of secondary frames. The primary frame may have a top side and opposite ends, a connection device capable of connecting the wiper blade to a wiper arm disposed on the top side of the primary frame, and a connection structure disposed on each of the opposite ends of the primary frame. Each secondary frame may have a central pivot connection portion and two leg portions extending from the central pivot connection portion, a pivot structure disposed on the central pivot connection portion of the secondary frames. The pivot structure may be a turn-buckle holder comprising two holder halves and a rivet wherein the rivet passes through the two holder halves and holds them together.
    Type: Application
    Filed: February 28, 2019
    Publication date: July 11, 2019
    Inventors: Vambi Raymundo Tolentino, Robert Peter Peers, Chuan-Chih Chang, Chih-Ming Yang
  • Patent number: 10310549
    Abstract: An operating method of a clock signal generating circuit includes the following operations: transmitting a clock signal to a clock tree circuit by a voltage detector; and adjusting a frequency of the clock signal according to a voltage of the clock tree circuit so as to maintain the voltage within a voltage range.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: June 4, 2019
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chuan-Jen Chang, Wen-Ming Lee
  • Publication number: 20060208364
    Abstract: The present invention provides an LED device with a flip chip structure. The LED device comprises an insulating substrate, an LED flip chip, a molding compound, a first conductive element, and a second conductive element. The LED flip chip is electrically connected to the connection pads on the insulating substrate via the two conductive elements. The P-type and N-type electrodes are connected to the P-type and N-type electrodes layers, respectively. The invention need not require a conventional wire bonding process. It not only increases the yield rate of the product but also makes the product more compact.
    Type: Application
    Filed: March 19, 2005
    Publication date: September 21, 2006
    Inventors: Chien-Jen Wang, Nai-Wen Chang, Wei-Jen Wang, Kuo-Chun Chiang, Chuan-Ming Chang
  • Patent number: 6936860
    Abstract: An LED includes an insulating substrate; a buffer layer positioned on the insulating substrate; an n+-type contact layer positioned on the buffer layer, the contact layer having a first surface and a second surface; an n-type cladding layer positioned on the first surface of the n+-type contact layer; a light-emitting layer positioned on the n-type cladding layer; a p-type cladding layer positioned on the light-emitting layer; a p-type contact layer positioned on the p-type cladding layer; an n+-type reverse-tunneling layer positioned on the p-type contact layer; a p-type transparent ohmic contact electrode positioned on the n+-type reverse-tunneling layer; and an n-type transparent ohmic contact electrode positioned on the second surface of the n+-type contact layer. The p-type transparent ohmic contact electrode and the n-type transparent ohmic contact electrode are made of the same materials.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: August 30, 2005
    Assignee: Epistar Corporation
    Inventors: Shu-Wen Sung, Chin-Fu Ku, Chia-Cheng Liu, Min-Hsun Hsieh, Chao-Nien Huang, Chen Ou, Chuan-Ming Chang