Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: The present invention relates to a novel enzyme capable of producing multi-hydroxy derivatives from polyunsaturated fatty acids and a method for producing multi-hydroxy derivatives of polyunsaturated fatty acids using the same.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: In an operating method of a radio frequency integrated circuit (RFIC) including a transmission circuit and a reception circuit, the operating method includes receiving, from a modem, first information for setting transmission power of the transmission circuit or second information about a blocker which is a frequency signal unused by the RFIC, obtaining an allowable value of phase noise of a local oscillator included in the transmission circuit, using the first information, obtaining an allowable value of phase noise of a local oscillator included in the reception circuit, using the second information, determining a level of a driving voltage, using the obtained allowable values of the phase noises, and providing the driving voltage to the local oscillators.

Abstract: An electrodeionization filter includes: a housing having a water inlet and a water outlet; a first electrode installed inside the housing in a spiral shape; a second electrode installed inside the housing in a spiral shape so as to be spaced apart from the first electrode; and an ion exchange module installed between the first electrode and the second electrode for adsorbing or desorbing ionic substances contained in water introduced by an application of electricity. At least one of the first electrode and the second electrode has a structure in which a center portion thereof is denser than a peripheral region thereof. Accordingly, the lifespan of the electrodes of the electrodeionization filter can be increased, and the assembly of the electrodes and related parts can be easily facilitated.

Abstract: A display device including: pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver configured to supply a first scan signal to each of the first scan lines at a first frequency; a second scan driver configured to supply a second scan signal to each of the second scan lines at a second frequency corresponding to a driving frequency of the pixels; an emission driver configured to supply an emission control signal to each of the emission control lines at the first frequency; a data driver configured to supply a data signal to each of the data lines at the second frequency; and a timing controller configured to control the first scan driver, the second scan driver, the emission driver, and the data driver.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A crystal oscillator including a feedback circuit, and a reference clock generating circuit including the crystal oscillator. The crystal oscillator is configured to generate an oscillating signal based on a natural frequency of a crystal. The crystal oscillator may include: a current generating circuit connected to a first node having a first voltage and a second node having a second voltage, and configured to output a first current to the second node; a feedback circuit connected to the generating circuit via the first and second nodes and configured to adjust a level of the second voltage by controlling a level of the first voltage; and a crystal circuit connected to the second node and configured to generate the oscillating signal based on the second voltage.

Abstract: A display device includes: a substrate; an active layer; a first insulating layer on the active layer; a gate electrode; a second insulating layer on the first conductive layer; a second conductive layer on the second insulating layer; a third insulating layer on the second conductive layer; and a source electrode connected to the source region of the first active pattern through a contact hole passing through the first insulating layer and the second insulating layer, and a drain electrode connected to the drain region, wherein the first active pattern, the gate electrode, the source electrode and the drain electrode constitute a thin film transistor, the display device further comprising at least one light shielding pattern around the thin film transistor, wherein the light shielding pattern includes a side light shielding pattern such that the third conductive layer passes through at least the third insulating layer.

Abstract: A display device includes: a substrate including a display area at which a pixel including a light emitting element is located and a peripheral area surrounding the display area; and a common voltage line on the substrate, the common voltage line configured to provide a common voltage to the pixel, the common voltage line including: a peripheral common voltage line on the peripheral area of the substrate to surround the display area and connected to a common electrode of the light emitting element; and a plurality of display common voltage lines crossing the display area and each contacting different portions of the peripheral common voltage line, the display common voltage lines being spaced apart from the common electrode of the light emitting element.

Abstract: The present invention relates to a non-thermal atmospheric-pressure plasma keloid treatment device and a use thereof. The non-thermal atmospheric-pressure plasma keloid treatment device according to the present invention has effects of inhibiting collagen deposition in keloid fibroblasts and mobility thereof, and thus, is expected to be greatly useful for preventing and treating keloids.

Abstract: The present invention is to provide a composition for skin soothing, which is safe from a risk of side effects, and relates to a composition for skin soothing containing a liquid-phase plasma. The liquid-phase plasma of the present invention is obtained by applying plasma as pure energy to a liquid-phase material, and can be used in the skin sensitive to a chemical material without a risk of side effects. Furthermore, the liquid-phase plasma has remarkable effects on the prevention or treatment of dermatitis or photo-aging due to ultraviolet light, and thus is expected to be greatly used in beauty care and mechanical fields.

Abstract: The present invention relates to a method of preventing or treating keloids using a liquid plasma. A liquid plasma according to the present invention is remarkably effective in inhibiting the generation and proliferation of keloids, thus being expected to be greatly utilized for the prevention and treatment of keloids.

Abstract: A method of forming a mask pattern and a method of fabricating a semiconductor device, the method of forming a mask pattern including providing a substrate including a plurality of patterns thereon; forming a mask material solution layer such that the mask material solution layer covers the patterns on the substrate; and applying a liquid material to remove an upper portion of the mask material solution layer, wherein the mask material solution layer includes a fluorine additive concentrated at the upper portion of the mask material solution layer.

Abstract: Provided is clock signal generator configured to generate a target output clock signal based on a reference clock signal, the clock signal generator includes a digital-to-time converter (DTC) configured to delay a reference clock signal based on an input code to generate a delay clock signal, and output the delay clock signal, a DTC controller configured to determine an initial gain value of the DTC based on a result of comparing at least one delay amount of the DTC with a period of a previously generated output clock signal, and generate the input code based on the initial gain value, and a phase locked loop configured to generate the target output clock signal based on the delay clock signal and a division clock signal of the previously generated output clock signal, the target output clock signal being locked to the delay clock signal.

Abstract: Provided is a composition for atopy or psoriasis treatment including a liquid type plasma. More particularly, provided is a method for producing a liquid type plasma for preventing or treating atopic dermatitis or psoriasis, a pharmaceutical composition for preventing or treating atopic dermatitis or psoriasis using a liquid type plasma produced according to the method, and a method for preventing or treating atopic dermatitis or psoriasis using the liquid type plasma.

Abstract: The present invention relates to a composition for skin whitening or wound treatment including liquid-type plasma, and more particularly, to a cosmetic composition for skin whitening and a pharmaceutical composition for treating and preventing skin pigmentation diseases which contain liquid-type plasma as an active ingredient. In addition, the present invention relates to a pharmaceutical composition for wound treatment, a quasi-drug composition, and a health functional food composition, which include liquid-type plasma and a growth factor as active ingredients, and a wound treatment method including a step of administering the composition to a subject or a step of applying the composition on the skin. The composition including liquid-type plasma and a growth factor of the present invention is capable of inducing the proliferation of fibroblasts, thereby exhibiting excellent wound treatment efficacy.

Abstract: Provided is clock signal generator configured to generate a target output clock signal based on a reference clock signal, the clock signal generator includes a digital-to-time converter (DTC) configured to delay a reference clock signal based on an input code to generate a delay clock signal, and output the delay clock signal, a DTC controller configured to determine an initial gain value of the DTC based on a result of comparing at least one delay amount of the DTC with a period of a previously generated output clock signal, and generate the input code based on the initial gain value, and a phase locked loop configured to generate the target output clock signal based on the delay clock signal and a division clock signal of the previously generated output clock signal, the target output clock signal being locked to the delay clock signal.

Abstract: An imprint mold includes a substrate; a pattern on the substrate and having a multi-layered structure; and an etch stop layer between an upper layer and a lower layer of the pattern.

Abstract: A crystal oscillator including a feedback circuit, and a reference clock generating circuit including the crystal oscillator. The crystal oscillator is configured to generate an oscillating signal based on a natural frequency of a crystal. The crystal oscillator may include: a current generating circuit connected to a first node having a first voltage and a second node having a second voltage, and configured to output a first current to the second node; a feedback circuit connected to the generating circuit via the first and second nodes and configured to adjust a level of the second voltage by controlling a level of the first voltage; and a crystal circuit connected to the second node and configured to generate the oscillating signal based on the second voltage.