Patents by Inventor Chul-Joon Choi

Chul-Joon Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070283076
    Abstract: An electronic device includes a universal serial bus (USB) interface therein. This USB interface is configured to support at least first and second different USB interface standards. These different interface standards are selected by the electronic device in response to comparing a voltage level of a signal provided to said USB interface relative to a reference voltage generated within the electronic device. The signal provided to the USB may be a power supply signal, the first USB standard may be a USB 2.0 interface standard and the second USB standard may be an inter-chip USB interface standard.
    Type: Application
    Filed: May 21, 2007
    Publication date: December 6, 2007
    Inventors: Sang-Bum Kim, Sang-Wook Kang, Seong-Hyun Kim, Chul-Joon Choi, Jong-Sang Choi
  • Patent number: 6960515
    Abstract: In a method of forming a metal gate electrode, an annealing process is performed in a hydrogen-containing gas ambient following a selective oxidation process. During the annealing process, a metal oxide layer formed by the selective oxidation process is removed by a reduction reaction or hydrogen atoms are contained in the metal oxide layer to suppress whisker nucleation and surface mobility.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: November 1, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mahn-Ho Cho, Ja-Hum Ku, Chul-Joon Choi, Jun-Kyu Cho, Seong-Jun Heo
  • Patent number: 6764961
    Abstract: The present invention includes a method of forming a metal gate electrode on which whiskers are not formed after performing a selective oxidation process and a subsequent heating process. The metal gate electrode is formed by forming a metal gate electrode pattern which is comprised of a polysilicon layer and a metal layer, and performing a selective oxidation process. After the selective oxidation process, the metal gate electrode undergoes a subsequent heating treatment. The selective oxidation process is carried out in a nitrogen containing gas ambient, so that a metal oxide layer is minimally formed on the metal layer. As a result, it is prevented from causing whiskers on the metal layer.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: July 20, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ja-Hum Ku, Mahn-Ho Cho, Chul-Joon Choi, Seong-Jun Heo, Jun-Kyu Cho
  • Patent number: 6624496
    Abstract: A method of forming a T-shaped isolation layer, a method of forming an elevated salicide source/drain region using the same, and a semiconductor device having the T-shaped isolation layer are provided. In the method of forming the T-shaped isolation layer, an isolation layer having a narrow trench region in the lower portion thereof and a wide trench region in the upper portion thereof is formed on a semiconductor substrate. Also, in the method of forming the elevated salicide source/drain region, the method of forming the T-shaped isolation layer is used. In particular, conductive impurities can also be implanted into the lower portion of the wide trench region which constitutes the head of the T-shaped isolation layer and is extended to both sides from the upper end of the narrow trench region by controlling the depth of the wide trench region in an ion implantation step for forming the source/drain region.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: September 23, 2003
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Ja-Hum Ku, Dong-Ho Ahn, Chul-Sung Kim, Jae-Yoon Yoo, Sug-Hun Hong, Chul-Joon Choi
  • Publication number: 20020137321
    Abstract: The present invention includes a method of forming a metal gate electrode on which whiskers are not formed after performing a selective oxidation process and a subsequent heating process. The metal gate electrode is formed by forming a metal gate electrode pattern which is comprised of a polysilicon layer and a metal layer, and performing a selective oxidation process. After the selective oxidation process, the metal gate electrode undergoes a subsequent heating treatment. The selective oxidation process is carried out in a nitrogen containing gas ambient, so that a metal oxide layer is minimally formed on the metal layer. As a result, it is prevented from causing whiskers on the metal layer.
    Type: Application
    Filed: November 6, 2001
    Publication date: September 26, 2002
    Inventors: Ja-Hum Ku, Mahn-Ho Cho, Chul-Joon Choi, Seong-Jun Heo, Jun-Kyu Cho
  • Publication number: 20020127888
    Abstract: In a method of forming a metal gate electrode, an annealing process is performed in a hydrogen-containing gas ambient following a selective oxidation process. During the annealing process, a metal oxide layer formed by the selective oxidation process is removed by a reduction reaction or hydrogen atoms are contained in the metal oxide layer to suppress whisker nucleation and surface mobility.
    Type: Application
    Filed: December 4, 2001
    Publication date: September 12, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Mahn-Ho Cho, Ja-Hum Ku, Chul-Joon Choi, Jun-Kyu Cho, Seong-Jun Heo
  • Publication number: 20020090795
    Abstract: A method of forming a T-shaped isolation layer, a method of forming an elevated salicide source/drain region using the same, and a semiconductor device having the T-shaped isolation layer are provided. In the method of forming the T-shaped isolation layer, an isolation layer having a narrow trench region in the lower portion thereof and a wide trench region in the upper portion thereof is formed on a semiconductor substrate. Also, in the method of forming the elevated salicide source/drain region, the method of forming the T-shaped isolation layer is used. In particular, conductive impurities can also be implanted into the lower portion of the wide trench region which constitutes the head of the T-shaped isolation layer and is extended to both sides from the upper end of the narrow trench region by controlling the depth of the wide trench region in an ion implantation step for forming the source/drain region.
    Type: Application
    Filed: January 15, 2002
    Publication date: July 11, 2002
    Inventors: Dong-Ho Ahn, Ja-Hum Ku, Chul-Sung Kim, Jae-Yoon Yoo, Sug-Hun Hong, Chul-Joon Choi
  • Patent number: 6383877
    Abstract: A method of forming a T-shaped isolation layer, a method of forming an elevated salicide source/drain region using the same, and a semiconductor device having the T-shaped isolation layer are provided. In the method of forming the T-shaped isolation layer, an isolation layer having a narrow trench region in the lower portion thereof and a wide trench region in the upper portion thereof is formed on a semiconductor substrate. Also, in the method of forming the elevated salicide source/drain region, the method of forming the T-shaped isolation layer is used. In particular, conductive impurities can also be implanted into the lower portion of the wide trench region which constitutes the head of the T-shaped isolation layer and is extended to both sides from the upper end of the narrow trench region by controlling the depth of the wide trench region in an ion implantation step for forming the source/drain region.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: May 7, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-ho Ahn, Ja-hum Ku, Chul-sung Kim, Jae-yoon Yoo, Sug-hun Hong, Chul-joon Choi