Patents by Inventor Chun-An Cheng

Chun-An Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230093921
    Abstract: The invention provides an oriented and covalent method for immobilizing a glycoprotein and an antibody on a chip. The method includes providing a silver-coated solid surface equipped with alkynes and cuprous oxide nanoparticles. The azido boronic acid tosyl probe is conjugated to the silver-coated solid surface by the cuprous oxide nanoparticles through the self-catalyzed azide-alkyne cycloaddition reaction. The glycan(s) of a glycoprotein or an antibody is provided to the boronic acid tosyl probe, and alcohol groups of the glycan(s) of the glycoprotein or the antibody and the boronic acid group of boronic acid tosyl probe form boronate ester. The nucleophilic residues on the glycoprotein or the antibody replace the tosyl group by SN2 reaction, so as to immobilize the glycoprotein or the antibody through the covalent bond formation.
    Type: Application
    Filed: January 6, 2022
    Publication date: March 30, 2023
    Applicant: National Tsing Hua University
    Inventors: Chun-Cheng Lin, Avijit K. Adak, Chen-Yu Fan
  • Patent number: 11608422
    Abstract: A white polyester film and a method for manufacturing the same are provided. The white polyester film includes a physically recycled polyester resin and a chemically recycled polyester resin. The physically recycled polyester resin is formed by a plurality of physically recycled polyester chips. The chemically recycled polyester resin is formed by a plurality of chemically recycled polyester chips and mixed with the physically recycled polyester resin. The plurality of chemically recycled polyester chips further include chemically recycled electrostatic pinning polyester chips. The chemically recycled electrostatic pinning polyester chips contain electrostatic pinning additives, and the electrostatic pinning additives are metal salts. Expressed in percent by weight based on a total weight of the polyester film, a content of the electrostatic pinning additives in the polyester film is between 0.005% and 0.1% by weight. The polyester film further includes a white additive.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: March 21, 2023
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wen-Cheng Yang, Chun-Cheng Yang, Chia-Yen Hsiao, Ching-Yao Yuan
  • Patent number: 11605652
    Abstract: An array substrate includes a substrate as well as a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer and a conductive structure sequentially formed thereon. The first insulating layer has a first opening communicated with a through hole of the substrate. The first conductive layer includes a first ring pattern extending from top of the first insulating layer into the first opening. The second insulating layer has a second opening communicated with the first opening. The second conductive layer includes a second ring pattern extending from top of the second insulating layer into the second opening. The first ring pattern laterally protrudes toward an axis of the through hole from the second ring pattern. The conductive structure extends from above the second insulating layer to a bottom surface of the substrate through the first and second openings and the through hole.
    Type: Grant
    Filed: December 25, 2019
    Date of Patent: March 14, 2023
    Assignee: Au Optronics Corporation
    Inventors: Yu-Hsing Liang, Hsiu-Hua Wang, Chan-Jui Liu, Pin-Miao Liu, Chun-Cheng Cheng
  • Publication number: 20230075332
    Abstract: This application relates to a navigation method and a navigation apparatus. The navigation method is executed by a mobile carrier and includes: moving along a preset guide trajectory body according to obtained target location information; and determining whether a current state of the mobile carrier is out-of-position, and in response to determining that the current state of the mobile carrier is out-of-position, obtaining current initialization location information of the mobile carrier after moving to a preset initialization tag. According to embodiments of the disclosure, reliable operation of the mobile carrier is ensured by re-initializing the mobile carrier in a case that an error occurs in the mobile carrier along the preset guide trajectory body.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Inventors: Huixiang LI, Jui-chun CHENG, Shengdong XU
  • Patent number: 11601595
    Abstract: A control method of a driving mechanism is provided, including: the driving mechanism provides a first electrical signal from a control assembly to the driving mechanism to move the movable portion into an initial position relative to the fixed portion, wherein the control assembly includes a control unit and a position sensing unit; the status signal of an inertia sensing unit is read; the control unit sends the status signal to the control unit to calculate a target position; the control unit provides a second electrical signal to the driving assembly according to the target position for driving the driving assembly; a position signal is sent from the position sensing unit to the control unit; the control unit provides a third electric signal to the driving assembly to drive the driving assembly according the position signal.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: March 7, 2023
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chen-Hsien Fan, Sung-Mao Tsai, Yueh-Lin Lee, Yu-Chiao Lo, Mao-Kuo Hsu, Ching-Chieh Huang, Yi-Chun Cheng
  • Publication number: 20230068714
    Abstract: A method for manufacturing a semiconductor device includes forming one or more work function layers over a semiconductor structure. The method includes forming a hardmask layer over the one or more work function layers. The method includes forming an adhesion layer over the hardmask layer. The method includes removing a first portion of a patternable layer that is disposed over the hardmask layer. The adhesion layer comprises an organic acid that concurrently bonds metal atoms of the hardmask layer and phenol groups of the patternable layer, thereby preventing an etchant from penetrating into a second portion of the patternable layer that still remains over the hardmask layer.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Cheng Chou, Ying-Liang Chuang, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20230067300
    Abstract: A method for making a middle-of-line interconnect structure in a semiconductor device includes forming, near a surface of a first interconnect structure comprised of a first metal, a region of varied composition including the first metal and a second element. The method further includes forming a recess within the region of varied composition. The recess laterally extends a first distance along the surface and vertically extends a second distance below the first surface. The method further includes filling the recess with a second metal to form a second interconnect structure that contacts the first interconnect structure.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Cheng Chou, Yu-Fang Huang, Kuo-Ju Chen, Ying-Liang Chuang, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20230062210
    Abstract: Techniques are provided herein to form semiconductor devices having different work function metals over different devices. The techniques can be used in any number of integrated circuit applications and are particularly useful with respect to gate-all-around (GAA) transistors. In an example, neighboring semiconductor devices each include a different work function to act as the device gate electrode for each semiconductor device. More specifically, a first semiconductor device may be a p-channel GAA transistor with a first work function metal around the various nanoribbons of the transistor, while the second neighboring semiconductor device may be an n-channel GAA transistor with a second work function metal around the various nanoribbons of the transistor. No portions of the first work function metal are present around the nanoribbons of the second semiconductor device and no portions of the second work function metal are present around the nanoribbons of the first semiconductor device.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Intel Corporation
    Inventors: Andy Chih-Hung Wei, Yang-Chun Cheng, Dax M. Crum
  • Publication number: 20230063055
    Abstract: A method for fingerprint enrollment according to an embodiment of the present disclosure is adapted to an electronic device including a display and a fingerprint sensor. The method includes displaying a fingerprint enrollment interface on the display, wherein the fingerprint enrollment interface includes a progress indicator, displaying, according to a swipe action of a finger detected by the fingerprint sensor, a growing progress of the progress indicator on the fingerprint enrollment interface, and displaying, in response to the fingerprint sensor detecting that the finger is not removed, the progress indicator in a growing state on the fingerprint enrollment interface to represent that fingerprint information is being collected from the swipe action. According to the method disclosed in the embodiments of the present disclosure, it is possible to guide a user to input more fingerprint information.
    Type: Application
    Filed: June 10, 2022
    Publication date: March 2, 2023
    Inventors: YU-CHUN CHENG, YUAN-LIN CHIANG
  • Publication number: 20230061745
    Abstract: A support stand includes a base and a support bracket. The support bracket has a first side and a second side opposite to each other. The first side is rotatably connected to the base. The support bracket further has a slot extending from the second side toward the first side.
    Type: Application
    Filed: July 7, 2022
    Publication date: March 2, 2023
    Inventors: Chung-Yao LIN, Chun-Cheng CHENG
  • Publication number: 20230057326
    Abstract: Techniques are provided herein to form semiconductor devices having self-aligned gate cut structures. In an example, neighboring semiconductor devices each include a semiconductor region extending between a source region and a drain region, and a gate layer extending over the semiconductor regions of the neighboring semiconductor devices. A gate cut structure that includes a dielectric material interrupts the gate layer between the neighboring semiconductor devices. Due to the process of forming the gate cut structure, the distance between the gate cut structure and the semiconductor region of one of the neighboring semiconductor devices is substantially the same as (e.g., within 1.5 nm of) the distance between the gate cut structure and the semiconductor region of the other one of the neighboring semiconductor devices.
    Type: Application
    Filed: August 19, 2021
    Publication date: February 23, 2023
    Applicant: Intel Corporation
    Inventors: Andy Chih-Hung Wei, Anand S. Murthy, Yang-Chun Cheng, Ryan Pearce, Guillaume Bouche
  • Patent number: 11587876
    Abstract: The present disclosure relates to method for preparing a semiconductor device with a composite landing pad. The method includes forming a first dielectric layer over a semiconductor substrate. The semiconductor device also includes forming a lower metal plug and a barrier layer in the first dielectric layer. The lower metal plug is surrounded by the barrier layer. The semiconductor device further includes forming an inner silicide portion over the lower metal plug, and an outer silicide portion over the barrier layer. A topmost surface of the outer silicide portion is higher than a topmost surface of the inner silicide portion.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: February 21, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chun-Cheng Liao
  • Patent number: 11587934
    Abstract: The present disclosure provides a method for preparing a semiconductor memory device with air gaps between conductive features. The method includes forming an isolation layer defining a first active region in a substrate; forming a first doped region in the first active region; forming a first word line buried in a first trench adjacent to the first doped region; and forming a high-level bit line contact positioned on the first doped region; forming a first air gap surrounding the high-level bit line contact. The forming of the first word line comprises: forming a lower electrode structure and an upper electrode structure on the lower electrode structure. The forming of the upper electrode structure comprises: forming a source layer substantially covering a sidewall of the first trench; forming a conductive layer on the source layer; and forming a work-function adjustment layer disposed between the source layer and the conductive layer.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: February 21, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chun-Cheng Liao
  • Patent number: 11587875
    Abstract: A connecting structure includes a substrate, a first conductive feature, a second conductive feature, a third conductive feature over the first conductive feature and a fourth conductive feature over the second conductive feature. The substrate includes a first region and a second region. The first conductive feature is disposed in the first region and has a first width. The second conductive feature is disposed in the second region and has a second width greater than the first width of the first conductive feature. The third conductive feature includes a first anchor portion surrounded by the first conductive feature. The fourth conductive feature includes a second anchor portion surrounded by the second conductive feature. A depth difference ratio between a depth of the first anchor portion and a depth of the second anchor portion is less than approximately 10%.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: U-Ting Chiu, Yu-Shih Wang, Chun-Cheng Chou, Yu-Fang Huang, Chun-Neng Lin, Ming-Hsi Yeh
  • Patent number: 11588244
    Abstract: The disclosure provides an antenna structure, including at least one supporting module, a first antenna, and a second antenna. The first antenna is disposed on the at least one supporting module and includes a first feeding point and a first zero-current zone. The first antenna is connected to a ground plane. The second antenna is disposed on the at least one supporting module and includes a second feeding point and a second zero-current zone. The second antenna is connected to the ground plane. The first feeding point of the first antenna is disposed in the second zero-current zone of the second antenna, and the second feeding point of the second antenna is disposed in the first zero-current zone of the first antenna.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: February 21, 2023
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chun-Cheng Chan, Shih-Chia Liu, Yen-Hao Yu, Li-Chun Lee, Chao-Lin Wu, Jui-Hung Lai, Chih-Heng Lin
  • Publication number: 20230047987
    Abstract: A method for a user equipment (UE) connected to a serving Radio Access Network (RAN) through a serving cell is provided. The serving RAN may include a Non-Terrestrial Network (NTN). The method receives, from the serving cell, satellite information regarding a coverage area of the serving RAN. After receiving the satellite information, the method determines, based on the satellite information, that the UE will be disconnected from the serving RAN by moving out of the coverage area of the serving RAN after a specific period of time. The method maintains an Access Stratum (AS) layer configuration of the UE without performing any task associated with an Idle mode of the UE while the UE is staying out of the coverage area of the serving RAN.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 16, 2023
    Inventors: YUNG-LAN TSENG, CHIEN-CHUN CHENG, HUNG-CHEN CHEN, YEN-HUA LI
  • Patent number: 11580786
    Abstract: The present disclosure relates to an updating method for configuration parameters of an electronic device, a device and a computer-readable medium, wherein the updating method includes: acquiring fingerprint information collected by a fingerprint sensor at the electronic device; determining whether the fingerprint information is collected in a trusted mode; acquiring, in response to determining that the fingerprint information is collected in the trusted mode, a target configuration parameter of the electronic device for anti-spoofing detection according to the fingerprint information; and updating, in response to that the target configuration parameter of the electronic device and/or a current configuration parameter of the electronic device satisfies a preset condition, the current configuration parameter of the electronic device based on the target configuration parameter of the electronic device, wherein the current configuration parameter is used by the electronic device for anti-spoofing detection of a
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 14, 2023
    Assignee: Egis Technology Inc.
    Inventors: Yuan-Lin Chiang, Yu-Chun Cheng
  • Patent number: 11578121
    Abstract: The invention relates to anti-EGF like domain multiple 6 antibody (anti-EGFL6 antibody) and cancer detection (or diagnosis) and treatment using the anti-EGFL6 antibody. The present invention creates anti-EGFL6 antibodies, particularly, a single-chain antibody fragments (scFv) and humanized antibody, which have ability in binding to EGFL6 and in inhibiting angiogenesis and cancer cell growth.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: February 14, 2023
    Assignees: Taipei Medical University, Changhua Christian Medical Foundation Changhua Christian Hospital, National Research institute of Chinese Medicine, Ministry of Health and Welfare
    Inventors: Yu-Ching Lee, Shiow-Lin Pan, Wei-Chun Huangfu, Tsui-Chin Huang, Po-Li Wei, Han-Li Huang, Chun-Chun Cheng, Cheng-Chiao Huang, Keng-Chang Tsai, Kun-Tu Yeh, Ting-Yi Sung, Fu-Ling Chang
  • Patent number: 11578649
    Abstract: The disclosure relates to a charging system, which includes a crankshaft chamber, two cylinder chambers, a crankshaft connecting rod mechanism, two pistons, an intake pipe, two draft tubes, and a rotating rod control mechanism. The crankshaft connecting rod mechanism is installed in the crankshaft chamber. Each piston is received in the cylinder chambers and connected with the crankshaft connecting rod mechanism. The intake pipe only communicates with the crankshaft chamber. One end of each draft tube only communicates with the crankshaft chamber and another end only communicates with each cylinder chamber. The check valve is installed in the crankshaft chamber. The rotating rod control mechanism includes a rotating rod and a sealing block fixedly connected and rotating with the rotating rod. The sealing block blocks and seals a joint between the crankshaft chamber and each draft tube.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: February 14, 2023
    Inventor: Chia-Chun Cheng
  • Patent number: 11572449
    Abstract: A polyester film and a method for manufacturing the same are provided. The polyester film includes a physically recycled polyester resin and a chemically recycled polyester resin. The physically recycled polyester resin is formed by a plurality of physically recycled polyester chips. The chemically recycled polyester resin is formed by a plurality of chemically recycled polyester chips and mixed with the physically recycled polyester resin. The plurality of chemically recycled polyester chips further includes chemically recycled electrostatic pinning polyester chips. The chemically recycled electrostatic pinning polyester chips contain electrostatic pinning additives, and the electrostatic pinning additives are metal salts. Expressed in percent by weight based on a total weight of the polyester film, a content of the electrostatic pinning additives in the polyester film is between 0.005% and 0.1% by weight.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: February 7, 2023
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wen-Cheng Yang, Chun-Cheng Yang, Chia-Yen Hsiao, Yu-Chi Hsieh