Patents by Inventor Chun-An Huang

Chun-An Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151930
    Abstract: The present invention relates to an aperture unit having an optical axis. The aperture unit includes a fixed portion, a guiding element, a first blade and a driving assembly. The guiding element is movably connected to the fixed portion, and the first blade is movably connected to the guiding element and the fixed portion. The driving assembly is disposed on the guiding element for driving the guiding element to move relative to the fixed portion in a first moving dimension. When the guiding element moves relative to the fixed portion in the first moving dimension, the first blade is driven by the guiding element to move relative to the fixed portion in a second moving dimension, and the first moving dimension and the second moving dimension are different.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Inventors: Kuo-Chun KAO, Meng-Ting LIN, I-Mei HUANG, Sin-Jhong SONG
  • Publication number: 20240151814
    Abstract: The present disclosure provides a radar object recognition method, which includes steps as follows. The radar image generation is performed on radar data to generate a radar image; the radar image is inputted into an object recognition model, so that the object recognition model outputs a recognition result; the post-process is performed on the recognition result to eliminate recognition errors from the recognition result.
    Type: Application
    Filed: February 21, 2023
    Publication date: May 9, 2024
    Inventors: Ta-Sung LEE, Ming-Chun LEE, Tai-Yuan HUANG, Chia-Hsing YANG
  • Publication number: 20240154520
    Abstract: A power factor correction (PFC) converter comprises an inductor, a main switch, a voltage divider, a diode, and a controller. The main switch controls the inductor performing magnetization and demagnetization, wherein a voltage difference between two ends of the main switch is a switch voltage. The voltage divider divides the switch voltage and generates a division voltage. The controller performs the following operations periodically in general mode: turning on the main switch; turning off the main switch after the main switch is turned on for a period of time; obtaining the switch voltage according to the division voltage, and determining the period of time for which the main switch is turned on next time according to the switch voltage and a predetermined output voltage of the PFC converter; and obtaining an output voltage according to the switch voltage during a period of time after the main switch is turned off.
    Type: Application
    Filed: March 30, 2023
    Publication date: May 9, 2024
    Applicant: Diodes Incorporated
    Inventors: Haoming Chen, Yi-Chun Wang, Koyen Lee, Feng-Jung Huang
  • Publication number: 20240151743
    Abstract: The present disclosure is directed to a method of manufacturing one or more needles of a probe card by refining and processing a conductive body that extends from the probe card to form a respective tip at the end of the respective conductive body. Forming the respective tip of a respective needle includes removing respective portions from the end of the conductive body by flowing an electrolytic fluid between a conductive pattern structure and an end of the respective conductive body. Removing the respective portions with the flow of the electrons may be performed in multiple successive steps to form various needles with various sizes, shapes, and profiles (e.g., cylindrical, rectangular, triangular, trapezoidal, etc.).
    Type: Application
    Filed: February 7, 2023
    Publication date: May 9, 2024
    Inventors: Ting-Yu CHIU, Yi-Neng CHANG, Wen-Chun TU, Te-Kun LIN, Chien Fang HUANG
  • Publication number: 20240152864
    Abstract: An inventory planning system and an inventory planning method for short expiration goods are provided. The inventory planning system includes: a demand forecast model configured to provide a future sales prediction of the at least one short expiration goods according to an expiration period information, a promotion information and a historical sales information of at least one short expiration goods; a promotion forecast model configured to provide a future promotions sales of the at least one short expiration goods according to the expiration period information, the promotion information and the historical sales information of the at least one short expiration goods; and an inventory planning model configured to provide a purchase quantity recommendation of the at least one short expiration goods according to a current stock, the future sales prediction and the future promotions sales of the at least one short expiration goods.
    Type: Application
    Filed: December 16, 2022
    Publication date: May 9, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sian-Hong HUANG, Hao-Chun CHUANG
  • Patent number: 11978929
    Abstract: A close-end fuel cell and an anode bipolar plate thereof are provided. The anode bipolar plate includes an airtight conductive frame and a conductive porous substrate disposed within the airtight conductive frame. In the airtight conductive frame, an edge of a first side has a fuel inlet, and an edge of a second side has a fuel outlet. The conductive porous substrate has at least one flow channel, where a first end of the flow channel communicates with the fuel inlet, a second end of the flow channel communicates with the fuel outlet. The flow channel is provided with a blocking part near the fuel inlet to divide the flow channel into two areas.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: May 7, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Sung-Chun Chang, Chien-Ming Lai, Chiu-Ping Huang, Li-Duan Tsai, Keng-Yang Chen
  • Patent number: 11976422
    Abstract: A pulp-molding process and an in-line intelligently drying apparatus therefor, comprise: implementing intelligent-circulation desiccating step and intelligently-wetting step in sequence, between pulp-dredging and forming step and thermo-compression forming step. Intelligent-circulation desiccating step comprises: in accordance to structure and/or outer contour of pulp-molding article, implementing combination of both infrared irradiation step and hot-wind blowing step, thereby self-adaptive eliminating different moistures contained within different portions of initially-compressed semi-finished product, to form evenly-dried semi-finished product. Intelligently-wetting step comprises: in accordance to structure and/or outer contour of pulp-molding article, spray-sprinkling predetermined different adaptive amount of water over different local location within dried semi-finished product, thereby forming wetted semi-finished product having averaged moisture content.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: May 7, 2024
    Assignee: GOLDEN ARROW PRINTING TECHNOLOGY (KUNSHAN) CO., LTD.
    Inventors: Chien-Kuan Kuo, Chun-Huang Huang
  • Patent number: 11979593
    Abstract: Method and apparatus for affine CPMV or ALF refinement are mentioned. According to this method, statistical data associated with the affine CPMV or ALF refinement are collected over a picture area. Updated parameters for the affine CPMV refinement or the ALF refinement are then derived based on the statistical data, where a process to derive the updated parameters includes performing multiplication using a reduced-precision multiplier for the statistical data. The reduced-precision multiplier truncates at least one bit of the mantissa part. In another embodiment, the process to derive the updated parameters includes performing reciprocal for the statistical data using a lookup table with (m?k)-bit input by truncating k bits from the m-bit mantissa part, and contents of the lookup table includes m-bit outputs. m and k are positive integers.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: May 7, 2024
    Assignee: MEDIATEK INC.
    Inventors: Shih-Chun Chiu, Tzu-Der Chuang, Ching-Yeh Chen, Chun-Chia Chen, Chih-Wei Hsu, Yu-Wen Huang
  • Patent number: 11977249
    Abstract: An optical device is provided. The optical device includes a ring waveguide and a bus waveguide. The ring waveguide includes a coupling region. The bus waveguide is disposed adjacent to and spaced apart from the coupling region of the ring waveguide. The bus waveguide includes a coupling structure corresponding to the coupling region.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Tse Tang, Chewn-Pu Jou, Lan-Chou Cho, Ming Yang Jung, Tai-Chun Huang
  • Publication number: 20240146661
    Abstract: Various solutions for extended reality (XR) enhancement in mobile communications are described. An apparatus establishes a communication with a network node of a wireless network. The apparatus performs an operation with respect to XR-related computation offloading from a user end to result in XR enhancement at the user end.
    Type: Application
    Filed: March 7, 2022
    Publication date: May 2, 2024
    Inventors: Abdellatif SALAH, Chien-Chun HUANG-FU, Chi-Hsuan HSIEH, Wei-De WU
  • Publication number: 20240145249
    Abstract: A device includes first and second gate structures respectively extending across the first and second fins, and a gate isolation plug between a longitudinal end of the first gate structure and a longitudinal end of the second gate structure. The gate isolation plug comprises a first dielectric layer and a second dielectric layer over the first dielectric layer. The first dielectric layer has an upper portion and a lower portion below the upper portion. The upper portion has a thickness smaller than a thickness of the lower portion of the first dielectric layer.
    Type: Application
    Filed: March 24, 2023
    Publication date: May 2, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Gang CHEN, Wan Chen HSIEH, Bo-Cyuan LU, Tai-Jung KUO, Kuo-Shuo HUANG, Chi-Yen TUNG, Tai-Chun HUANG
  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Publication number: 20240146874
    Abstract: In examples, an electronic device comprises a processor to receive an image of a meeting space including a person; identify facial features of the person; determine whether the person is of interest to a meeting based on the identification; and cause a change in a manner in which a video stream of the person is displayed on a graphical user interface (GUI) based on the determination.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: Pei Hsuan LI, Rose HEDDERMAN, Yu Chun HUANG, Sarah SHIRAZ
  • Patent number: 11972957
    Abstract: A gas flow accelerator may include a body portion, and a tapered body portion including a first end integrally formed with the body portion. The gas flow accelerator may include an inlet port connected to the body portion and to receive a process gas to be removed from a semiconductor processing tool by a main pumping line. The semiconductor processing tool may include a chuck and a chuck vacuum line to apply a vacuum to the chuck to retain a semiconductor device. The tapered body portion may be configured to generate a rotational flow of the process gas to prevent buildup of processing byproduct on interior walls of the main pumping line. The gas flow accelerator may include an outlet port integrally formed with a second end of the tapered body portion. An end portion of the chuck vacuum line may be provided through the outlet port.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-chun Yang, Chih-Lung Cheng, Yi-Ming Lin, Po-Chih Huang, Yu-Hsiang Juan, Xuan-Yang Zheng
  • Patent number: 11971573
    Abstract: An optical coupler includes: a plurality of waveguide core layers formed from a waveguide core material having a first index of refraction, the waveguide core layers being (i) arranged in a stacked relationship one over another, (ii) spaced apart one from another and (iii) extending from a light receiving end of the optical coupler longitudinally through the optical coupler toward a light output end of the optical coupler; and a cladding formed from a cladding material having a second index of refraction, the second index of refraction being less than the first index of refraction, the cladding material surrounding each of the plurality of waveguide core layers. Suitably, light propagating within outer ones of the plurality of waveguide core layers is directed toward an interior one of the plurality of waveguide core layers via evanescent coupling between adjacent ones of the plurality of waveguide core layers.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tai-Chun Huang, Stefan Rusu
  • Patent number: 11973077
    Abstract: A device includes a transistor, a backside via, and a pair of sidewall spacers. The transistor includes a gate structure, a channel layer surrounded by the gate structure, and a first source/drain structure and a second source/drain structure connected to the channel layer. The backside via is under and connected to the first source/drain structure and includes a first portion, a second portion between the first portion and the first source/drain structure, and a third portion tapering from the first portion to the second portion in a cross-sectional view. The pair of sidewall spacers are on opposite sidewalls of the second portion of the backside via but not on opposite sidewalls of the first portion of the backside via.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wang-Chun Huang, Hou-Yu Chen, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20240136401
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.
    Type: Application
    Filed: January 5, 2024
    Publication date: April 25, 2024
    Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
  • Publication number: 20240135078
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Publication number: 20240133421
    Abstract: An electronic device includes a monitor stand, a hinge mechanism, and an operation element. The hinge mechanism includes a back plate, a speed reduction assembly, and a friction assembly. The back plate is fixed to the monitor stand. The speed reduction assembly includes an input plate and a speed reduction member. The speed reduction member is arranged on the input plate. The friction assembly is arranged between the back plate and the input plate. The operation element is connected to the speed reduction member. A rotation center of the operation element coincides with an axis of the back plate and the speed reduction member are coaxially arranged.
    Type: Application
    Filed: January 17, 2023
    Publication date: April 25, 2024
    Inventors: Chih-Wei KUO, Yu-Chun HUNG, Che-Yen CHOU, Chen-Wei TSAI, Hsiang-Wen HUANG
  • Publication number: 20240137875
    Abstract: A method for adjusting time-averaged (TA) parameters of a transmitting (TX) power of a radio module includes: obtaining at least one message of the at least one other radio module or at least one message of the radio module; determining a scenario of the TX power of the radio module according to the at least one message of the at least one other radio module or the at least one message of the radio module; determining whether the scenario is different from a predetermined scenario of the TX power of the radio module; and in response to the scenario being different from the predetermined scenario, adjusting the TA parameters according to the scenario.
    Type: Application
    Filed: October 1, 2023
    Publication date: April 25, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yi-Ying Huang, Yi-Hsuan Lin, Han-Chun Chang