Patents by Inventor Chun-Chang Liu

Chun-Chang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190157419
    Abstract: A semiconductor device includes a substrate having a channel region; a gate stack over the channel region; a seal spacer covering a sidewall of the gate stack, the seal spacer including silicon nitride; a gate spacer covering a sidewall of the seal spacer, the gate spacer including silicon oxide, the gate spacer having a first vertical portion and a first horizontal portion; and a first dielectric layer covering a sidewall of the gate spacer, the first dielectric layer including silicon nitride.
    Type: Application
    Filed: February 7, 2018
    Publication date: May 23, 2019
    Inventors: Kuo-Chang Huang, Fu-Peng Lu, Chun-Chang Liu, Chen-Chiu Huang
  • Patent number: 10156478
    Abstract: A temperature monitor system for semiconductor substrates in a front opening unified pod (FOUP) includes a temperature detector and a programmable controller. The temperature detector is in the FOUP and configured to obtain temperature data of semiconductor substrates. The programmable controller is coupled to the temperature detector and configured to control operation of the temperature detector.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chang Liu, Tzy-Kuang Lee
  • Publication number: 20180286784
    Abstract: A method of making a semiconductor device includes plating a first conductive material over a first passivation layer, wherein the first conductive material fills an opening in the first passivation layer and electrically connects to an interconnect structure. The method further includes planarizing the first conductive material, wherein a top surface of the planarized first conductive material is coplanar with a top surface of the first passivation layer. The method further includes depositing a second conductive material over the first passivation layer, wherein the second conductive material is different from the first conductive material, and the second conductive material is electrically connected to the first conductive material in the opening. The method further includes patterning the second conductive material to define a redistribution line (RDL).
    Type: Application
    Filed: June 4, 2018
    Publication date: October 4, 2018
    Inventors: Anhao CHENG, Chun-Chang LIU
  • Patent number: 9991189
    Abstract: A semiconductor device includes a first passivation layer over an interconnect structure. The semiconductor device further includes a first redistribution line (RDL) via extending through an opening in the first passivation layer to electrically connect to the interconnect structure. The first RDL via includes a first conductive material. The semiconductor device further includes an RDL over the first passivation layer and electrically connected to the first RDL via. The RDL comprises a second conductive material different from the first conductive material. The RDL extends beyond the first RDL via in a direction parallel to a top surface of the first passivation layer.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: June 5, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Anhao Cheng, Chun-Chang Liu
  • Publication number: 20180151525
    Abstract: A method of manufacturing a semiconductor device includes depositing a first passivation layer over a substrate, depositing a conductive material over the first passivation layer, patterning the conductive material to form a redistribution layer (RDL) structure, and depositing a second passivation layer configured to change a shape of a top portion of the RDL structure.
    Type: Application
    Filed: January 6, 2017
    Publication date: May 31, 2018
    Inventors: Anhao CHENG, Chun-Chang LIU, Sheng-Wei YEH
  • Publication number: 20180033745
    Abstract: A semiconductor device includes a first passivation layer over an interconnect structure. The semiconductor device further includes a first redistribution line (RDL) via extending through an opening in the first passivation layer to electrically connect to the interconnect structure. The first RDL via includes a first conductive material. The semiconductor device further includes an RDL over the first passivation layer and electrically connected to the first RDL via. The RDL comprises a second conductive material different from the first conductive material. The RDL extends beyond the first RDL via in a direction parallel to a top surface of the first passivation layer.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 1, 2018
    Inventors: Anhao CHENG, Chun-Chang LIU
  • Publication number: 20170074727
    Abstract: A temperature monitor system for semiconductor substrates in a front opening unified pod (FOUP) includes a temperature detector and a programmable controller. The temperature detector is in the FOUP and configured to obtain temperature data of semiconductor substrates. The programmable controller is coupled to the temperature detector and configured to control operation of the temperature detector.
    Type: Application
    Filed: September 10, 2015
    Publication date: March 16, 2017
    Inventors: Chun-Chang LIU, Tzy-Kuang LEE
  • Publication number: 20160029031
    Abstract: The present invention discloses a system for compressing a video, and comprises a capture module, a first analysis module, a clustering module and a compressing module. The system of the present invention can capture a background portion from the video and reserve characteristics such as the moving route or speed of the target object. Based on the non-collision among the objects, the objects existing at different times can be re-synthesized into the same time slice to generate a compressed video with the shortest duration while still retaining the full content of the original video according to the system of the present invention.
    Type: Application
    Filed: July 29, 2014
    Publication date: January 28, 2016
    Inventors: Chin-Shyurng Fahn, Meng-Luen Wu, Chun-Chang Liu