Abstract: A request to establish an encrypted VPN connection between a network and the provider network via a dedicated direct physical link and a set of resources of the provider network is received. An isolated virtual network (IVN) is established to implement an encryption virtual private gateway to be used for the connection. Protocol processing engines (PPEs) are instantiated within the IVN, address information of the PPEs is exchanged with the external network and an encrypted VPN tunnel is configured between the PPEs and the external network. Routing information pertaining to the set of resources is provided to the external network via at least one of the encrypted VPN tunnels, enabling routing of customer data to the set of resources within the provider network from the external network via an encrypted VPN tunnel implemented over a dedicated direct physical link between the external network and the provider network.

Abstract: A multidirectional optical element includes a substrate and a metalens. The metalens is disposed on the substrate and has a metastructure, wherein the metastructure includes a pattern of a diffractive optical element.

Abstract: A data processing method for quantization, includes the following steps. A first set of models are loaded. The first set of models are quantized based on a unified quantization parameter to obtain a first set of quantized models. The first set of models include at least one model, the first set of quantized models include at least one quantized model, and the unified quantization parameter is obtained according to several quantization parameters of a second set of models.

Abstract: A method for manufacturing a flip-chip light emitting diode includes providing a first substrate; performing an epitaxial process to form a semiconductor structure on the first substrate, and the semiconductor structure includes a current conductive layer with a bonding surface and defines a first electrode projection area and a second electrode projection area; performing a diffusion process toward the bonding surface by a diffusion material to form at least one path area with a high doping concentration in the current conductive layer; performing a bonding process to bond a second substrate to the bonding surface; and removing the first substrate and forming a first electrode and a second electrode on a side of the semiconductor structure adjacent to the first substrate. A position of the first electrode corresponds to the first electrode projection area, and a position of the second electrode corresponds to the second electrode projection area.

Abstract: A display device and a signal source switching method therefore are provided. The display device is connected with a first signal source device and a second signal source device and includes a switching circuit, a receiver circuit and a control circuit. The switching circuit includes a first connection port and a second connection port, which are respectively connected to the first signal source device and the second signal source device. When the control circuit receives a signal source switching command, the control circuit records a current operating state of each of the first signal source device and the second signal source device. When the control circuit receives an active source command from the first signal source device, the control circuit refers to the current operating state to control the switching circuit to switch the image signal source to the first signal source device or the second signal source device.

Abstract: A control method is provided. The method is used in a system and executed by a processor of the system. The method includes storing motion sensor measurements produced before a movement event is identified, wherein the motion sensor measurements is produced by motion sensors. The method includes marking the motion sensor measurements lower than a sensitivity threshold as valid when the motion sensor measurements match a change trend. The method includes generating orientation data based on the valid motion sensor measurements.

Abstract: A lighting module includes a heat sink with a sidewall and a partition defining two cavities, a LED light source disposed in one cavity to emit light, a driver module disposed in the other cavity with driver circuitry to provide electrical power to the light source, and an optical assembly to provide a desired emission profile. The optical assembly is field-changeable and includes a cover lens with snap-fit connectors to facilitate removal and replacement. The optical assembly further includes either a reflector coupled to the cover lens or an optical lens coupled to the heat sink via an optic holder. In some examples, the driver circuitry facilitates dimming of the light source. The heat sink also dissipates heat generated by the light source and the driver circuitry to maintain desired operating temperatures and thereby facilitate increased light output.

Abstract: A feed detection apparatus of a 3D printer, comprising a gear, a measurement device, a support, and a compression assembly. The gear is provided on the support to abut against a filament material, and rotates along with a movement of the filament material. The measurement device is placed on the support to measure a rotating speed of the gear, and determines a feeding status of the filament material according to a measurement result. The compression assembly comprises a connection member and an abutment member; the connection member is provided between the support and the abutment member; the abutment member is used for regulating a pressure of the connecting member applied on the support so as to enable the gear to abut against the filament material.

Abstract: A method of forming a semiconductor device includes: forming an etch stop layer over a substrate; forming a first diffusion barrier layer over the etch stop layer; forming a semiconductor device layer over the first diffusion barrier layer, the semiconductor device layer including a transistor; forming a first interconnect structure over the semiconductor device layer at a front side of the semiconductor device layer, the first interconnect structure electrically coupled to the transistor; attaching the first interconnect structure to a carrier; removing the substrate, the etch stop layer, and the first diffusion barrier layer after the attaching; and forming a second interconnect structure at a backside of the semiconductor device layer after the removing.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an image sensor in which a device layer has high crystalline quality. According to some embodiments, a hard mask layer is deposited covering a substrate. A first etch is performed into the hard mask layer and the substrate to form a cavity. A second etch is performed to remove crystalline damage from the first etch and to laterally recess the substrate in the cavity so the hard mask layer overhangs the cavity. A sacrificial layer is formed lining cavity, a blanket ion implantation is performed into the substrate through the sacrificial layer, and the sacrificial layer is removed. An interlayer is epitaxially grown lining the cavity and having a top surface underlying the hard mask layer, and a device layer is epitaxially grown filling the cavity over the interlayer. A photodetector is formed in the device layer.

Abstract: A method for preparing an anodic aluminum oxide-based photonic crystal product includes: subjecting an aluminum-containing object to a first pretreatment; subjecting the aluminum-containing object to a first anodizing treatment by applying periodic current signals, so as to form first porous aluminum oxide films on the aluminum-containing object along a first direction, the first porous aluminum oxide films each including first nanopore structures; and subjecting the aluminum-containing object to a second anodizing treatment by applying a slowly increasing current signal, followed by constant current signal so as to form a second porous aluminum oxide film beneath an Nth first porous aluminum oxide film, the second porous aluminum oxide film including second nanopore structures. An anodic aluminum oxide-based photonic crystal product prepared by the method is also provided.

Abstract: The present disclosure provides the methods for preparing nickel-rich hydroxide precursor material and nickel-rich oxide cathode material having a homogeneous structure with an element concentration-gradient distribution by utilizing a continuous Taylor-flow reactor, comprising: (1) preparing an aqueous solution A with metal ion raw materials dissolved therein, an aqueous solution B with a manganese source dissolved therein, an aqueous solution C with a precipitant dissolved therein, and an aqueous solution D with a chelating agent dissolved therein; feeding the aqueous solution A, the aqueous solution C and the aqueous solution D into the continuous Taylor-flow reactor to perform a first co-precipitation reaction; (2) feeding the aqueous solution B into the continuous Taylor-flow reactor to perform a second co-precipitation reaction; (3) washing the precipitate obtained from the second co-precipitation reaction and putting the precipitate into an oven to dry the precipitate to fabricate the nickel-rich hydro

Abstract: A physically unclonable function (PUF) code generating method includes the following steps. In a step (a), M×N memory cells in a memory cell array of a non-volatile memory are controlled to have an identical storage state, wherein M and N are positive integers, and M×N is greater than 1. In a step (b), X memory cells are selected from the memory cell array multiple times, and a virtual array is established, wherein the virtual array contains plural electrical characteristic combinations, and X is a positive integer smaller than M×N. In a step (c), the plural electrical characteristic combinations are selected from the virtual array multiple times, and a multi-bit PUF code is generated.

Abstract: A semiconductor-on-insulator (SOI) structure and a method for forming the SOI structure. The method includes forming a first dielectric layer on a first semiconductor layer. A second semiconductor layer is formed over an etch stop layer. A cleaning solution is provided to a first surface of the first dielectric layer. The first dielectric layer is bonded under the second semiconductor layer in an environment having a substantially low pressure. An index guiding layer may be formed over the second semiconductor layer. A third semiconductor layer is formed over the second semiconductor layer. A distance between a top of the third semiconductor layer and a bottom of the second semiconductor layer varies between a maximum distance and a minimum distance. A planarization process is performed on the third semiconductor layer to reduce the maximum distance.

Abstract: A Compute-In-Memory (CIM) architecture includes a plurality of memories and a plurality of processing elements. Each of the processing elements has a look-up table unit configured to store values of a look-up table of a k-cluster residue number system, and output one of the values of the look-up table according to a first remainder and a second remainder as a result of a residue calculation. The look-up table unit receives the first remainder and the second remainder from one of the memories.

Abstract: An electronic device and a power supply optimization method thereof are provided. The method includes: negotiating with a power adapter through a power control protocol in a power connection state to obtain a power profile; determining whether the power adapter supports a variable charging power adjustment function according to the power profile; when the power adapter supports the variable charging power adjustment function, determining whether a stored power of a battery module is less than a power threshold; when the stored power is less than the power threshold, executing one or more of a constant current test, a constant voltage test, and a power transmission test to select an algorithm for controlling a power supply behavior of the power adapter from multiple algorithms.

Abstract: A three-dimensional vapor chamber includes a vapor chamber module and a heat pipe module. The vapor chamber module includes an upper shell structure, and the upper shell structure includes an upper shell body and an upper shell capillary structure formed in the upper shell body. The heat pipe module is fixed on the vapor chamber module and in fluid communication with the vapor chamber. In addition, the heat pipe module includes a heat pipe shell fixed on the upper shell body, and a heat pipe capillary structure formed in the heat pipe shell and connected to the upper shell capillary structure.

Abstract: An ink composition, a light conversion layer and a light emitting device are provided. The resin composition includes a quantum dot (A), a first resin (B1), a second resin (B2), an ethylenically unsaturated monomer (C), an initiator (D) and a solvent (E). The first resin (B1) is an alkali-insoluble resin, and the second resin (B2) is an alkali-soluble resin. The first resin (B1) includes a compound represented by the following Formula (1): In Formula (1), n is an integer from 1 to 10, X is benzene, toluene or naphthalene, and Y is toluene, methylnaphthalene, tetrahydrodicyclopentadiene, or 4,4?-dimethyl-1,1?-biphenyl.

Abstract: Some embodiments relate to an integrated device, including a substrate having a first side and a second side opposite the first side, the substrate being a first material; a first wire level on the first side of the substrate and having a first wire; a second wire level on the second side of the substrate and having a second wire; a through-substrate via (TSV) extending from the first wire to the second wire through the substrate; a shallow trench isolation (STI) region surrounding the TSV at the second side of the substrate; and a semiconductor region between the STI region and the TSV, the semiconductor region comprising the first material.

Abstract: The present invention provides a method for writing test parameters into board memory, comprising: establishing a channel-pin mapping table associated with each test board, the channel-pin mapping table indicating that an i-th channel among M channels corresponds to a j-th pin among N pins of the respective test board; converting each test code transmitted by the M channels at a first time into a corresponding set of test parameters; maintaining a channel-code mapping table in a test register, the channel-code mapping table storing the set of test parameters corresponding to the i-th channel among the M channels at the first time; and writing the set of test parameters corresponding to the i-th channel at the first time into a physical address of the board memory of each corresponding test board based on the channel-pin mapping table and the stored channel-code mapping table.