Abstract: An ocular optical system configured to allow imaging rays from a display image to enter an observer's eye through the ocular optical system so as to form an image is provided. A direction toward the eye is an eye side, and a direction toward the display image is a display side. The ocular optical system sequentially includes a first and a second lens elements having refracting power from the eye side to the display side along an optical axis. Each lens element includes an eye-side surface and a display-side surface. An optical axis region of the eye-side surface of the first lens element is concave. An optical axis region of the eye-side surface of the second lens element is concave.

Abstract: The present disclosure provides a packing method including following steps. Genetic algorithm is utilized to calculate multiple packing programs. Multiple candidate packing programs including all items are selected from the packing programs. Among each of the candidate packing programs, at least one of the items to be placed earlier is classified into a first subset, and at least another one of the items to be placed later is classified into a second subset. Among each of the candidate packing programs, a first packing for the first subset is maintained, and a second packing for the second subset is recalculated by using a greedy algorithm to generate an updated second packing.

Abstract: The present disclosure describes an example method for routing a standard cell with multiple pins. The method can include modifying a dimension of a pin of the standard cell, where the pin is spaced at an increased distance from a boundary of the standard cell than an original position of the pin. The method also includes routing an interconnect from the pin to a via placed on a pin track located between the pin and the boundary and inserting a keep out area between the interconnect and a pin from an adjacent standard cell. The method further includes verifying that the keep out area separates the interconnect from the pin from the adjacent standard cell by at least a predetermined distance.

Abstract: A server information handling system is secured by a bezel that couples to an access location, such as an air vent at a front or rear face of a housing. The bezel includes a security structure having a lock and configured to couple directly at the front face or with a bezel extension at the rear face so that the server information handling system can use the same bezel with both a front face or rear face rack mount. The bezel has a lock integrated with the security structure, an air filter that fits over the security structure to filter air flowing into the housing, and a filter brace that captures the air filter by coupling to the security structure over the air filter.

Abstract: A method of forming a semiconductor-on-insulator (SOI) substrate includes: forming a first dielectric layer on a first substrate; forming a buffer layer on a second substrate; forming a semiconductor cap on the buffer layer over the second substrate; forming a cleavage plane in the buffer layer; forming a second dielectric layer on the semiconductor cap after forming the cleavage plane; bonding the second dielectric layer on the second substrate to the first dielectric layer on the first substrate; performing a splitting process along the cleavage plane in the buffer layer; removing a first split buffer layer from the semiconductor cap; and removing a second split buffer layer from the second substrate.

Abstract: An automatic leveling device of a 3D printer, and a 3D printer is provided. The automatic leveling device includes a photoelectric switch, an electromagnetic assembly and a probe assembly. The photoelectric switch is arranged in a housing and defines a photosensitive groove. The electromagnetic assembly is arranged in the housing and defines a sliding hole. The probe assembly is slidably engaged in the sliding hole, and an end of the probe assembly is engaged in the photosensitive groove. The electromagnetic assembly is capable of driving the probe assembly to make the end of the probe assembly move out of the photosensitive groove. The automatic leveling device has the advantages of simple structure, low manufacturing difficulty, low production cost, simple and stable leveling mode, high detection repetition accuracy and no complex circuit and software cooperation.

Abstract: A main board, a hot plug control signal generator, and a control signal generating method thereof are provided. The hot plug control signal generator includes a controller and a latch. The controller provides a control signal. The latch is operated based on an operation power to generate a hot plug control signal. The latch sets the hot plug control signal to a disabled first logic value, and latches the hot plug control signal at the first logic value.

Abstract: A keyboard file verification method based on image processing comprises controlling a processor to perform following operations: obtaining a keyboard file; generating, according to the keyboard file, a search index and a feature image; obtaining a template image from a template database according to the search index; performing a calibration operation according to the feature image, wherein the calibration operation comprises: adjusting a resolution of the feature image according to a resolution of the template image; performing a shifting operation according to the feature image, to generate a plurality of candidate images; and comparing a key block of each of the plurality of candidate images with a key block of the template image to generate a difference map and a comparison result.

Abstract: The present specification describes examples of position-based switching of display devices. An example augmented reality (AR) device includes an AR display device to render display data. The example AR device also includes a wireless communication device to transmit and receive wireless signals. The example AR device further includes a processor to: 1) determine a position of the AR device relative to a computing device based on wireless signals communicated with the computing device; and 2) switch an activity state of the AR display device based on the determined position of the AR device relative to the computing device.

Abstract: An intelligent early screening model for Alzheimer's disease and a construction method thereof are provided. The construction method includes: retrieving keywords by means of a database to obtain influence factors of the Alzheimer's disease; extracting common feature data of Alzheimer's disease patients from big data in healthcare of a sample region; combining the influence factors and the common feature data, and then inputting into a machine learning model for learning; and verifying and evaluating performance of the machine learning model. The intelligent early screening model for the Alzheimer's disease is constructed through the construction method. The intelligent early screening model can capture Alzheimer's disease high-risk elderly population in common elderly population in advance, realizing early prevention and achieving a goal of eliminating the disease and treating the disease.

Abstract: A lithium battery structure is provided. The lithium battery structure includes a first metal layer including aluminum foil or stainless steel foil, a second metal layer including copper foil, nickel foil or stainless steel foil, a separator, a first electrode layer, a second electrode layer, and a first functional layer including a first composition. The separator is disposed between the first metal layer and the second metal layer. The first electrode layer is disposed between the first metal layer and the separator. The second electrode layer is disposed between the second metal layer and the separator. The first functional layer is disposed between the first metal layer and the first electrode layer. The first composition includes 20-80 parts by weight of flake conductive material, 1-30 parts by weight of spherical conductive material, 10-50 parts by weight of thermoplastic elastomer and 1-25 parts by weight of nitrogen-containing hyperbranched polymer.

Abstract: A method of fabricating a semiconductor device is described. A plurality of semiconductor fins is formed in a first region on a substrate. An isolation region is formed around the plurality of semiconductor fins. Dummy fins are formed extending above the isolation region and laterally adjacent the plurality of semiconductor fins. A first etch is performed to etch the plurality of semiconductor fins such that a top surface of the plurality of semiconductor fins has a same height as a top surface of the isolation region. A second etch is performed selectively etching the isolation region to form a first recess in the isolation region laterally adjacent the semiconductor fins. A third etch is performed selectively etching the plurality of semiconductor fins to remove the plurality of semiconductor fins and to etch a second recess through the isolation region into the semiconductor substrate.

Abstract: Methods for fractionating a sample of biomolecules of the disclosure comprise (a) introducing a sample into a separating column; (b) separating biomolecules in the sample by molecular weight into a plurality of fractions along the separating column; and (c) placing the separating column into successive engagement with a plurality of wells and advancing into each of the wells one or more of the corresponding plurality of fractions. Methods of the disclosure further comprise detecting and identifying biomolecules in the fractions using microparticles to bind to the fractions, and novel approaches to pool the fractions followed by assays—such as immunoassays—that allow high throughput and automation capabilities.

Abstract: A pet restraint bag includes an outer layer body including a first open end having a first closing member selectively closing the first open end, a closed end, and a first extension portion having a length having two ends respectively connected to the first open end and the closed end, the outer layer body having an internal receiving space, the first extension portion having a through opening; and an inner layer body receivable in the receiving space and including a second open end having a second closing member selectively closing the second open end, a third open end, and a second extension portion having a length having two ends respectively connected to the second open end and the third open end, the third open end being connected to an inside of the first extension portion.

Abstract: A semiconductor device and method of fabricating the same are disclosed. The method includes depositing a polysilicon gate layer over a gate dielectric formed over a surface of a substrate in a peripheral region, forming a dielectric layer over the polysilicon gate layer and depositing a height-enhancing (HE) film over the dielectric layer. The HE film, the dielectric layer, the polysilicon gate layer and the gate dielectric are then patterned for a high-voltage Field Effect Transistor (HVFET) gate to be formed in the peripheral region. A high energy implant is performed to form at least one lightly doped region in a source or drain region in the substrate adjacent to the HVFET gate. The HE film is then removed, and a low voltage (LV) logic FET formed on the substrate in the peripheral region. In one embodiment, the LV logic FET is a high-k metal-gate logic FET.

Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.

Abstract: Techniques are provided herein to form semiconductor devices that include a gate cut formed after the formation of source or drain contacts and with a top surface that is substantially coplanar with a top surface of the source or drain contacts. An example semiconductor device includes a gate structure around or otherwise on a semiconductor region and a dielectric layer present on a top surface of the gate structure. Conductive contacts are formed over source and drain regions along a source/drain contact recess or trench. The gate structure may be interrupted with a gate cut that extends through an entire thickness of the gate structure and includes a dielectric material. A top surface of the gate cut may be polished until it is substantially coplanar with a top surface of the dielectric layer over the gate structure and a top surface of the source or drain contacts.

Abstract: Methods for forming a CPODE structure with reduced leakage current are disclosed herein. The CPODE structure is formed by etching away a pair of fins and forming a pair of trenches in the substrate where the pair of fins was originally located. A leakage path may be present in the area between the pair of fins. The etching is performed by cycling continuously plasma etch until the trenches are formed. The plasma etch removes any byproducts that may be formed during the fin etch which could reduce or stop the etching of the fins, the area between the pair of fins, and the substrate.