Patents by Inventor Chun-Cheng Liu

Chun-Cheng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Successive approximation ADC with binary error tolerance mechanism
    Patent number: 7724174
    Abstract: A successive approximation ADC is disclosed. A comparator receives and compares a sampled input signal and an output of a DAC. Non-binary successive approximation register (SAR) control logic controls sampling of the input signal and controls a sequence of comparisons based on comparison result of the comparator. The SAR control logic controls each comparison when signal or charge in the DAC has not been completely settled. A binary-error-tolerant corrector is then used to compensate the sampling error.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: May 25, 2010
    Assignees: Himas Media Solutions, Inc., NCKU Research and Development Foundation
    Inventors: Soon-Jyh Chang, Chun-Cheng Liu, Chih-Haur Huang
  • SUCCESSIVE APPROXIMATION ADC WITH BINARY ERROR TOLERANCE MECHANISM
    Publication number: 20100085225
    Abstract: A successive approximation ADC is disclosed. A comparator receives and compares a sampled input signal and an output of a DAC. Non-binary successive approximation register (SAR) control logic controls sampling of the input signal and controls a sequence of comparisons based on comparison result of the comparator. The SAR control logic controls each comparison when signal or charge in the DAC has not been completely settled. A binary-error-tolerant corrector is then used to compensate the sampling error.
    Type: Application
    Filed: October 7, 2008
    Publication date: April 8, 2010
    Inventors: Soon-Jyh Chang, Chun-Cheng Liu, Chih-Haur Huang