Patents by Inventor Chun-Chieh Fang

Chun-Chieh Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170236864
    Abstract: A semiconductor device includes a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes recesses in the second surface, and surfaces of each of the recesses are wet etched surfaces. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.
    Type: Application
    Filed: May 3, 2017
    Publication date: August 17, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chang HUANG, Wei-Tung HUANG, Yen-Hsiang HSU, Yu-Lung YEH, Chun-Chieh FANG
  • Publication number: 20170194190
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 6, 2017
    Inventors: CHING-CHUNG SU, JIECH-FUN LU, JIAN WU, CHE-HSIANG HSUEH, MING-CHI WU, CHI-YUAN WEN, CHUN-CHIEH FANG, YU-LUNG YEH
  • Patent number: 9666619
    Abstract: A semiconductor device includes a carrier, a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes inverted pyramid recesses in the second surface. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: May 30, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chang Huang, Wei-Tung Huang, Yen-Hsiang Hsu, Yu-Lung Yeh, Chun-Chieh Fang
  • Publication number: 20160372360
    Abstract: A semiconductor structure is provided, which includes a semiconductor substrate, a first well region, a second well region, an active region, a shallow trench isolation (STI) and at least one deep trench isolation (DTI). The first well region of a first conductive type is on the semiconductor substrate. The second well region of a second conductive type is on the semiconductor substrate and adjacent to the first well region. The second conductive type is different from the first conductive type. The active region is on the first well region. The active region has a conductive type the same as the second conductive type of the second well region. The STI is between the first and second well regions. The DTI is below the STI. The DTI is disposed between at least a portion of the first well region and at least a portion of the second well region.
    Type: Application
    Filed: June 17, 2015
    Publication date: December 22, 2016
    Inventors: Chun-Chieh FANG, Chien-Chang HUANG, Chi-Yuan WEN, Jian WU, Ming-Chi WU, Jung-Yu CHENG, Shih-Shiung CHEN, Wei-Tung HUANG, Yu-Lung YEH
  • Publication number: 20160307946
    Abstract: A semiconductor device includes a carrier, a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes inverted pyramid recesses in the second surface. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.
    Type: Application
    Filed: April 16, 2015
    Publication date: October 20, 2016
    Inventors: Chien-Chang HUANG, Wei-Tung HUANG, Yen-Hsiang HSU, Yu-Lung YEH, Chun-Chieh FANG
  • Publication number: 20130183801
    Abstract: A method for manufacturing semiconductor devices includes providing a substrate having a first region and a second region defined thereon, and a shallow trench isolation (STI) formed in between the first region and the second region, the first region comprising a first gate structure and the second region comprising a second gate structure respectively formed therein; forming a patterned protecting layer covering at least the entire STI and the second region on the substrate; forming recesses not exposing the STI in the substrate respectively at two sides of the first gate structure; and forming an epitaxial layer in the recesses respectively, the epitaxial layer filling up the recesses.
    Type: Application
    Filed: January 18, 2012
    Publication date: July 18, 2013
    Inventors: Tsung-Min Kuo, Feng-Mou Chen, Wei-Che Chen, Chun-Chieh Fang
  • Patent number: 7943511
    Abstract: A semiconductor process is provided. First, a substrate having a dielectric layer formed thereon is provided. Thereafter, an interconnection structure including copper is formed in the dielectric layer. Afterwards, a metal layer is formed on the dielectric layer. The metal layer is then patterned to form a pad. An annealing process is performed, wherein the gas source for the annealing process includes hydrogen in a concentration of 50% to 90%.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: May 17, 2011
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Chieh Fang, Po-Jong Chen, Tsung-Min Kuo
  • Publication number: 20090190629
    Abstract: A temperature sensing device for improving series resistance cancellation mechanism includes a temperature sensing unit, a signal processing unit, a first current source, a second current source, a third current source, a first switch, a second switch, and a third switch. A control circuit generates a first control signal, a second control signal and a third control signal for controlling the first current source, the second current source and the third current source so as to drive the temperature sensing unit, wherein the first control signal, the second control signal and the third control signal are outputted from the control circuit according to a specific cycle formed by a plurality of switches between the first control signal and the second control signal and a switch between the first control signal and the third control signal.
    Type: Application
    Filed: May 26, 2008
    Publication date: July 30, 2009
    Inventors: Chun-Chieh Fang, Chih-Yung Tsau
  • Publication number: 20020076934
    Abstract: A method of removaling photoresistance is disclosed: first, unqualified pattern on the substrate is taken away by a plasma process under a mixture of oxygen and fluorocarbon gases. Thereafter, the polymer, which is produced by reaction between the plasma and photoresist, is removed by organic solvent (ACT690/NMP). When the plasma process is applied, the plasma process also could over-etch in the silicon-oxy-nitride layer and the polymer is entirely taken off in the plasma process. Silicon-oxy-nitride is then deposited to complement the loss part in the plasma process. After that, lithography process repeats again to form a new pattern. Finally, ADI is performed to make sure if the new pattern is in the acceptable range of the process. Next, metal layer and silicon-oxy-nitride layer are patterned by the new pattern to form the interconnect.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 20, 2002
    Inventors: Chun-Chieh Fang, Po-Sheng Hu, Yu-Chun Ho