Abstract: A method of forming an integrated circuit comprises forming a first doped region in a substrate using a first angle ion implantation performed on a first side of a gate structure. The gate structure has a length in a first direction and a width in a second direction. The method also comprises forming a second doped region in the substrate using a second angle ion implantation performed on a second side of the gate structure. The first angle ion implantation has a first implantation angle with respect to the second direction and the second angle ion implantation has a second implantation angle with respect to the second direction. Each of the first implantation angle and the second implantation angle is substantially larger than 0° and less than 90°.

Abstract: An integrated circuit layout includes a first active region, a second active region, a first PODE (poly on OD edge), a second PODE, a first transistor and a second transistor. The first transistor, on the first active region, includes a gate electrode, a source region and a drain region. The second transistor, on the second active region, includes a gate electrode, a source region and a drain region. The first active region and the second active region are adjacent and electrically disconnected with each other. The first PODE and the second PODE are on respective adjacent edges of the first active region and the second active region. The source regions of the first and second transistor are adjacent with the first PODE and the second PODE respectively. The first PODE and the second PODE are sandwiched between source regions of the first transistor and the second transistor.

Abstract: The present invention relates to a method for merging regions in the image/video, capable of merging plural of image regions into an image merging region. In the disclosed method, these image regions are first sequenced basing on their compactness value. Then, one of these image regions is designated as a reference image region, and a merging test process is executed by merging the reference image region with one of the nearby image regions thereof in sequence, for forming a temporal image merging region. Later, the compactness value of the temporal image merging region is compared with the compactness value of the two consisting image regions thereof, respectively. When the compactness value of the temporal image merging region is larger than either one of the compactness value of the two consisting image regions thereof, the temporal image merging region is designated as an image merging region.

Abstract: An antenna cell for preventing plasma enhanced gate dielectric failures, is provided. The antenna cell design utilizes a polysilicon lead as a gate for a dummy transistor. The polysilicon lead may be one of a group of parallel, nested polysilicon lead. The dummy transistor includes the gate coupled to a substrate maintained at VSS, either directly through a metal lead or indirectly through a tie-low cell. The gate is disposed over a dielectric disposed over a continuous source/drain region in which the source and drain are tied together. A diode is formed with the semiconductor substrate within which it is formed. The source/drain region is coupled to another metal lead which may be an input pin and is coupled to active transistor gates, preventing plasma enhanced gate dielectric damage to the active transistors.

Abstract: A semiconductor device and a method for fabricating the semiconductor device are disclosed. A gate stack is formed over a substrate. A spacer is formed adjoining a sidewall of the gate stack. A recess is formed between the spacer and the substrate. Then, a strained feature is formed in the recess. The disclosed method provides an improved method by providing a space between the spacer and the substrate for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance.

Abstract: The charge pump system includes a clock generator, a boosting unit determination device, a charge pump circuit, and a voltage regulator. The clock generator is used for generating a clock group. The boosting unit determination device is used for generating a number control signal. The charge pump circuit is used for receiving an operating voltage, the number control signal and the clock group, and generating an output voltage. The charge pump circuit includes plural boosting units. A first portion of the plural boosting units are controlled by the clock group according to the number control signal. The operating voltage is converted into an output voltage by the first portion of the plural boosting units. The voltage regulator is used for receiving the output voltage and converting the output voltage into a specified regulated voltage.

Abstract: A data driving apparatus includes two data driving circuits, each including a timing controller with a clock generator and configured to receive a specific portion of data corresponding to a row of pixel in an image frame, and, after receiving the specific portion of the data, process the portion of the data; wherein the two timing controllers have different data operation times. One timing controller outputs an enable command to another one once the processing of the respective portion of the data is complete. Then, another timing controller starts to process the respective portion of the data and output an output command to the first data driving circuit in response to a finish of the processing of the second portion of the data and thereby controlling the two data driving circuits to output the processed data. An operation method thereof and a display using the same are also provided.

Abstract: An integrated circuit is manufactured by a predetermined manufacturing process having a nominal minimum pitch of metal lines. The integrated circuit includes a plurality of metal lines extending along a first direction and a plurality of standard cells under the plurality of metal lines. The plurality of metal lines is separated, in a second direction perpendicular to the first direction, by integral multiples of the nominal minimum pitch. The plurality of standard cells includes a first standard cell configured to perform a predetermined function and having a first layout and a second standard cell configured to perform the predetermined function and having a second layout different than the first layout. The first and second standard cells have a cell height (H) along the second direction, and the cell height being a non-integral multiple of the nominal minimum pitch.

Abstract: A semiconductor structure includes a first active area structure, an isolation structure surrounding the first active area structure, a first polysilicon structure, a first metal structure, and a second metal structure. The first polysilicon structure is over the first active area structure. The first metal structure is directly over a first portion of the first active area structure. The second metal structure is directly over and in contact with a portion of the first polysilicon structure and in contact with the first metal structure.

Abstract: An integrated circuit, manufactured by a process having a nominal minimum pitch of metal lines, includes a plurality of metal lines and a plurality of standard cells under the plurality of metal lines. The plurality of metal lines extends along a first direction, and the plurality of metal lines are separated, in a second direction perpendicular to the first direction, by integral multiples of the nominal minimum pitch. At least one of the plurality of standard cells has a cell height along the second direction, and the cell height is a non-integral multiple of the nominal minimum pitch.

Abstract: An antenna cell for preventing plasma enhanced gate dielectric failures, is provided. The antenna cell design utilizes a polysilicon lead as a gate for a dummy transistor. The polysilicon lead may be one of a group of parallel, nested polysilicon lead. The dummy transistor includes the gate coupled to a substrate maintained at VSS, either directly through a metal lead or indirectly through a tie-low cell. The gate is disposed over a dielectric disposed over a continuous source/drain region in which the source and drain are tied together. A diode is formed with the semiconductor substrate within which it is formed. The source/drain region is coupled to another metal lead which may be an input pin and is coupled to active transistor gates, preventing plasma enhanced gate dielectric damage to the active transistors.

Abstract: A method of forming an integrated circuit includes forming a plurality of gate structures longitudinally arranged along a first direction over a substrate. A plurality of angle ion implantations are performed to the substrate. Each of the angle ion implantations has a respective implantation angle with respect to a second direction. The second direction is substantially parallel with a surface of the substrate and substantially orthogonal to the first direction. Each of the implantation angles is substantially larger than 0°.

Abstract: The present invention provides a method for reducing an allergic response and treating or preventing an allergic disease, comprising administering a subject in need thereof a therapeutically effective amount of the active ingredient for the treatment or the prevention of allergic diseases, wherein the active ingredient is glyceraldehyde-3-phosphate Dehydrogenase (G3PDH) or the functional variant or fragment thereof. The G3PDH can be isolated from Lactobacillus gasseri PM-A0005 (deposited under Budapest Treaty in the China Center for Type Culture Collection (CCTCC) with Deposit No: M 207039), as well as extract, fraction, and sub-fraction thereof.

Abstract: A golf club head alloy includes 7-9.5 wt % of aluminum, 0.5-2 wt % of vanadium, 0.05-0.4 wt % of silicon, less than 0.4 wt % of iron, less than 0.15 wt % of oxygen, less than 0.1 wt % of carbon, less than 0.05 wt % of nitrogen, with the rest being titanium. The golf club head alloy has a density of 4.32-4.35 g/cm3. A method uses the golf club head alloy to produce a sheet material for a club head striking plate. The method includes smelting the golf club head alloy into a titanium alloy rod, and repeatedly heating the titanium alloy rod and forging the titanium alloy rod into a flat blank. The flat blank is hot rolled to form a thin blank, wherein the flat blank has a reduction ratio of 70-75%. The thin blank is cold rolled into an alloy sheet material, and the alloy sheet material is annealed to form a sheet material for a club head striking plate.

Abstract: A method to manufacture cushion composite structure utilizes a mold including a first mold body and a second mold body wherein at least one thereof forms a mold room. The method includes the following steps: injecting foam material into the mold room, placing a compressible core into the mold room, closing the mold, rotating the mold and foaming the foam material to fill up the mold room, and removing the mold to form the cushion composite structure. Thereby, the core is embedded in the foam material at a predetermined position, and parting line on surface of the cushion composite structure is prevented.

Abstract: A circuit protection apparatus is disclosed. A peripheral interface includes a first power node and a second power node. The circuit protection apparatus includes an auxiliary power supply circuit, a power converter, a first switch, a second switch, a power switch circuit, a warning circuit, and a controller. When a load is plugged to the peripheral interface, the first switch turns on, and the controller is enabled and outputs a control signal, so as to drive the power converter to output power. When the current between input terminal and output terminal of the power switch circuit is larger than a predetermined current, the controller receives the error flag logical voltage outputted by the power switch circuit, cuts off the current between input terminal and output terminal of the power switch circuit, and stops the operations of the power converter.

Abstract: A remote controller generates control signals according to the speed of movement sensed by a three-axis accelerometer and the direction of movement sensed by a gyroscope and transmits the control signals to a remotely controlled device communicating with the remote controller when the remote controller is in a first work mode, generates control signals according to touch sensing signals from a touch pad and transmits the control signals to the remotely controlled device when the remote controller is in a second work mode, and further generates control signals according to variations in the capacitance of the capacitive type pressure transducer unit and transmits the control signals to the remotely controlled device when the remote controller is in a third work mode.

Abstract: A holding aid of the present invention includes an attachment mechanism, two masks, and a hand holding structure. The attachment mechanism is used for attaching on an electronic product. The masks are connected to the attachment mechanism for covering the electronic product. The hand holding structure includes one or several gashes which are formed on the masks. Thus, user's hand can penetrate through the gashes for holding. Therefore, it is realized that functions of covering and sheltering and easy holding are provided by single accessory.

Abstract: A method for image/video segmentation, capable of segmenting an image signal for obtaining plural texture color feature regions, by utilizing both of the advantages carried by the texture feature and the color feature is disclosed. The method comprises the following steps: (A) receiving an image signal including plural image pixels; (B) executing a Gabor filtering process and a value operation process on each of the plural image pixels; (C) designating each of the plural image pixels a corresponding texture feature vector basing on the result of the value operation process; (D) executing a segmentation process on the image signal basing on the texture feature vector of each of the plural image pixels, for obtaining plural texture feature regions; and (E) executing a re-segmentation process on plural color feature regions basing on the distribution of the plural texture feature regions, for obtaining plural texture color feature regions.

Abstract: A driving circuit of a light emitting diode (LED) and a ghost phenomenon elimination circuit thereof are disclosed. The ghost phenomenon elimination circuit which includes a ghost phenomenon elimination unit and a counter unit may determine a black insertion period according to a gray scale clock signal, and output an enable signal to the ghost phenomenon elimination unit during the black insertion period. The ghost phenomenon elimination unit may pull up the voltage levels at current driving terminals of the driving circuit so as to prevent the ghost phenomenon from occurring.