Patents by Inventor Chun-Hao Huang

Chun-Hao Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964358
    Abstract: A method includes placing a polisher head on platen, the polisher head including a set of first magnets, and controlling a set of second magnets to rotate the polisher head on the platen, wherein controlling the set of second magnets includes reversing the polarity of at least one second magnet of the set of second magnets to produce a magnetic force on at least one first magnet of the set of first magnets, wherein the set of second magnets are external to the polisher head.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yu Wang, Chun-Hao Kung, Ching-Hsiang Tsai, Kei-Wei Chen, Hui-Chi Huang
  • Publication number: 20240123151
    Abstract: An insertion device includes an upper casing, an insertion module and a lower casing. The insertion module is disposed in the upper casing, and includes a main body assembly, an insertion seat, a first elastic member, a retraction seat and a second elastic member. When the upper casing is depressed, the insertion seat is driven by the first elastic member to perform an automatic-insertion operation, such that limiting structure between the insertion seat and the retraction seat collapses upon the collapse of another limiting structure between the insertion seat and the main body assembly, and that the retraction seat is driven by the second elastic member to perform an automatic-retraction operation.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Chun-Mu Huang, Chieh-Hsing Chen, Chen-Hao Lee, Kuan-Lin Chang
  • Publication number: 20240120402
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.
    Type: Application
    Filed: November 19, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jia-Ni YU, Kuo-Cheng CHIANG, Mao-Lin HUANG, Lung-Kun CHU, Chung-Wei HSU, Chun-Fu LU, Chih-Hao WANG, Kuan-Lun CHENG
  • Patent number: 11950902
    Abstract: The present invention provides a micro biosensor for reducing a measurement interference when measuring a target analyte in the biofluid, including: a substrate; a first working electrode configured on the surface, and including a first sensing section; a second working electrode configured on the surface, and including a second sensing section which is configured adjacent to at least one side of the first sensing section; and a chemical reagent covered on at least a portion of the first sensing section for reacting with the target analyte to produce a resultant. When the first working electrode is driven by a first working voltage, the first sensing section measures a physiological signal with respect to the target analyte. When the second working electrode is driven by a second working voltage, the second conductive material can directly consume the interferant so as to continuously reduce the measurement inference of the physiological signal.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 9, 2024
    Assignee: Bionime Corporation
    Inventors: Chun-Mu Huang, Chieh-Hsing Chen, Heng-Chia Chang, Chi-Hao Chen, Pi-Hsuan Chen
  • Publication number: 20240113195
    Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia-Ni YU, Lung-Kun CHU, Chun-Fu LU, Chung-Wei HSU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20240113143
    Abstract: Various embodiments of the present disclosure are directed towards an imaging device including a first image sensor element and a second image sensor element respectively comprising a pixel unit disposed within a semiconductor substrate. The first image sensor element is adjacent to the second image sensor element. A first micro-lens overlies the first image sensor element and is laterally shifted from a center of the pixel unit of the first image sensor element by a first lens shift amount. A second micro-lens overlies the second image sensor element and is laterally shifted from a center of the pixel unit of the second image sensor element by a second lens shift amount different from the first lens shift amount.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 4, 2024
    Inventors: Cheng Yu Huang, Wen-Hau Wu, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Chih-Kung Chang
  • Publication number: 20240113615
    Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 4, 2024
    Inventors: Chun-Hao HUANG, Chun-Wei LIN, I-Hsiang SHIH, Ching-Nan WU, Jia-Wei YEH
  • Patent number: 11948278
    Abstract: An image quality improvement method and an image processing apparatus using the same are provided. Denoising filtering is performed to an original image by a filter to obtain a preliminary processing image. The preliminary processing image is input to a multi-stage convolutional network model to generate an optimization image through the multi-stage convolutional network model. The multi-stage convolutional network model includes multiple convolutional network sub-models, and these convolutional network sub-models respectively correspond to different network architectures.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: April 2, 2024
    Assignee: National Chengchi University
    Inventors: Yan-Tsung Peng, Sha-Wo Huang, Ming-Hao Lin, Chin-Hsien Wu, Chun-Lin Tang
  • Publication number: 20240094774
    Abstract: A foldable electronic apparatus is provided and includes a base unit and a display unit. The display unit includes a main panel body having a first side and a bottom side substantially perpendicular to each other, and the bottom side is connected to the base unit; a first folding module disposed on the first side; a first side panel body disposed on the first folding module, and the first side panel body is able to transform between a first unfolded state and a first folded state relative to the main panel body with the first folding module as an axis; and a flexible screen disposed on the main panel body, the first folding module and the first side panel body, and the flexible screen includes a first bendable area corresponding to the first folding module.
    Type: Application
    Filed: August 22, 2023
    Publication date: March 21, 2024
    Applicant: SYNCMOLD ENTERPRISE CORP.
    Inventors: Ching-Hui YEN, Chun-Hao HUANG, Chien-Cheng YEH
  • Publication number: 20240096994
    Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.
    Type: Application
    Filed: February 10, 2023
    Publication date: March 21, 2024
    Inventors: Lung-Kun CHU, Jia-Ni YU, Chun-Fu LU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20240087915
    Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: Yen-Hao HUANG, Chun-Yi CHEN, I-Shi WANG, Yin-Tun CHOU, Yuan-Hsin CHI, Sheng-Yuan LIN
  • Publication number: 20240088182
    Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Chien Yu, Ting-Cheng Chang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20240087951
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20240080382
    Abstract: A foldable electronic device is provided and includes a central base, a torque module, two wing members, two transmission members, two panel bodies, two connecting rods, two drop plates, a synchronous module and a flexible screen. The torque module is disposed on the central base, the wing members pivot relative to the central base, the transmission members are pivotally connected to the torque module and the central base, the panel bodies pivot relative to the wing members and linearly slide relative to the transmission members, the connecting rods pivot relative to the wing members, the drop plates pivot relative to the panel bodies and the connecting rods, the synchronous module drives the transmission members to reverse synchronously, and the flexible screen is arranged on the panel bodies, the drop plates and the wing members and includes a bendable area.
    Type: Application
    Filed: April 25, 2023
    Publication date: March 7, 2024
    Applicant: SYNCMOLD ENTERPRISE CORP.
    Inventors: Chun-Hao Huang, Chien-Cheng Yeh
  • Publication number: 20240081005
    Abstract: A flexible screen comprises a multi-layer display structure and a covering structure. The multi-layer display structure includes an outer surface and an inner surface opposite to the outer surface, and the inner surface faces towards the foldable electronic device. The covering structure is disposed on the outer surface of the multi-layer display structure and includes a substrate layer and a plurality of nano-protrusions. The nano-protrusions are formed in array on at least one side of the substrate layer. The flexible screen can transform between an unfolded state and a folded state, and a bending section is partially formed when the flexible screen is in the folded state. The nano-protrusions located in the bending section can release the stress generated in the bending section when the flexible screen transform between the unfolded state and the folded state.
    Type: Application
    Filed: May 30, 2023
    Publication date: March 7, 2024
    Inventors: Chun-Hao HUANG, Ching-Hui YEN, Chien-Cheng YEH
  • Patent number: 11923386
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first photodetector disposed in a first pixel region of a semiconductor substrate and a second photodetector disposed in a second pixel region of the semiconductor substrate. The second photodetector is laterally separated from the first photodetector. A first diffuser is disposed along a back-side of the semiconductor substrate and over the first photodetector. A second diffuser is disposed along the back-side of the semiconductor substrate and over the second photodetector. A first midline of the first pixel region and a second midline of the second pixel region are both disposed laterally between the first diffuser and the second diffuser.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11916084
    Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: February 27, 2024
    Assignee: AUO Corporation
    Inventors: Chun-Yu Lin, Kun-Cheng Tien, Jia-Long Wu, Ming-Lung Chen, Shu-Hao Huang
  • Patent number: 11907738
    Abstract: An image processing method applied to a display device having a processing circuit and a screen and includes: receiving a first image from one of a plurality of electronic devices; detecting whether the first image has a black border area; and if the first image has the black border area, performing a first display operation, wherein performing the first display operation includes: removing the black border area of the first image, to generate a second image; adjusting the size of the second image according to the size of a display area of the screen; calculating a first blank area of the screen based on the adjusted second image; requesting a third image from another one of the electronic devices according to the size of the first blank area; and filling the display area of the screen with the adjusted second image and the third image.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: February 20, 2024
    Assignee: Realtek Semiconductor Corporation
    Inventors: Yuh-Wey Lin, Chun-Hao Huang
  • Publication number: 20240046852
    Abstract: An image processing method and a display device are provided. The image processing method is suitable for the display device. The display device includes an image processor and a panel module. The image processing method includes: when the image processor receives a notification signal from a source to switch the display format, the image processor stores a current image frame in a memory. The image processor provides the current image frame to the panel module, so that the panel module displays the current image frame. The image processor is re-handshaking with the source and the panel module to receive a new image frame provided by the source, and the image processor transmits the new image frame to the panel module, so that the panel module displays the new image frame.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 8, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yuh-Wey Lin, Chun-Hao Huang
  • Patent number: D1021220
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: April 2, 2024
    Assignee: Radiant Opto-Electronics Corporation
    Inventors: Cheng-Ang Chang, Guo-Hao Huang, Chun-Yi Sun, Chih-Hung Ju, Pin-Tsung Wang