Patents by Inventor Chun-Hsiang FAN

Chun-Hsiang FAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150357472
    Abstract: The present disclosure provides a quantum well fin field effect transistor (QWFinFET). The QWFinFET includes a semiconductor fin over a substrate and a combo quantum well (QW) structure over the semiconductor fin. The combo QW structure includes a QW structure over a top portion of the semiconductor fin and a middle portion of the semiconductor fin. The semiconductor fin and the QW comprise different semiconductor materials. The QWFinFET also includes a gate stack over the combo QW structure.
    Type: Application
    Filed: June 6, 2014
    Publication date: December 10, 2015
    Inventors: Yu-Lien Huang, Chun-Hsiang Fan, Yung-Ta Li
  • Patent number: 9159552
    Abstract: A method includes forming isolation regions in a semiconductor substrate, forming a first semiconductor strip between opposite portions of isolation regions, forming a second semiconductor strip overlying and contacting the first semiconductor strip, and performing a first recessing to recess the isolation regions. A portion of the second semiconductor strip over top surfaces of remaining portions of the isolation regions forms a semiconductor fin. A second recessing is performed to recess the isolation regions to extend the semiconductor fin downwardly, with an inter-diffusion region of the first semiconductor strip and the second semiconductor strip being exposed after the second recessing. The inter-diffusion region is then etched.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: October 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsiang Fan, Kun-Yen Lu, Yu-Lien Huang, Ming-Huan Tsai
  • Patent number: 9130059
    Abstract: A method of semiconductor device fabrication includes forming a first dummy gate structure in a first region of a semiconductor substrate and forming a second dummy gate structure in a second region of the semiconductor substrate. A protective layer (e.g., oxide and/or silicon nitride hard mask) is formed on the second dummy gate structure. The first dummy gate structure is removed after forming the protective layer, thereby providing a first trench. A capping layer (e.g., silicon) is formed in the first trench. A metal gate structure may be formed on the capping layer. The protective layer may protect the second dummy gate structure during the removal of the first dummy gate structure.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: September 8, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsu-Hsiu Perng, Zhao-Cheng Chen, Chun-Hsiang Fan, Ming-Huan Tsai
  • Publication number: 20150243659
    Abstract: A shallow trench isolation (STI) structure is formed on a substrate. Part of the STI structure is removed to form a first fin structure and a second fin structure extending above a support structure on the substrate. A first part of the STI structure is located between the first fin structure and the second fin structure and has a first top surface higher than an interface between the first fin structure and the support structure. A second part of the STI structure is located adjacent to the first fin structure and has a second top surface lower than the interface between the first fin structure and the support structure. An etching process is performed to remove part of the first fin structure and the second fin structure. Part of the support structure adjacent to the second part of the STI structure is removed during the etching process.
    Type: Application
    Filed: February 26, 2014
    Publication date: August 27, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: YU-LIEN HUANG, CHI-KANG LIU, YUNG-TA LI, CHUN-HSIANG FAN, TUNG-YING LEE, Clement HSING-JEN WANN
  • Publication number: 20150187571
    Abstract: A method includes forming isolation regions in a semiconductor substrate, forming a first semiconductor strip between opposite portions of isolation regions, forming a second semiconductor strip overlying and contacting the first semiconductor strip, and performing a first recessing to recess the isolation regions. A portion of the second semiconductor strip over top surfaces of remaining portions of the isolation regions forms a semiconductor fin. A second recessing is performed to recess the isolation regions to extend the semiconductor fin downwardly, with an inter-diffusion region of the first semiconductor strip and the second semiconductor strip being exposed after the second recessing. The inter-diffusion region is then etched.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 2, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsiang Fan, Kun-Yen Lu, Yu-Lien Huang, Ming-Huan Tsai
  • Publication number: 20150171187
    Abstract: A finFET and methods for forming a finFET are disclosed. A structure comprises a substrate, a fin, a gate dielectric, and a gate electrode. The substrate comprises the fin. The fin has a major surface portion of a sidewall, and the major surface portion comprises at least one lattice shift. The at least one lattice shift comprises an inward or outward shift relative to a center of the fin. The gate dielectric is on the major surface portion of the sidewall. The gate electrode is on the gate dielectric.
    Type: Application
    Filed: February 19, 2015
    Publication date: June 18, 2015
    Inventors: Yu-Lien Huang, Chun-Hsiang Fan, Tsu-Hsiu Perng, Chi-Kang Liu, Yung-Ta Li, Ming-Huan Tsai, Clement Hsingjen Wann, Chi-Wen Liu
  • Patent number: 8999522
    Abstract: A 6H-indolo[2,3-b]quinoxaline derivative has a structure of formula (I). R9 is a member selected from the group consisted of an aryl group having one or more substituents and a heteroaryl group having one or more substituents, and R1 to R8 are substituents. The 6H-indolo[2,3-b]quinoxaline derivative of the present invention incorporates an indole and a quinoxaline group therefore inherits good energy transfer ability from indole and good electron-injection ability from quinoxaline. The compound of the present invention may function as a host material or a dopant in the light-emitting layer. In addition, the compound of the present invention may function as hole transport material, electron transport material, hole blocking material, electron blocking material, hole injecting material or electron injecting material.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: April 7, 2015
    Assignee: National Tsing Hua University
    Inventors: Chien-Hong Cheng, Chun-Hsiang Fan
  • Patent number: 8987791
    Abstract: A finFET and methods for forming a finFET are disclosed. A structure comprises a substrate, a fin, a gate dielectric, and a gate electrode. The substrate comprises the fin. The fin has a major surface portion of a sidewall, and the major surface portion comprises at least one lattice shift. The at least one lattice shift comprises an inward or outward shift relative to a center of the fin. The gate dielectric is on the major surface portion of the sidewall. The gate electrode is on the gate dielectric.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: March 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Lien Huang, Chun-Hsiang Fan, Tsu-Hsiu Perng, Chi-Kang Liu, Yung-Ta Li, Ming-Huan Tsai, Clement Hsingjen Wann, Chi-Wen Liu
  • Publication number: 20150001468
    Abstract: FETs and methods for forming FETs are disclosed. A structure comprises a substrate, a gate dielectric and a gate electrode. The substrate comprises a fin, and the fin comprises an epitaxial channel region. The epitaxial channel has a major surface portion of an exterior surface. The major surface portion comprising at least one lattice shift, and the at least one lattice shift comprises an inward or outward shift relative to a center of the fin. The gate dielectric is on the major surface portion of the exterior surface. The gate electrode is on the gate dielectric.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 1, 2015
    Inventors: Yu-Lien Huang, Chun-Hsiang Fan, Tung Ying Lee, Chi-Wen Liu
  • Publication number: 20140252432
    Abstract: A semiconductor device includes a substrate and a gate structure formed over the substrate. The semiconductor device further includes an insulator feature formed in the substrate. The insulator feature includes an insulating layer and a capping layer over the insulating layer.
    Type: Application
    Filed: May 15, 2013
    Publication date: September 11, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Lien Huang, Tung Ying Lee, Pei-Yi Lin, Chun-Hsiang Fan, Sheng-Wen Yu, Neng-Kuo Chen, Ming-Huan Tsai
  • Publication number: 20140239354
    Abstract: A finFET and methods for forming a finFET are disclosed. A structure comprises a substrate, a fin, a gate dielectric, and a gate electrode. The substrate comprises the fin. The fin has a major surface portion of a sidewall, and the major surface portion comprises at least one lattice shift. The at least one lattice shift comprises an inward or outward shift relative to a center of the fin. The gate dielectric is on the major surface portion of the sidewall. The gate electrode is on the gate dielectric.
    Type: Application
    Filed: February 27, 2013
    Publication date: August 28, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Lien Huang, Chun-Hsiang Fan, Tsu-Hsiu Perng, Chi-Kang Liu, Yung-Ta Li, Ming-Huan Tsai, Clement Hsingjen Wann, Chi-Wen Liu
  • Publication number: 20140206161
    Abstract: A method of semiconductor device fabrication includes forming a first dummy gate structure in a first region of a semiconductor substrate and forming a second dummy gate structure in a second region of the semiconductor substrate. A protective layer (e.g., oxide and/or silicon nitride hard mask) is formed on the second dummy gate structure. The first dummy gate structure is removed after forming the protective layer, thereby providing a first trench. A capping layer (e.g., silicon) is formed in the first trench. A metal gate structure may be formed on the capping layer. The protective layer may protect the second dummy gate structure during the removal of the first dummy gate structure.
    Type: Application
    Filed: January 18, 2013
    Publication date: July 24, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsu-Hsiu Perng, Zhao-Cheng Chen, Chun-Hsiang Fan, Ming-Huan Tsai
  • Publication number: 20110303901
    Abstract: A 6H-indolo[2,3-b]quinoxaline derivative has a structure of formula (I). R9 is a member selected from the group consisted of an aryl group having one or more substituents and a heteroaryl group having one or more substituents, and R1 to R8 are substituents. The 6H-indolo[2,3-b]quinoxaline derivative of the present invention incorporates an indole and a quinoxaline group therefore inherits good energy transfer ability from indole and good electron-injection ability from quinoxaline. The compound of the present invention may function as a host material or a dopant in the light-emitting layer. In addition, the compound of the present invention may function as hole transport material, electron transport material, hole blocking material, electron blocking material, hole injecting material or electron injecting material.
    Type: Application
    Filed: September 27, 2010
    Publication date: December 15, 2011
    Inventors: Chien-Hong CHENG, Chun-Hsiang Fan
  • Publication number: 20100244675
    Abstract: The invention provides an organometallic complex having Formula (I): wherein each of N?C bidentate ligands independently is: an N?O bidentate ligand is: R1 to R10 each independently are H, alkyl, alkenyl, alkynyl, CN, CF3, alkylamino, amino, alkoxy, halo, aryl, or heteroaryl.
    Type: Application
    Filed: March 30, 2010
    Publication date: September 30, 2010
    Inventors: Chien-Hong CHENG, Chun-Hsiang FAN