Abstract: A flat panel display and a chip bonding pad thereof are provided. The flat panel display includes a display panel, an FPC board, first and second source driving chips, and a control circuit board. First and second wires in a peripheral circuit region of the display panel extend from the underneath of the FPC board to two opposite sides of the display panel and electrically connect the FPC board. The first source driving chips electrically connect the FPC board through parts of the first wires. The second source driving chips electrically connect the FPC board through the second wires. The chip bonding pad is under one of the first and second source driving chips. The chip bonding pad includes a first dielectric layer having first through holes and a second dielectric layer having second and third through holes arranged alternately. The second through holes correspond to the first through holes.

Abstract: A Bluetooth earphone and a lanyard structure thereof are provided. The Bluetooth earphone includes an earphone body and a lanyard structure. The lanyard structure includes a lanyard and a clip element. The lanyard is disposed on the clip element. The clip element includes two hooks gripping the earphone body for combining the lanyard structure with the earphone body.

Abstract: A flat-panel display device having test architecture is disclosed for disposing shorting bars without sacrificing wiring-on-array bus layout area of the outer-lead-bonding region. The flat-panel display device essentially includes a substrate having a plurality of driving integrated-circuit (IC) mounting areas, a plurality of signal lines and transmission lines disposed on the substrate, and a plurality of shorting bars disposed on the driving IC mounting areas. Each shorting bar is coupled to a corresponding signal line and a corresponding transmission line. Furthermore, in order to take out the laser-cutting process in the fabrication of the flat-panel display device for saving production cost, each driving IC mounting area is further disposed with a plurality of transistors for controlling the signal connections between the shorting bars and the signal lines, and also for controlling the signal connections between the shorting bars and the transmission lines.

Abstract: An exemplary shift register includes a control circuit and an output circuit. The control circuit is electrically coupled to receive a start pulse signal, a first clock pulse signal and a power supply voltage and for generating an enable signal according to the start pulse signal and the first clock pulse signal. A logic low level of the first clock pulse signal is lower than a level of the power supply voltage. The output circuit is subjected to the control of the enable signal and for generating a gate driving signal according to a second clock pulse signal. The second clock pulse signal and the first clock pulse signal are phase-inverted with respect to each other, and a logic low level of the second clock pulse signal is higher than the level of the power supply voltage.

Abstract: An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state.

Abstract: An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state.

Abstract: A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

Abstract: A pixel in a liquid crystal display panel comprises a first sub-pixel area having a first sub-pixel electrode and a second sub-pixel area having a second sub-pixel electrode. Each sub-pixel electrode is associated with a capacitor. When a gate-line signal and a data voltage is provided to the pixel, the voltage level on the first sub-pixel electrode is substantially equal to or slightly higher than the voltage level on the second sub-pixel electrode and the capacitor associated with each sub-pixel electrode is charged. When the gate-line signal has entirely passed on partially passed, a circuit element causes the capacitor associated with the second sub-pixel electrode to transfer its charge to another capacitor, resulting in a reduction of the voltage level on the second sub-pixel electrode.

Abstract: A touch panel includes a plurality of pixels. Each pixel includes a light sensing component, a pressure sensing component, and a switch. The light sensing component generates a first sensing signal when sensing light. The pressure sensing component generates a second sensing signal when sensing pressure. The switch transmits the first and the second sensing signals when receiving a gate driving signal.

Abstract: In a liquid crystal display, a flat display and a gate driving method thereof, the flat display comprises first and second pixel rows, first to third gate lines and a gate driving circuit. The first gate line is for determining whether to turn on a portion of pixels in the first pixel row, the second gate line is for determining whether to turn on another portion of pixels in the first pixel row, and the third gate line is for determining whether to turn on a portion of the pixels in the second pixel row. The gate driving circuit is for providing first to third gate driving pulses to the first to third gate lines. The first and second gate driving pulses do not overlap with each other, and the third gate driving pulse partially overlaps with one of the first and second gate driving pulses.

Abstract: A Bluetooth earphone and an ear-hook device thereof are provided. The Bluetooth earphone includes an earphone body and an ear-hook device. The ear-hook device includes a hinge assembly and an ear hook. The hinge assembly is rotatably disposed on the earphone body. The ear hook is rotatably disposed on the hinge assembly. As a result, the ear hook is able to rotate around the earphone body on two different axes via the hinge assembly, such that a user can selectively wear the Bluetooth earphone on his or her left ear or right ear.

Abstract: A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

Abstract: A touch panel includes a plurality of first pixels and second pixels. Each first pixel has a light sensing component for sensing light then generating a first sensing signal and a switch. The switch contains a first end coupled to the light sensing component, a control end for receiving a first gate driving signal, and a second end for transmitting the first sensing signal according to the first gate driving signal. Each second pixel includes a pressure sensing component for sensing pressure then generating a second sensing signal and a switch. The switch contains a first end coupled to the pressure sensing component, a control end for receiving a second gate driving signal, and a second end for transmitting the second sensing signal according to the second gate driving signal.

Abstract: The invention provides a headset device. The headset device includes a first headset, a second headset, and a transmission line. The first headset includes a first housing; an interface module for receiving an audio signal; a signal processing module for separating the audio signal into a first channel signal and a second channel signal; an amplifying circuit for respectively amplifying the first channel signal and the second channel signal to generate a first amplified signal and a second amplified signal; and a first speaker for outputting audio according to the first amplified signal. The second headset includes a second housing, and a second speaker for outputting audio according to the second amplified signal. The transmission line is for transmitting the second amplified signal to the second headset.

Abstract: A shift register is provided and includes a first shift registering unit and a second shift registering unit. The first shift registering unit generates a first trigger signal at a first output terminal and includes a first pull-down circuit. The second shift registering unit receives the first trigger signal and generates a second trigger signal at a second output terminal. The first trigger signal and the second trigger signal are sequentially asserted. The second shift registering unit includes a second pull-down circuit. The first pull-down circuit and the second pull-down circuit perform pull-down operations at different times. When the first pull-down circuit does not perform the pull-down operation, the second pull-down circuit performs pull-down operations to the first output terminal.

Abstract: Disclosed is a driver circuit structure integrated in a display panel. The driver circuit structure includes a plurality of transistors and a backup transistor. After completing the driver circuit structure, the disclosure inspects it to find an inactive transistor. The inspection process first, isolates the electrical connection between the inactive transistor and the first electrode line and/or the electrical connection between the inactive transistor and the second electrode line. Next, the source electrode of the backup transistor and the first electrode line and/or electrically connecting the drain electrode of the backup transistor and the second electrode line are electrical connected.

Abstract: A shift register includes a plurality of shift register units coupled in series. Each shift register unit, receiving an input voltage at an input end and an output voltage at an output end, includes a node, a pull-up driving circuit, a pull-up circuit and first through third pull-down circuits. The pull-up driving circuit can transmit the input voltage to the node, and the pull-up circuit can provide the output voltage based on a high-frequency clock signal and the input signal. The first pull-down circuit can provide a bias voltage at the node or at the output end based on a first low-frequency clock signal. The second pull-down circuit can provide a bias voltage at the node or at the output end based on a second low-frequency clock signal. The third pull-down circuit can provide a bias voltage at the node or at the output end based on a feedback voltage.

Abstract: A shift register has a plurality of shift register units coupled in series. Each shift register includes a pull-up circuit, an input circuit, a pull-down circuit, a compensation circuit, an input end, an output end and a node. Each shift register unit receives an input voltage at the input end and provides an output voltage at the output end. The input circuit transmits the input voltage to the node based on a first clock signal. The pull-up circuit provides the output voltage based on a second clock signal and the voltage level of the node. The pull-down circuit selectively connects the node with the output end according to a third clock signal. The compensation circuit is coupled to the input circuit, the pull-down circuit and the node for maintaining the voltage level of the node based on the second and third clock signals.

Abstract: A shift register includes multiple cascade-connected stages. Each stage generates an output signal in response to a clock signal and a first control signal. Each stage includes a pull-up module, a pull-up driving module, a first pull-down module, a second pull-down module, and a third pull-down module. The pull-up module is used for providing the output signal based on the clock signal. The pull-up driving module turns on the pull-up module in response to a first control signal. The first pull-down module adjusts voltage level on the first node to a first supply voltage in response to a second control signal. The second pull-down module adjusts voltage level on the output end to a second supply voltage in response to the second control signal. The third pull-down module adjusts voltage level on the second node to a third supply voltage in response to a third control signal.

Abstract: A personal audio listening device is adapted to be worn on a user's ear, and includes a housing, a pivotal knob, and an ear hook member. The housing has a surface and a hollow portion, and defines a first axis and a second axis. The pivotal knob is pivotally mounted on the surface of the housing, and includes a pair of parallel resilient walls. The ear hook member includes a hook body and an end portion. The end portion includes a pivot element in the form of a polygonal post. The hook body is configured to be wearable on the user's ear. The ear hook member is fittingly received between the resilient walls by means of the pivot element so as to be mounted on the pivotal knob. The ear hook member is pivotable about the first axis, and is rotatable about the second axis.