Abstract: The present disclosure provides a light emitting diode structure. The light emitting diode structure includes a substrate, a first light emitting structure on the substrate, a second light emitting structure on the substrate, and a third light emitting structure on the substrate. The first light emitting structure includes a first light emitting diode and a first focusing optic on the first light emitting diode. The second light emitting structure includes a second light emitting diode and a second focusing optic on the second light emitting diode. The third light emitting structure includes a third light emitting diode and a third focusing optic on the third light emitting diode. The first light emitting structure, the second light emitting structure and the third light emitting structure are arranged along a first direction and are dislocated in a second direction perpendicular to the first direction.

Abstract: A circuit board structure and a manufacturing method thereof. Circuit board structure includes first circuit board, second circuit board, conductive coil, magnetic body and molding compound. First circuit board has first side surface and first cavity located on first side surface. Second circuit board has second side surface facing first side surface and being spaced apart from first side surface. Conductive coil is in a spiral shape and includes first coil pattern and second coil pattern. First coil pattern is disposed in first circuit board. Second coil pattern is disposed in second circuit board. First coil pattern is electrically connected to second coil pattern. Magnetic body is filled in first cavity of first circuit board. Conductive coil surrounds at least a part of magnetic body. Molding compound is filled in a gap between first side surface and second side surface.

Abstract: A circuit board structure including a first circuit board, a second circuit board, a conductive coil and a first molding compound and a manufacturing method thereof. The first circuit board has a first side surface. The second circuit board has a second side surface facing the first side surface and being spaced apart from the first side surface. The conductive coil is in a spiral shape and includes a first coil pattern and a second coil pattern. The first coil pattern is disposed in the first circuit board. The second coil pattern is disposed in the second circuit board. The first coil pattern is electrically connected to the second coil pattern. The first molding compound is magnetic and filled in a gap located between the first side surface and the second side surface. The conductive coil surrounds at least a part of the first molding compound.

Abstract: The present disclosure provides a circuit board and its manufacturing method. The circuit board includes a first circuit layer, a first conductive post, and a second circuit layer. The first circuit layer includes a first pad and a first seed layer covering a sidewall of the first pad. The first conductive post is on the first pad and directly connected to the first pad. The second circuit layer includes a second pad and a second seed layer covering a sidewall of the second pad. The second pad is on a first connecting end of the first conductive post. The first connecting end is embedded in the second pad, and the second pad is connected to and directly contacts the first connecting end. The first seed layer and the second seed layer do not extend on a sidewall of the first conductive post.

Abstract: A circuit board structure includes a build-up structure, a graphene layer disposed on the build-up structure, and at least one conductive pillar disposed on the graphene layer, the graphene layer includes an oxidized area not covered by the at least one conductive pillar and a non-oxidized area covered by the at least one conductive pillar, and the at least one conductive pillar is electrically connected to the build-up structure via the non-oxidized area.

Abstract: A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.

Abstract: A surgical robot including at least one contact module, a control connection module, at least one first robotic arm, and at least one grip control device. A first transmission member of the control connection module drives the control module through a first transmission connecting member. A first shaft member of the first robotic arm is connected with the first transmission member while the grip control device is connected with the first robotic arm by a transmission interface. A force sensing member of the first robotic arm detects a first reaction force from the contact module so that the first robotic arm sends a feedback control signal to the grip control device to control a grip driving member to generate a force feedback for allowing a grip portion to move. Thereby, users can feel movement of the grip portion caused by the force feedback to avoid accidental iatrogenic injuries.

Abstract: A method for manufacturing a circuit board includes providing a composite material film including a metal film and a polymeric film, disposing a dielectric layer on the polymeric film to form a stacked structure, forming a circuit layer with a contact pad on a substrate, bonding the stacked structure onto the substrate and the circuit layer, and forming a first opening extending through the metal film to form a patterned metal film. The dielectric layer directly contacts the substrate and entirely covers the circuit layer. The method further includes plasma etching the dielectric layer with the patterned metal film as a mask to form a second opening in the dielectric layer and expose the contact pad in the second opening, removing the composite material film, and depositing a conductive material in the second opening to form a conductive blind hole electrically connected to the contact pad.

Abstract: A photosensitive apparatus includes an operating circuit, a first electrode, multiple first photosensitive patterns, a dielectric layer, a second electrode, a spacer layer, a light shielding layer, and at least one micro lens. The first electrode is electrically connected to a first terminal of the operating circuit. The first photosensitive patterns are separated from each other and disposed on the first electrode. Multiple first surfaces of the first photosensitive patterns are electrically connected to the first electrode. The dielectric layer is disposed on the first photosensitive patterns. The second electrode is disposed on the dielectric layer and electrically connected to multiple second surfaces of the first photosensitive patterns through multiple first contact holes of the dielectric layer. The spacer layer is disposed on the second electrode. The light shielding layer is disposed on the spacer layer. The at least one micro lens is disposed above the light shielding layer.

Abstract: An electronic circuit assembly includes an interposer substrate, a wiring substrate, an electrical connective part and an electronic component. The interposer substrate with a first coefficient of thermal expansion (CTE) includes a first surface, a second surface opposite to the first surface, and a first side surface connecting to the first surface and the second surface. The wiring substrate with a second CTE is disposed below the second surface. The first CTE is lower than the second CTE. The electrical connective part is disposed in the interposer substrate and extends to the first side surface. The electronic component is attached to the first side surface and is electrically connected to the electrical connective part.

Abstract: An electronic device including a light-emitting element, an IC chip, a substrate, an optical waveguide layer, and an optical signal outlet is provided. The IC chip is configured to control the light-emitting element to emit an optical signal. The light-emitting element is disposed on a first surface of the substrate, and the IC chip is disposed on a second surface of the substrate. The optical waveguide layer is disposed on the first surface of the substrate, and the optical waveguide layer includes a core layer, a cladding layer, and a metal layer. The metal layer is disposed on at least a portion of an interface between the core layer and the cladding layer. The optical signal outlet corresponds to the light-emitting element, and the optical signal reaches the optical signal outlet after being transmitted in the core layer.

Abstract: The present disclosure provides a circuit board and its manufacturing method. The circuit board includes a first circuit layer, a first conductive post, and a second circuit layer. The first circuit layer includes a first pad and a first seed layer covering a sidewall of the first pad. The first conductive post is on the first pad and directly connected to the first pad. The second circuit layer includes a second pad and a second seed layer covering a sidewall of the second pad. The second pad is on a first connecting end of the first conductive post. The first connecting end is embedded in the second pad, and the second pad is connected to and directly contacts the first connecting end. The first seed layer and the second seed layer do not extend on a sidewall of the first conductive post.

Abstract: An electronic circuit assembly includes an interposer substrate, a wiring substrate, an electrical connective part and an electronic component. The interposer substrate with a first coefficient of thermal expansion (CTE) includes a first surface, a second surface opposite to the first surface, and a first side surface connecting to the first surface and the second surface. The wiring substrate with a second CTE is disposed below the second surface. The first CTE is lower than the second CTE. The electrical connective part is disposed in the interposer substrate and extends to the first side surface. The electronic component is attached to the first side surface and is electrically connected to the electrical connective part.

Abstract: A hanging grounded structure is disclosed and includes a housing, a recessed portion and a hanging groove. The housing includes an opening facing a first direction and a lateral wall extended along a second direction. The lateral wall has a top edge located at a periphery of the opening. The recessed portion is recessed inwardly on the lateral wall. The hanging groove is disposed on the lateral wall and located in the recessed portion. A grounded wire is hung on the housing through the hanging groove. The hanging groove includes a starting point located at the top edge and an ending point. A curved path is formed from the starting point to the ending point. The grounded wire is hung from an interior of the housing. An end of the grounded wire is disposed in the recessed portion through the hanging groove.

Abstract: A circuit board structure, including a circuit layer, a first dielectric layer, a first graphene layer, a first conductive via, and a first built-up circuit layer, is provided. The circuit layer includes multiple pads. The first dielectric layer is disposed on the circuit layer and has a first opening. The first opening exposes the pads. The first graphene layer is conformally disposed on the first dielectric layer and in the first opening, and has a first conductive seed layer region and a first non-conductive seed layer region. The first conductive via is disposed in the first opening. The first built-up circuit layer is disposed corresponding to the first conductive seed layer region. The first built-up circuit layer exposes the first non-conductive seed layer region and is electrically connected to the pads through the first conductive via and the first conductive seed layer region.

Abstract: A hanging grounded structure is disclosed and includes a housing, a recessed portion and a hanging groove. The housing includes an opening facing a first direction and a lateral wall extended along a second direction. The lateral wall has a top edge located at a periphery of the opening. The recessed portion is recessed inwardly on the lateral wall. The hanging groove is disposed on the lateral wall and located in the recessed portion. A grounded wire is hung on the housing through the hanging groove. The hanging groove includes a starting point located at the top edge and an ending point. A curved path is formed from the starting point to the ending point. The grounded wire is hung from an interior of the housing. An end of the grounded wire is disposed in the recessed portion through the hanging groove.

Abstract: A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.

Abstract: A circuit board is manufactured by mounting a first circuit layer, mounting a conductive bump on the first circuit layer, covering the first circuit layer with a first dielectric layer which exposes the conductive bump, mounting a second dielectric layer on the first dielectric layer with a second dielectric layer opening that exposes the conductive bump, and finally, mounting a second circuit layer on the surface of the second dielectric layer and in the second dielectric layer opening. Since the surface roughness of the second dielectric layer and the second dielectric layer opening is low, it is unlikely to form nano voids between the second dielectric layer and the second circuit layer, and the second circuit layer may be attached to the second dielectric layer firmly, which is an advantage for fine line circuit disposal.