Abstract: A planar winding transformer includes a magnetic core set and a multilayer circuit board. The magnetic core set includes two magnetic cores and two magnetic columns. The two magnetic cores are parallel to each other. The multilayer circuit board is disposed between two magnetic cores, and two magnetic columns penetrate through the multilayer circuit board. The multilayer circuit board includes two low voltage winding layers and one high voltage winding layer. Two low voltage winding layers are connected to each other in parallel, and the high voltage winding layer is disposed between two low voltage winding layers. When the high voltage winding layer receives a polarity current, at least one of the low voltage winding layers generates a corresponding induced current. Two magnetic cores and two magnetic columns form a closed path for magnetic flux.

Abstract: A contact lens includes a central region, an annular region and a peripheral region. The central region includes a central point of the contact lens. The annular region symmetrically surrounds the central region. The peripheral region symmetrically surrounds the annular region. The peripheral region includes at least one color pattern portion. The annular region includes at least one power of critical point.

Abstract: A processor receives, from an input device, input data for processing. Upon determining that the input data corresponds to an artificial intelligence (AI) application, the processor generates an AI command for performing read or write operations for a memory device that is configured to store data for a plurality of applications including the AI application, the AI command characterized by an operational code and including information about one or more components of the AI application corresponding to the input data. The processor sends the AI command and the input data to a storage controller managing the memory device, wherein the read or write operations for the memory device are performed by the storage controller using the operational code and the information included in the AI command. The processor receives, from the storage controller, a result of the read or write operations performed on the memory device.

Abstract: The present invention provides a motion content based dynamic frame rate conversion method for displaying a video by a display device, comprising: detecting motion content of the video and generating a control signal for controlling a display color depth based on the motion detection result. The video is displayed with a lower color depth at a higher frame rate than a standard configuration of the display device if the motion detection result indicates that the video contains appreciable amount of motion content; and the video is displayed with a higher color depth at a lower frame rate than the standard configuration of the display device if the motion detection result indicates that the video is relatively static. The present invention can facilitate the display device to dynamically convert its display output formats according to motion content of the video to further optimize the display quality.

Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes: a first insulating layer; a first metal bump disposed on the first insulating layer; and a second insulating layer disposed on the first metal bump, wherein the second insulating layer includes a first opening exposing a portion of the first metal bump, wherein a thickness of the first insulating layer is greater than a thickness of the second insulating layer.

Abstract: The present invention provides a motion content based dynamic frame rate conversion method for displaying a video by a display device, comprising: detecting motion content of the video and generating a control signal for controlling a display color depth based on the motion detection result. The video is displayed with a lower color depth at a higher frame rate than a standard configuration of the display device if the motion detection result indicates that the video contains appreciable amount of motion content; and the video is displayed with a higher color depth at a lower frame rate than the standard configuration of the display device if the motion detection result indicates that the video is relatively static. The present invention can facilitate the display device to dynamically convert its display output formats according to motion content of the video to further optimize the display quality.

Abstract: A package device is provided and includes a first circuit layer, a first isolation layer, and a first de-warpage layer. The first circuit layer and the first isolation layer are stacked on each other. At least a portion of the first de-warpage layer is disposed between the first circuit layer and the first isolation layer.

Abstract: A DNN hardware accelerator and an operation method of the DNN hardware accelerator are provided. The DNN hardware accelerator includes: a network distributor for receiving an input data and distributing respective bandwidth of a plurality of data types of a target data amount based on a plurality of bandwidth ratios of the target data amount; and a processing element array coupled to the network distributor, for communicating data of the data types of the target data amount between the network distributor based on the distributed bandwidth of the data types.

Abstract: A passive matrix LED display driving scheme based on subframe pulse width modulation (PWM) to increase frame scan rate and further with channel-to-channel compensation is provided. The scheme may comprise: dividing each frame of the display video into T number of subframes; converting a driving signal for a pixel into a N-bit driving data, compensating the driving data with a compensation value; mapping the compensated driving data into the T number of subframes respectively.

Abstract: A passive matrix LED display driving scheme based on subframe pulse width modulation (PWM) to increase frame scan rate and further with channel-to-channel compensation is provided. The scheme may comprise: dividing each frame of the display video into T number of subframes; converting a driving signal for a pixel into a N-bit driving data, compensating the driving data with a compensation value; mapping the compensated driving data into the T number of subframes respectively.

Abstract: A light-emitting diode (LED) includes a first electroluminescent (EL) component, a second EL component, a first segment electrode, a second segment electrode, and a first common electrode. The first segment electrode is electrically connected to the first EL component. The second segment electrode is electrically connected to the second EL component. The first common electrode has a first branch and a second branch which extend along a first direction and are arranged in a second direction different than the first direction. The first branch is located between the second branch and either of the first and second EL components, and the first and second branches are electrically connected to the first and second EL components, respectively.

Abstract: A computing device for interacting with a user, comprising: a touch-sensing enabled display panel comprising one or more touch sensors for sensing an on-screen touch and one or more physical keys being positioned adjacent to edges of the display panel and configured to serve as off-screen keys for sensing an off-screen touch. The touch-sensing functionality is extended by coupling the touch screen with proximally positioned physical keys for detecting touch gesture such that additional gestures can be detected and in turn enhancing the computing device's user experience.

Abstract: A computing device for interacting with a user, comprising: a touch-sensing enabled display panel comprising one or more touch sensors for sensing an on-screen touch and one or more physical keys being positioned adjacent to edges of the display panel and configured to serve as off-screen keys for sensing an off-screen touch. The touch-sensing functionality is extended by coupling the touch screen with proximally positioned physical keys for detecting touch gesture such that additional gestures can be detected and in turn enhancing the computing device's user experience.

Abstract: A DNN hardware accelerator and an operation method of the DNN hardware accelerator are provided. The DNN hardware accelerator includes: a network distributor for receiving an input data and distributing respective bandwidth of a plurality of data types of a target data amount based on a plurality of bandwidth ratios of the target data amount; and a processing element array coupled to the network distributor, for communicating data of the data types of the target data amount between the network distributor based on the distributed bandwidth of the data types.

Abstract: A method is provided that allows the use of monochrome PMOLED display driver to generate grayscale patterns without the need to change the resolution of the 1-bit digital-to-analog converter (DAC) on the data line (SEG). The method further allows the elimination of extra frame buffer display memory needed by conventional techniques. This is achieved by swapping display memory space for display image pixel color (grayscale) depth in the expense of display resolution. The method further allows grayscale pattern data to be written into frame buffer only once without additional control from the host controller. The method further allows the dynamic application of grayscale on selectable whole or portion of a scan line such that full grayscale image display or a mixture of monochrome and grayscale image display in a single display panel is possible.

Abstract: A processor receives, from an input device, input data for processing. Upon determining that the input data corresponds to an artificial intelligence (AI) application, the processor generates an AI command for performing read or write operations for a memory device that is configured to store data for a plurality of applications including the AI application, the AI command characterized by an operational code and including information about one or more components of the AI application corresponding to the input data. The processor sends the AI command and the input data to a storage controller managing the memory device, wherein the read or write operations for the memory device are performed by the storage controller using the operational code and the information included in the AI command. The processor receives, from the storage controller, a result of the read or write operations performed on the memory device.

Abstract: Apparatuses and techniques are described for reducing charge loss in a select gate transistor in a memory device. In one aspect, a dummy memory cell adjacent to a select gate transistor is weakly programmed during an erase operation by applying a program pulse to the dummy memory cell. The program pulse can be applied after an erase bias is applied to the memory cells and before an erase-verify test is performed, in one approach. The program pulse can be applied during the setup of the voltages for the erase-verify test. The magnitude of the program pulse can be increased in successive erase loops of an erase operation as the magnitude of a substrate voltage is also increased. The magnitude of the program pulse can also be set as an increasing function of a number of program-erase (P-E) cycles.

Abstract: Apparatuses and techniques are described for reducing charge loss in a select gate transistor in a memory device. In one aspect, a dummy memory cell adjacent to a select gate transistor is weakly programmed during an erase operation by applying a program pulse to the dummy memory cell. The program pulse can be applied after an erase bias is applied to the memory cells and before an erase-verify test is performed, in one approach. The program pulse can be applied during the setup of the voltages for the erase-verify test. The magnitude of the program pulse can be increased in successive erase loops of an erase operation as the magnitude of a substrate voltage is also increased. The magnitude of the program pulse can also be set as an increasing function of a number of program-erase (P-E) cycles.

Abstract: A scheduling method is provided. The method includes: recording a next instruction and a ready state of each thread group in a scoreboard; determining whether there is any ready thread group whose ready state is affirmative; determining whether a load/store unit is available, wherein the load/store unit is configured to access a data memory unit; when the load/store unit is available, determining whether the ready thread groups include a data access thread group, wherein the next instruction of the data access thread group is related to accessing the data memory unit; selecting a target thread group from the data access thread groups; and dispatching the target thread group to the load/store unit for execution.

Abstract: A method is provided that allows the use of monochrome PMOLED display driver to generate grayscale patterns without the need to change the resolution of the 1-bit digital-to-analog converter (DAC) on the data line (SEG). The method further allows the elimination of extra frame buffer display memory needed by conventional techniques. This is achieved by swapping display memory space for display image pixel color (grayscale) depth in the expense of display resolution. The method further allows grayscale pattern data to be written into frame buffer only once without additional control from the host controller. The method further allows the dynamic application of grayscale on selectable whole or portion of a scan line such that full grayscale image display or a mixture of monochrome and grayscale image display in a single display panel is possible.