Patents by Inventor Chun-Hung Lee

Chun-Hung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080305635
    Abstract: A method for fabricating a patter is provided as followed. First, a material layer is provided, whereon a patterned hard mask layer is formed. A spacer is deposited on the sidewalls of the patterned hard mask layer. Then, the patterned hard mask layer is removed, and an opening is formed between the adjacent spacers. Afterwards, a portion of the material layer is removed to form a patterned material layer by using the spacer as mask.
    Type: Application
    Filed: June 7, 2007
    Publication date: December 11, 2008
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Shih-Chang Tsai, Chun-Hung Lee, Ming-Cheng Deng, Ta-Hung Yang
  • Publication number: 20080286100
    Abstract: A fan bracket and a bracket set are respectively adapted to allow a cooling fan and cooling fans to be assembled therein. The cooling fan is provided with at least one positioning groove and the fan bracket includes a bracket body, at least one elastic positioning protrusion and at least one joint part, in which the bracket body is provided with at least one opening and used for allowing the cooling to be placed therein; the elastic positioning protrusion is disposed in the bracket body, corresponding to the positioning groove and used for lodging in the positioning groove to allow the cooling fan to be fixed in the bracket body; the joint part is disposed on one side face of the bracket body and used for connecting with a joint portion of a fixing element to enable the bracket body to be connected with and fixed on the fixing element.
    Type: Application
    Filed: May 15, 2007
    Publication date: November 20, 2008
    Applicant: MITAC INTERNATIONAL CORP.
    Inventors: ZE-MIN HU, Chun-Hung Lee
  • Publication number: 20080286884
    Abstract: A method for in-situ repairing plasma damage, suitable for a substrate, is provided. A component is formed on the substrate. The formation steps of the component include a main etching process containing plasma. The method involves performing a soft plasma etching process in the apparatus of the main etching process containing plasma to remove a portion of the substrate. The soft plasma etching process is less than 30% of the power used in the main etching process.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 20, 2008
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsin-Fang Su, Shih-Chang Tsai, Chun-Hung Lee
  • Patent number: 7435681
    Abstract: Methods which comprise: providing a stack to be etched, the stack comprising a metal interconnect layer disposed above a substrate, a barrier layer disposed above the metal interconnect layer, a hard mask layer disposed on the barrier layer, and a patterning layer disposed above the hard mask layer wherein the patterning layer defines a pattern above the hard mask layer; and etching the pattern through the hard mask layer and at least a portion of the barrier layer, wherein the etching through an interface between the hard mask layer and the barrier layer is carried out using a fluorine-containing etch recipe.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: October 14, 2008
    Assignee: Macronix International Co., Ltd.
    Inventors: Hong-Ji Lee, Chun-Hung Lee
  • Publication number: 20080180896
    Abstract: A chassis partition framework is provided for configuring a personal cluster computer that has a head-node mainboard, a first compute-node mainboard, a second compute-node mainboard, a third compute-node mainboard and a fourth compute-node mainboard. The chassis partition framework mainly includes a top chamber, a left chamber and a right chamber. The top chamber is for configuring the head-node mainboard horizontally. The left and right chambers located under the top chamber are for vertically configuring the first and second compute-node mainboards and the third and fourth compute-node mainboards respectively in face-to-face alignment, with the second and third compute-node mainboards standing in back-to-back alignment. Therefore, the mechanical problems of the conventional blade-type personal cluster computer about heat-dissipation, noise-reduction, expansibility and space-arrangement may be improved through the chassis partition framework.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Applicant: TYAN COMPUTER CORPORATION
    Inventors: John McClure, Chun-Hung Lee
  • Publication number: 20080180925
    Abstract: A dual-board case for multi-mainboard system includes a rectangular-sectioned tubular housing, in which two track sets are provided; and two mainboard trays being movably mounted on the two track sets to locate at an interior of two opposite lateral walls of the tubular housing. Each of the two mainboard trays has a loading surface, on which a mainboard is mounted; and the two mainboard trays are mounted on the track sets with their loading surfaces and accordingly, the two mainboards mounted thereon facing toward each other. Therefore, the dual-board case allows a multi-mainboard system to have optimal spatial arrangement to achieve best heat-dissipation efficiency and largely reduce noises.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Applicant: TYAN COMPUTER CORPORATION
    Inventors: John McClure, Chun-Hung Lee
  • Patent number: 7331809
    Abstract: A computer system with a fixing module for riser card thereof is provided. By allowing the bottom side of the supporting pillar and the bottom parts of the two opposite sides of the supporting pillar engaging with each other, the riser card is supported by stress from all directions around it. Therefore, enough supporting strength is efficiently provided within a limited space and the riser card is prevented from being bended and having deformation because of the heavy weight.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: February 19, 2008
    Assignee: Tyan Computer Corporation
    Inventors: Chun-Hung Lee, Shih-Tsung Chen
  • Publication number: 20070264773
    Abstract: Methods which comprise: providing a stack to be etched, the stack comprising a metal interconnect layer disposed above a substrate, a barrier layer disposed above the metal interconnect layer, a hard mask layer disposed on the barrier layer, and a patterning layer disposed above the hard mask layer wherein the patterning layer defines a pattern above the hard mask layer; and etching the pattern through the hard mask layer and at least a portion of the barrier layer, wherein the etching through an interface between the hard mask layer and the barrier layer is carried out using a fluorine-containing etch recipe.
    Type: Application
    Filed: May 9, 2006
    Publication date: November 15, 2007
    Applicant: Macronix International Co., Ltd.
    Inventors: Hong-Ji Lee, Chun-Hung Lee
  • Publication number: 20070258195
    Abstract: A fastening assembly for riser cards equipped with memory modules includes holders and latches. Each of the holders has bars and pillars to form a solid framework and couple to a mother board. The edges of the riser cards are held by holding grooves on the pillars to enable the riser cards sliding therein and insert towards riser sockets on the mother board. Meanwhile, the latches slip to latch the holding grooves to limit the movement of the riser cards. Thus, the fastening assembly improves the fixing strength of the riser cards and prevents from moving off while impacted, vibrated or crashed.
    Type: Application
    Filed: July 10, 2006
    Publication date: November 8, 2007
    Inventors: Yao-Ming Liu, Chun-Hung Lee, Shih-Tsung Chen
  • Publication number: 20070224870
    Abstract: A computer system with a fixing module for riser card thereof is provided. By allowing the bottom side of the supporting pillar and the bottom parts of the two opposite sides of the supporting pillar engaging with each other, the riser card is supported by stress from all directions around it. Therefore, enough supporting strength is efficiently provided within a limited space and the riser card is prevented from being bended and having deformation because of the heavy weight.
    Type: Application
    Filed: March 21, 2006
    Publication date: September 27, 2007
    Inventors: Chun-Hung Lee, Shih-Tsung Chen
  • Publication number: 20070167002
    Abstract: A method for multi-step dielectric etching includes discharge steps between each of the etching steps in order to help release accumulated charge on the wafer produced by the previous etching step. The discharge steps stabilize the plasma discharge in each transition between etching steps. Charge elimination occurs because the negative species is relatively higher at the beginning of plasma spiking and can reach the wafer surface to reduce the accumulated charge.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 19, 2007
    Inventors: Hong-Ji Lee, Chun-Hung Lee, Nan-Tsu Lian
  • Publication number: 20070111449
    Abstract: The invention is directed to a method for manufacturing a non-volatile memory. The method comprises steps of forming a stacked gate structure over a substrate, wherein the stacked gate structure is composed of, from the bottom to the top of the stacked gate structure, a first dielectric layer, a charge storage layer, a second dielectric layer, a conductive layer and a cap layer. A source/drain region is formed in the substrate. A protective layer is formed on the sidewall of the stacked gate structure. An etching process is performed to remove the cap layer, wherein, in the etching process, the cap layer and the protective layer have different etching rate.
    Type: Application
    Filed: November 16, 2005
    Publication date: May 17, 2007
    Inventors: Hsu-Sheng Yu, Chun-Hung Lee
  • Patent number: 7206104
    Abstract: A method for determining the position of a document placed in the scanning widow of a flatbed scanner is disclosed. The method can correctly determine the precise position of a document from a pre-scanned image, including portions of a pressing cover (background color), illuminator (different color from the background) and the document. By color identification, a preliminary range having a rectangular area covering the document and the illuminator is first determined. Then, the colors of the four corners of the preliminary range are identified. Finally, the precise position of the document is determined by color identification, approaching from the rim of the preliminary range toward the the document.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: April 17, 2007
    Inventor: Chun-Hung Lee
  • Publication number: 20070013975
    Abstract: A method for determining the position of a document placed in the scanning widow of a flatbed scanner is disclosed. The method can correctly determine the precise position of a document from a pre-scanned image, including portions of a pressing cover (background color), illuminator (different color from the background) and the document. By color identification, a preliminary range having a rectangular area covering the document and the illuminator is first determined. Then, the colors of the four corners of the preliminary range are identified. Finally, the precise position of the document is determined by color identification, approaching from the rim of the preliminary range toward the the document.
    Type: Application
    Filed: September 19, 2006
    Publication date: January 18, 2007
    Inventor: Chun-Hung Lee
  • Publication number: 20060109638
    Abstract: A fastening mechanism for an interface card is provided. After a tail of a connection plate of the interface card is aligned with a positioning member of the chassis, a latch member pivoted directly/indirectly on the chassis may be swiveled to press the tail of the connection plate toward the positioning member. When a chassis panel of the chassis is installed, the chassis panel can press and secure the latch member. Hence the connection plate can be fastened securely on the chassis without using screws.
    Type: Application
    Filed: November 14, 2005
    Publication date: May 25, 2006
    Inventor: Chun-Hung Lee
  • Patent number: 6670275
    Abstract: A method for pulling back SiN to increase rounding effect in a shallow trench isolation process, includes the steps of preparing a substrate of Si and forming a SiO2 layer on the substrate, forming a Si3N4 layer on the SiO2 layer, defining Si3N4 trenches by plasma etching, etching the remaining Si3N4 with SF6/HBr gas, etching SiO2 layer to form a platform and enhance the rounding of the platform, etching the substrate to have a third shallow trench and a reinforced platform, filling the third shallow trench with oxide, planarizing the filled oxide using chemical mechanical polishing, and removing the Si3N4 layer, wherein after the removal of the Si3N4 layer, multiple cleaning processes are performed.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: December 30, 2003
    Assignee: Macronix International Co., Ltd
    Inventors: Chun-Hung Lee, Shiuh-Sheng Yu, Chia-Chi Chung
  • Publication number: 20030223120
    Abstract: The invention comprises a display unit for displaying at least two consecutive images to be viewed by a viewer.
    Type: Application
    Filed: August 7, 2002
    Publication date: December 4, 2003
    Applicant: HONORWAY CORPORATION LIMITED
    Inventors: Kwong Tak Li, Yat Fung Leung, Chun Hung Lee, Sai Fun Mak
  • Publication number: 20030224609
    Abstract: A method for pull back SiN to increase rounding effect in a shallow trench isolation process, includes the acts of preparing a substrate of Si and forming a SiO2 layer on the substrate, forming a Si3N4 layer on the SiO2 layer, defining Si3N4 trenches by plasma etching; etching the remaining Si3N4 with SF6/HBr gas, etching SiO2 layer to form a platform and enhance the rounding of the platform, etching the substrate to have a third shallow trench and a reinforced platform, filling the third shallow trench with oxide, leveling the oxide, which uses a CMP to level the filled oxide, and removing the Si3N4 layer, wherein after the removal of the Si3N4 layer, multiple cleaning processes are required.
    Type: Application
    Filed: May 29, 2002
    Publication date: December 4, 2003
    Inventors: Chun-Hung Lee, Shiuh-Sheng Yu, Chia-Chi Chung
  • Patent number: 6635579
    Abstract: An operating method of a semiconductor etcher includes three steps. The first step is to provide a first power for shortening a warm-up time of the etcher. The second step is to provide a second power, which is lower than the first power, to perform an etching process. The third step is to provide a third power, which is between the first and second power, for cleaning the etcher.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: October 21, 2003
    Assignee: Macronix International Co. Ltd.
    Inventors: Ming-Chung Liang, Shin-Yi Tsai, Hsu-Sheng Yu, Chun-Hung Lee
  • Publication number: 20030186555
    Abstract: The present invention is to utilize chemical dry etching technique to form a rounded corner in a shallow trench isolation process. After finishing the etching of the shallow trench, the present invention utilizes an isotropic etching step, which is a chemical dry etching step of a high silicon nitride to silicon etching selectivity, to pullback the silicon nitride layer to expose a silicon top corner. Then, the present invention utilizes an isotropic etching step, which is a chemical dry etching step of a high silicon to silicon nitride etching selectivity, to make the corner rounded to obtain a rounded corner of the shallow trench isolation structure. The present invention can avoid the formation of wrap rounding of the corner and prevent the formation of the short circuit or extraordinary electric behavior between adjacent devices and supply for performing following processes.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 2, 2003
    Inventors: Ming-Chung Liang, Shtuh-Sheng Yu, Chun-Hung Lee, Shin-Yi Tsai