Abstract: A substrate-supporting rod (4) includes a resin body (41) and a metal rod (43). The resin body (41) includes a body portion (411) being cylinder-shaped and having a first through hole (413) in a direction of the axis thereof, and a number of shelves (415, 415?) arising from said body portion and extending in parallel away from said body portion at a predetermined pitch. The body portion and the number of shelves are unitary portions of the resin body. The metal rod is received in the first through hole. A projection (4151) is defined on the end of each of shelf to support a substrate (45). The projection is cylindrical in shape of which the diameter is larger than the thickness of the corresponding shelf, and a central axis thereof is substantially perpendicular to a central axis of the body portion.

Abstract: A method for processing a brittle substrate includes first providing a brittle substrate having a substrate surface. Then applying a first laser beam onto the brittle substrate surface to form a pre-cut groove in the brittle substrate, the first laser beam being generated by a solid-state laser device. A second laser beam is then applied onto the brittle substrate surface along the precut groove to heat the brittle substrate, the second laser beam being generated by a gas laser device. Finally, a coolant is applied onto the brittle substrate along the pre-cut groove so as to cause formation of a through crack in the brittle substrate. The first laser beam can be generated by a solid-state laser device, the first laser beam should be of narrow diameter and high energy density, so the first laser beam can form a pre-cut groove rapidly and accurately without generation of micro-cracks, in addition, the pre-cut groove should have a better uniformity and linearity.

Abstract: A semiconductor device includes a MOS transistor having a capacitor-forming surface; and a ferroelectric capacitor formed on the capacitor-forming surface of the MOS transistor and including upper and lower electrode layers of Pt and a dielectric layer sandwiched between the upper and lower electrode layers. The ferroelectric capacitor has a cross-section that is generally trapezoid in shape, and that has an inclined side which forms an angle of greater than 45 degrees and less than 90 degrees with the capacitor-forming surface of the MOS transistor.

Abstract: An adjustable cassette (1) for accommodating substrates includes a frame (10), a pair of supporting plate (20) with a plurality of retaining members (208) facing each other, and an adjusting means for joining of the supporting plates to the frames and thereby forming the cassette. At least one supporting plate can slide away from or close to another supporting plate and be fixed by means of the adjusting means.

Abstract: A storage cassette (1) for accommodating substrates includes a box-shaped case (10) having a space and defining an entrance for inserting the substrates into the space; and a pair of stopping mechanisms (60) each including a top first locating mechanism (30), a bottom second locating mechanism (50) and a stopper (40) engaged therebetween. The stopping mechanisms are respectively located at opposite sides of the entrance. Each locating mechanism defines a first locating portion, a second locating portion closer to a corresponding side of the opposite sides than the first locating portion, and a connecting means portion interconnecting the first and second locating means. In a first position, the stopper is engaged in the first locating portion, and substrates accommodated in the cassette cannot be displaced; in a second position, the stopper is engaged in the second locating portion, and the substrates can be freely slid out from the space.

Abstract: A supporting column (30) of the present invention includes a main body (31) and a stiff shaft (33). The main body (31) includes a half-sleeve shaft (319) and a plurality of parallel wing panels (317) encircling portions of the half-sleeve shaft. The main body has a C-shaped cross section and defines an axial bore along an axis direction. The wing panels are formed perpendicular to the half-sleeve shaft and each wing panel provides a protrusion (318) in the middle of the wing panel. A cassette (40) incorporating the supporting columns is used to accommodate a plurality of substrates.

Abstract: The present invention proposes an apparatus for loading and unloading wafers to and from the semiconductor fabrication equipment. The present invention uses two U-shaped port plate supporters of high rigidity to respectively join with drive devices such as lead screws, shaft bearings, and a lead device, and then join with components such as a port plate, a port door, and a base. The assembly is driven by a motor via timing pulleys, timing belts, idle wheels, a pair of lead screws, shaft bearings, and a lead device. An encoder is matched for feedback control. Thereby, accurate positioning of the main mechanism of the wafer pod responsible for upward and downward movement can be achieved so as to increase the accuracy and reliability of positioning transfer of wafers. Secondarily, the contamination of particles resulted from the motion of the main mechanism can be reduced by using an intake filtering system.

Abstract: A semiconductor device includes a MOS transistor, and a ferroelectric capacitor formed on the MOS transistor and including upper and lower electrode layers and a dielectric layer sandwiched between the upper and lower electrode layers. Each of the upper and lower electrode layers is made from a Pt—PtOx material, in which x is an integer from 1 to 2, and the weight percentage of PtOx based on the total weight of the Pt—PtOx material is in an amount ranging from 50-100%.

Abstract: An adjustable cassette (1) for accommodating substrates includes a frame (10), a pair of supporting plate (20) with a plurality of retaining members (208) facing each other, and an adjusting means for joining of the supporting plates to the frames and thereby forming the cassette. At least one supporting plate can slide away from or close to another supporting plate and be fixed by means of the adjusting means.

Abstract: A storage cassette (1) for accommodating substrates includes: a box-shaped case (10) having a space for retaining substrates and defining an entrance for inserting the substrates into the space; and a pair of stopping mechanisms (60) each including a top first locating mechanism (30), a bottom second locating mechanism (50) and a stopper (40) engaged therebetween. The stopping mechanisms are located at opposite sides of the entrance. Each locating mechanism defines a first locating means, a second locating means closer to a corresponding side of the case than the first locating means, and a connecting means interconnecting the first and second locating means. In a first position, the stopper is engaged in the first locating means, and substrates accommodated in the cassette cannot be displaced; in a second position, the stopper is engaged in the second locating means, and the substrates can be freely slid out from the space.

Abstract: A supporting column (30) of the present invention includes a main body (31) and a stiff shaft (33). The main body (31) includes a half-sleeve shaft (319) and a plurality of parallel wing panels (317) encircling portions of the half-sleeve shaft. The main body has a C-shaped cross section and defines an axial bore along an axis direction. The wing panels are formed perpendicular to the half-sleeve shaft and each wing panel provides a protrusion (318) in the middle of the wing panel. A cassette (40) incorporating the supporting columns is used to accommodate a plurality of substrates.

Abstract: This invention relates to a cassette (1) for supporting substrates and includes a pair of frames (2) opposite each other, at least two supporting bodies (3) arranged opposite each other between the frames, and at least a stopper rod (4) arranged between the frames. The frames, the supporting bodies and the stopper rods define a space for accommodating the substrates, and each stopper rod includes a metal rod (40) and a resin layer (42). The resin layer forms a coating on the metal rod, forming a unit.

Abstract: The present invention relates to a supporting plate (10) and a cassette (20) for accommodating substrates using the same. The supporting plate includes a main body (11) and at least two stiff shafts (13). The main body includes a plurality of wing panels (15) extending from the main body and at least two through grooves (18). A space interval (17) is defined between neighboring wing panels, each wing panel comprises a plurality of protrusions (151) extending from the free side of each wing panel, and the wing panels slope down. The two stiff shafts being received in the two through grooves.

Abstract: Methods and systems for storing texels in memory banks in a manner that allows the retrieval of four neighboring texels within a single cycle are disclosed. The four neighboring texels are stored in separate memory banks according to a predetermined set of combinations of 2-D (u, v) coordinate pairs. In interpolating the color value of a color texel C(u, v), a texel buffer retrieves the four neighboring texels in a single cycle to reduce the memory access time. In one embodiment, a plurality of memory banks in the texel buffer are designed in an interleave mode. In an alternative embodiment, a plurality of memory banks in the texel buffer are implemented in a noninterleave mode. In both embodiments, a texel buffer retrieves the four neighboring texels of a color texel C(u, v) within a single cycle according to a predetermined set of criteria.

Abstract: A linear address organization for physically storing mip maps and rip maps in memory is disclosed. The subsampled data arrays of the mip maps and rip maps are sequentially stored in continuous subsequences of a continuous sequence of memory addresses. The subsequences of addresses are assigned in order of level of subsampling of the data arrays which make up the mip map or rip map. In the case of a mip map, the subsequences are assigned to the data arrays in order of increasing level of subsampling. In the case of rip maps, the data arrays are segregated into groups according to a first one of the two subsampling directions, such that each array in a particular group has the same level of subsampling in the first direction. Subsequences are assigned to each group of data arrays.

Abstract: A linear address organization for physically storing mip maps and rip maps in memory is disclosed. The subsampled data arrays of the mip maps and rip maps are sequentially stored in continuous subsequences of a continuous sequence of memory addresses. The subsequences of addresses are assigned in order of level of subsampling of the data arrays which make up the mip map or rip map. In the case of a mip map, the subsequences are assigned to the data arrays in order of increasing level of subsampling. In the case of rip maps, the data arrays are segregated into groups according to a first one of the two subsampling directions, such that each array in a particular group has the same level of subsampling in the first direction. Subsequences are assigned to each group of data arrays.

Abstract: An apparatus and method for blending pixels of a source object and a destination plane of view of 3-D space. The source object overlaps the destination plane of view. Furthermore, the 3-D space may contain an atmospheric light diffusion, i.e., fog or smoke, which produces a "fog effect." The apparatus includes multiplexer circuitry which receives first, second, third, fourth and fifth control signals. The multiplexer circuitry also receives a fog blend factor, a source alpha, a destination alpha, a source color, a destination color, a fog color and one. In response to the control signals, the multiplexer circuitry selects three outputs. In particular, in response to the first, second and third control signals, the multiplexer selects as the first output, either: the destination alpha, the source alpha, the fog blend factor, one, the destination color, or one minus one of the aforementioned choices.

Abstract: A method and system are provided for drawing one or more surfaces. The system includes a drawing processor, a frame buffer with z buffer and a display device, such as a display monitor. The drawing processor can perform all of the following steps. A first pixel in a first row is selected. The first pixel is near a first point at which a projection onto a plane of view of a first edge of a first surface intersects the first row of pixels in the plane of view. A first distance from the first point to a second point on the first surface is determined. The first point is a projection onto the plane of view of the second point. The first distance is then corrected by a first value representing a difference in distance between the first distance and a distance from the first pixel to a third point on the first surface. The first pixel overlies, e.g., and is centered at, a point that is a projection onto the plane of view of the third point.

Abstract: A process and apparatus are disclosed for obtaining a texture color value C.sub.r for an object surface point from two texture color values C.sub.ri and C.sub.rj (which themselves may be interpolated texture color values), of texture data points C.sub.i and C.sub.j, respectively. The object surface point is a distance W from the texture data point C.sub.i and a distance 1-W from the object surface point C.sub.j, where W is an n-bit value. The process includes the steps of multiplying each of the texture colors C.sub.ri and C.sub.rj by each integer from 0 to 2.sup.n-1 to produce 2.sup.n -1 products for each color. The product of C.sub.ri with 2.sup.n-1 -W' and the product of C.sub.rj with W' are selected from these produced products, where W' is the rounded product of W and 2.sup.n-1. The two selected products are added together to produce the sum (2.sup.n-1 -W').multidot.C.sub.ri +W'.multidot.C.sub.rj, and the sum thus produced is divided by 2.sup.n-1 to produce the interpolated color.

Abstract: A pixel block transfer system has a shifter, at least two registers, an extractor and a mask. Parameter evaluation logic is used to generate most of the parameters needed in the pixel block transfer. The start address of the source block, the start address of the destination block, the number of pixels in the source block and the number of rows in the source block are input to the parameter evaluation logic. The parameter evaluation logic then determines the left shift number, the number of read data, the number of write data, the two write flag, the two read flag, the left mask number and the right mask number. The start addresses, the flags and the read and write numbers are sent to a state machine. These are used to control the pixel block transfer. The left shift number is sent to the shifter and the extractor. It signifies the number of pixels to be shifted left. The left and right mask numbers are sent to the mask to control which pixels are masked and, therefore, not modifiable.