Patents by Inventor Chun Li

Chun Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220302299
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 22, 2022
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Patent number: 11448891
    Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Yu Chen, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Yen-Chiang Liu, Jiun-Jie Chiou, Li-Yang Tu, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Hsi-Cheng Hsu
  • Patent number: 11447971
    Abstract: An energy dissipation device includes an inner tube, a core tube, an outer tube and a fixing member. The inner tube includes a first protruding structure. The core tube includes a second protruding structure, and the core tube is sleeved outside the inner tube. The outer tube is sleeved outside the core tube. The fixing member is connected to the inner tube, the core tube and the outer tube.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: September 20, 2022
    Assignee: WELL-LINK INDUSTRY Co., LTD
    Inventors: Chun-Lung Lee, Yi Chang Hsieh, Yu Li Huang
  • Publication number: 20220289884
    Abstract: An acrylate based photopolymer with high yellowing resistance, excellent photo sensitivity, high toughness, and high glass transition temperature, methods of preparation and used thereof, and solders comprising the same.
    Type: Application
    Filed: March 8, 2022
    Publication date: September 15, 2022
    Inventors: Liang ZHANG, Kin Cheung CHAN, Chun Kwong YEUNG, Jifan LI
  • Publication number: 20220293819
    Abstract: A light-emitting element including an epitaxial structure and a light guide structure is provided. The epitaxial structure has a first surface and a second surface opposite to each other and includes an active layer. The light guide structure is disposed on the first surface of the epitaxial structure and includes a first light reflection layer and a filter layer covering on an upper surface of the first light reflection layer. The first light reflection layer completely covers the first surface. A display panel is also provided.
    Type: Application
    Filed: April 28, 2021
    Publication date: September 15, 2022
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Yun-Li Li, Tzu-Yang Lin, Yen-Chun Tseng
  • Publication number: 20220294456
    Abstract: Systems and methods are provided for hopping a digitally controlled oscillator (DCO) among a plurality of channels, wherein a gain of the DCO KDCO is a nonlinear function of frequency. A first normalized tuning word (NTW) corresponding to a first channel of the plurality of channels is generated. A first normalizing gain multiplier X is generated based on the nonlinear function of frequency, on an estimate of the nonlinear function of frequency, at a first frequency corresponding to the first channel. The first NTW is multiplied by the first X to obtain a first oscillator tuning word (OTW). The first OTW is input to the DCO to cause the DCO to hop to the first channel. A system for hopping among a plurality of channels at a plurality of respective frequencies comprises a phase-locked loop (PLL), a digitally controlled oscillator (DCO), a multiplexer, and an arithmetic module.
    Type: Application
    Filed: May 24, 2022
    Publication date: September 15, 2022
    Inventors: Chao Chieh Li, Min-Shueh Yuan, Robert Bogdan Staszewski, Chia-Chun Liao
  • Patent number: 11444046
    Abstract: An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: September 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hong Chang, Chun-Yi Yang, Kun-Ming Huang, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
  • Patent number: 11443675
    Abstract: A shift register circuit includes a driving signal generating circuit, a coupling circuit, and a sweep signal generating circuit. The driving signal generating circuit is configured to receive a plurality of first clock signals, a low voltage source, an initial signal, and a first high voltage source so as to output a driving signal. The coupling circuit is coupled to the driving signal generating circuit. The coupling circuit is configured to transmit the low voltage source. The sweep signal generating circuit is coupled to the coupling circuit. The sweep signal generating circuit is configured to receive a second clock signal, the low voltage source, and a second high voltage source so as to output a sweep signal. A waveform of the sweep signal includes an oblique waveform. The first high voltage source and the second high voltage source are electrically independent of each other.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: September 13, 2022
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Che-Chia Chang, Yi-Jung Chen, Shang-Jie Wu, Yu-Chieh Kuo, Hsien-Chun Wang, Ming-Hung Chuang, Mei-Yi Li, Sin-An Lin, Chen-Ying Chou
  • Patent number: 11444173
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsiang-Ku Shen, Jin-Mu Yin, Tsung-Chieh Hsiao, Chia-Lin Chuang, Li-Zhen Yu, Dian-Hau Chen, Shih-Wei Wang, De-Wei Yu, Chien-Hao Chen, Bo-Cyuan Lu, Jr-Hung Li, Chi-On Chui, Min-Hsiu Hung, Hung-Yi Huang, Chun-Cheng Chou, Ying-Liang Chuang, Yen-Chun Huang, Chih-Tang Peng, Cheng-Po Chau, Yen-Ming Chen
  • Publication number: 20220282513
    Abstract: An energy dissipation device includes an inner tube, a core tube, an outer tube and a fixing member. The inner tube includes a first protruding structure. The core tube includes a second protruding structure, and the core tube is sleeved outside the inner tube. The outer tube is sleeved outside the core tube. The fixing member is connected to the inner tube, the core tube and the outer tube.
    Type: Application
    Filed: May 26, 2021
    Publication date: September 8, 2022
    Applicant: WELL-LINK INDUSTRY Co.,LTD
    Inventors: Chun-Lung Lee, Yi Chang Hsieh, Yu Li Huang
  • Patent number: 11437277
    Abstract: A method includes forming a semiconductor fin protruding higher than top surfaces of isolation regions. The isolation regions extend into a semiconductor substrate. A portion of the semiconductor fin is etched to form a trench, which extends lower than bottom surfaces of the isolation regions, and extends into the semiconductor substrate. The method further includes filling the trench with a first dielectric material to form a first fin isolation region, recessing the first fin isolation region to form a first recess, and filling the first recess with a second dielectric material. The first dielectric material and the second dielectric material in combination form a second fin isolation region.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: September 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Ting Ko, Tai-Chun Huang, Jr-Hung Li, Tze-Liang Lee, Chi On Chui
  • Publication number: 20220277886
    Abstract: A coil module includes a coil assembly, a first induction substrate, a second induction substrate and an adhesive element. The coil assembly has a winding axis. The coil assembly is disposed on the first induction substrate. The first induction substrate is disposed on the second induction substrate. The adhesive element covers the first induction substrate and the second induction substrate, and the adhesive element has a first adhesive portion and a second adhesive portion. When viewed in a direction perpendicular to the winding axis, the first adhesive portion and the second adhesive portion are located on different planes.
    Type: Application
    Filed: October 1, 2021
    Publication date: September 1, 2022
    Inventors: Feng-Lung CHIEN, Chien-Hung LIN, Kuang-Lun LEE, Wei-Chun LI
  • Publication number: 20220273909
    Abstract: Aspects of the present disclosure provide methods, apparatuses, and systems for non-linearly decreasing an auditory experience output. According to an aspect, a non-linear decreasing rate is applied to an audio output of the auditory experience. The non-linear decreasing rate varies as a function of decibel amplitude over time in seconds. The non-linear decreasing rate comprises a plurality of segments connected together. The audio of the guided breathing is output at the non-linear decreasing rate until a decibel level of the audio output is below one of a decibel level of ambient noises in a user's environment or a predetermined decibel level.
    Type: Application
    Filed: August 5, 2020
    Publication date: September 1, 2022
    Applicant: BOSE CORPORATION
    Inventors: Harsh A. MANKODI, David Rolland CRIST, Chia-Chun HSU, Navaneethan SIVAGNANASUNDARAM, Chia-Ling LI, Kathleen Elizabeth KREMER
  • Publication number: 20220277858
    Abstract: The present invention discloses a medical prediction method and system based on a semantic graph network, which recognizes an entity in an electronic medical record based on domain knowledge, and uses a two-way gated loop unit to learn a sequence features of a text. Secondly, in order to extract a semantic relation in the electronic medical record in a fine-granularity manner, the present invention defines two types of subgraphs, graph representation based on defined knowledge and graph representation based on undefined knowledge, and uses a Graph Convolution Network (GCN) and a Graph Attention Network (GAT) to extract a semantic relation representation, where the graph representation based on undefined knowledge allows the learning of a relation between an entity or an word and the graph representation based on undefined knowledge, and it also allows to learn a relation between word or entity and itself, in order to translate entity or word representation into a uniform graph embedding representation.
    Type: Application
    Filed: May 25, 2021
    Publication date: September 1, 2022
    Inventors: Qing Zhao, Jianqiang Li, Dezhong Xu, Chun Xu
  • Patent number: 11427834
    Abstract: The present disclosure relates to use of a lectin receptor-like kinase LecRK-IX.1 as a protein for regulating insect resistance of Arabidopsis thaliana. A. thaliana with high resistance to Bemisia tabaci can be cultivated by reducing the expression of, or knocking out, an encoding gene of the protein. Therefore, Arabidopsis thaliana with the high-level resistance to Bemisia tabaci can be cultivated. The gene and its encoded protein can be applied to plant genetic improvement.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: August 30, 2022
    Assignee: PLANT PROTECTION RESEARCH INSTITUTE, GUANGDONG ACADEMY OF AGRICULTURAL SCIENCES
    Inventors: Yifeng Li, Zhenfei Zhang, Chun Chen, Longyu Yuan
  • Publication number: 20220271759
    Abstract: A Bluetooth controller circuit includes: a clock counter arranged to operably generate a first count value corresponding to a reference clock signal; a count value adjusting circuit arranged to operably generate a second count value according to the first count value; a time slot determining circuit arranged to operably determine timing of respective transmission slots according to the second count value; a transceiver circuit arranged to operably transmit Bluetooth signal in transmission slots determined by the time slot determining circuit; and a control circuit, coupled with the count value adjusting circuit, the time slot determining circuit, and the transceiver circuit, and arranged to operably control operations of the count value adjusting circuit, the time slot determining circuit, and the transceiver circuit.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 25, 2022
    Applicant: Realtek Semiconductor Corp.
    Inventors: Hou-Tse HUNG, Liang-Hui LI, Chia Chun HUNG
  • Patent number: 11424185
    Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Wei Chang, Chia-Hung Chu, Kao-Feng Lin, Hsu-Kai Chang, Shuen-Shin Liang, Sung-Li Wang, Yi-Ying Liu, Po-Nan Yeh, Yu Shih Wang, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh
  • Publication number: 20220262355
    Abstract: A system and method for improving speech conversion efficiency of Articulatory disorder, The method comprises the following steps: First generate a set of text to be recording (not considered in user difference and model difference). It will cover specific phonemes of language and tone distribution relationship. Then the user can train the voice conversion model (or other voice processing model) based on the voice recorded by the user. At the same time, the generated text will also be changed by the characteristics of the currently adopted model (For example: by changing the time-frequency resolution relationship of sentences in the text). Then generate more representative texts so that users can read more helpful training corpus to improve the processing efficiency of the system.
    Type: Application
    Filed: October 8, 2021
    Publication date: August 18, 2022
    Inventors: Ying-Hui LAI, Pei-Chun LI, Chen-Kai LEE
  • Publication number: 20220263012
    Abstract: A memory device includes a substrate; an active area extending along a first direction on the substrate; a gate line traversing the active area and extending along a second direction that is not parallel to the first direction; a source doped region in the active area and on a first side of the gate line; a main source line extending along the first direction; a source line extension coupled to the main source line and extending along the second direction; a drain doped region in the active area and on a second side of the gate line that is opposite to the first side; and a data storage element electrically coupled to the drain doped region. The main source line is electrically connected to the source doped region via the source line extension.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
  • Publication number: 20220262030
    Abstract: Provided is a method for locating a tumor. The method includes: performing image registration on a projection image of the tumor and a first standard image to acquire a first offset; generating a second standard image based on the first offset; performing image registration on the projection image and the second standard image to acquire a second offset; and updating the second standard image based on the second offset and executing the operation of image registration on the projection image and the second standard image again in response to the second offset satisfying a virtual re-sampling condition; or outputting an accumulated offset in response to the second offset not satisfying the virtual re-sampling condition, wherein the accumulated offset is a sum of the first offset and the second offset acquired by executing the operation of image registration.
    Type: Application
    Filed: July 18, 2019
    Publication date: August 18, 2022
    Inventors: Jiuliang LI, Zhongya WANG, Hao YAN, Chun LUO