Abstract: Hydrofluoric acid waste streams from semiconductor device manufacturing processes are collected and converted to cryolite utilizing disclosed systems and processes. The systems and processes are able to utilize hydrofluoric acid waste streams from multiple different sources. The systems and processes utilizing control delivery of reactant so that the produced cyrolite has low impurity levels and meets industry standards.

Abstract: A self-timed readout driver for a leakage-based physical unclonable function (L-PUF) device, a L-PUF array using the same, and applications thereof are provided. The self-timed readout driver includes a precharge transistor, an inverter and a leaky device. The precharge transistor has a control end, a first end and a second end. The inverter is electrically connected to the second end of the precharge transistor. The leaky device having a control end electrically connected to ground, a first end electrically connected to the second end of the precharge transistor, and a second end electrically connected to ground. The control end of the precharge transistor is configured to receive an input signal. The inverter is configured to generate a sense enable (SE) signal. The input signal and the SE signal may be used as two input signals for the L-PUF device.

Abstract: A leakage-based physical unclonable function (L-PUF) device, a L-PUF array and applications thereof are provided. The L-PUF device includes a precharge circuit, two leaky devices and a sense amplifier. The two leaky devices are electrically connected to the precharge circuit respectively. Each leaky device includes a transistor having a control end electrically connected to ground, a first end electrically connected to the precharge circuit and a second end electrically connected to ground. The sense amplifier is electrically connected to the first end of each of the two leaky devices, and may generate a first output signal and a second output signal. The sense amplifier may switch between a first state and a second state based on a voltage difference between the first leaky device and the second leaky device, which is determined by a leakage current of the first leaky device and a leakage current of the second leaky device.

Abstract: In some examples, the disclosure describes an electronic device with a processing resource and a memory resource storing computer-readable instructions executable by the processing resource to determine a wireless metric associated with a first wireless signal path utilizing concurrent dual wireless bands between an access point and the electronic device and alter the first wireless signal path to a second wireless signal path that utilizes a single band between the access point and the electronic device.

Abstract: A package includes a first package component; a second package component bonded to the first package component by a first plurality of solder connectors; and a first plurality of spacer connectors extending from the first package component to the second package component. A diameter of a spacer connector the first plurality of spacer connectors is larger than a height of a solder connector of the first plurality of solder connectors, and the first plurality of spacer connectors comprises a different material than the first plurality of solder connectors.

Abstract: A method for processing a curved plastic panel is to first form a hard coating layer, an optical function layer, and a printing layer on a flat plastic substrate, and then cut it into a predetermined shape, and then use a hot pressing and curving device to perform a hot pressing and curving process to the flat plastic substrate in order to make it becoming a curved plastic substrate. The hot pressing and curving device can simultaneously perform hot pressing during the heating process, and has the functions of real-time monitoring of the local temperature and the local curvature forming state, and then feedback to the local heating and curvature forming mechanism for adjustments. The monitoring of temperature and curvature can be divided into multiple stages, which can be monitored stage by stage and adjusted for heating or curvature forming to improve production yield.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a device layer, and a metallization structure. The substrate has a first surface. The device layer is over the first surface of the substrate. The device layer includes a plurality of passive component units. The metallization structure is over the device layer. The metallization structure includes a conductive bridge portion electrically connecting two adjacent passive component units.

Abstract: The present invention discloses a vessel power safety control system and operating method thereof. The vessel power safety control system includes a load power management module, a real-time monitoring module, an integration module and a power module. The present invention can assist the autonomous ship as any occurrence of fault during navigation. Once the accident occurs, the load power management module will give an instruction to control the DC bus to switch from closed circuit to open circuit to protect other equipment. After determining whether the errors of the equipment on board is eliminated, the load power management system performs automatic system reset procedure. As such, the DC bus can be converted from an open circuit to a closed circuit to restart the power supply for the facility.

Abstract: A p-GaN high-electron-mobility transistor, includes a substrate, a channel layer stacked on the substrate, a supply layer stacked on the channel layer, a first doped layer stacked on the supply layer, a second doped layer stacked on the first doped layer, and a third doped layer stacked on the second doped layer. A doping concentration of the first doped layer and the doping concentration of the third doped layer are lower than a doping concentration of the second doped layer. A gate is located on the third doped layer, and a source and a drain are electrically connected to the channel layer and the supply layer, respectively.

Abstract: A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included.

Abstract: An optical member driving mechanism for connecting an optical member is provided, including a fixed portion and a first adhesive member. The fixed portion includes a first member and a second member, wherein the first member is fixedly connected to the second member via the first adhesive member.

Abstract: A drug conjugate includes a structure shown by the following formula: Z-(linker-[R]m)n. In the formula, Z is a drug compound, R is a sugar, and m and n are independently an integer from 1 to 6. The drug compound Z is a hepatitis virus targeting drug, a hepatitis B virus (HBV) drug, an inhibitor of apoptosis protein (IAP) antagonist, a multidrug resistance (MDR) inhibitor, or analogues, precursors, prodrugs, derivatives thereof.

Abstract: A configurational structure of a unidirectional/bidirectional AC/DC power supply includes: a case, having a first lateral wall and a second lateral wall at two transverse sides thereof and defining a front wall and a back wall at two longitudinal sides thereof; a first bus unit, being installed in the case and against the first lateral wall; a power factor correction (PFC) unit, being installed in the case and close to the front wall; three power module units, being installed abreast in the case, the power module units and located between the PFC unit and the back wall; a second bus unit, being installed on the back wall; and a control system unit, being installed in the case and against the second lateral wall. Thereby, with the sophisticated configuration and layout formed among the components, the resulting power supply has reduced distortion, enhanced performance, and improved efficiency.

Abstract: The present disclosure provides a camera device including a first frame, a second frame, a camera component, and a driving component. The first frame includes a first arc surface on an inner surface of the first frame and recessing inward to form a circular arc shape. The second frame is movably disposed in the first frame and includes a second arc surface on an outer surface of the second frame and protruding outward to form a circular arc shape. The camera component is fixedly disposed in the second frame. The driving component is disposed on the first frame and the second frame, and the driving component is configured to drive the second frame to rotate with the first direction, the second direction, and the third direction as the axes.

Abstract: The present disclosure describes an apparatus and a method to detect a polishing pad profile during a polish process and adjust the polishing process based on the detected profile. The apparatus can include a polishing pad configured to polishing a substrate, a substrate carrier configured to hold the substrate against the polishing pad, and a detection module configured to detect a profile of the polishing pad. The detection module can include a probe configured to measure a thickness of one or more areas on the polishing pad, and a beam configured to support the probe, where the probe can be further configured to move along the beam.

Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.

Abstract: An example method for optimizing data deletion in a storage system comprises: monitoring one or more attributes associated with a storage volume associated with a file system; and setting, based on the monitoring of the one or more attributes, a discard option to be either enabled or disabled for the storage volume, wherein when the discard option is enabled, the file system is configured to automatically issue a discard request in response to a request to delete data stored on one or more blocks within a storage device associated with the storage volume, the discard request configured to command the storage device to free the one or more blocks for use by the file system to store additional data; and when the discard option is disabled, the file system does not automatically issue the discard request in response to the request to delete the data.

Abstract: A method includes bonding a first semiconductor die and a second semiconductor die to a substrate, where a gap is disposed between a first sidewall of the first semiconductor die and a second sidewall of the second semiconductor die, performing a plasma treatment to dope top surfaces and sidewalls of each of the first semiconductor die and the second semiconductor die with a first dopant, where a concentration of the first dopant in the first sidewall decreases in a vertical direction from a top surface of the first semiconductor die towards a bottom surface of the first semiconductor die, and a concentration of the first dopant in the second sidewall decreases in a vertical direction from a top surface of the second semiconductor die towards a bottom surface of the second semiconductor die, and filling the gap with a spin-on dielectric material.

Abstract: A method for performing codebook-based Physical Uplink Shared Channel (PUSCH) transmission by a User Equipment (UE) is provided. The method receives a Radio Resource Control (RRC) message including a PUSCH configuration indicating a codebook-based PUSCH transmission. The method receives a Downlink Control Information (DCI) format including a first field and a second field. The first field indicates an 8-port Sounding Reference Signal (SRS) resource. The second field indicates an index associated with a Transmission Precoding Matrix Indicator (TPMI) and the number of transmission layers. The method determines the number of codewords to be one or two based on the number of transmission layers. The method determines a codeword-to-layer mapping for spatial multiplexing based on the number of transmission layers and the number of codewords. The method determines a precoding matrix based on the index and the codeword-to-layer mapping.

Abstract: A power module of an electric assisted bicycle is disclosed and includes a pedal shaft, a housing, a motor, a reducer and a gear-plate output shaft and a sensing component. The housing includes a partition portion extended along a radial direction to divide an inner space of the housing into a motor accommodation portion and a reducer accommodation portion for accommodating the motor and the reducer, respectively. A stator of the motor and a fixed gear are respectively fixed to a first side and a second side, which are two opposite sides of the partition portion. A reducer input shaft includes two ends connected to the motor and the reducer, respectively, and an input-shaft main part disposed therebetween is connected to a third side of the partition portion. With the connection configuration of the three sides of the partition portion, the space utilization of the entire power module is optimized.