Abstract: The present invention provides a preparation method of pharmaceutical composition for treating chronic stroke, involving injection via brain into the cranium of a patient having chronic stroke for six months or more; the pharmaceutical composition is a suspension at least comprising adipose-derived stem cells treated by cell expansion, an active synergistic component and a growth factor, wherein the expression level of CD34 and CD45 of the adipose-derived stem cells treated by cell expansion is 10% or less, and the expression level of CD90 and CD105 is 90% or more; the active synergistic component is an extracellular vesicle; the growth factor is at least one selected from the group consisting of HGF, G-CSF, Fractalkine, IP-10, EGF, IL-1?, IL-1?, IL-4, IL-5, IL-13, IFN?, TGF? and sCD40L. The present invention overcomes the limitations of previous cell therapy and provides a cell-based preparation that is clinically safe and therapeutically effective for chronic cerebral stroke.

Abstract: A patrol and inspection vehicle includes a vehicle body, distance measuring devices installed on front and rear sides of the vehicle body for detecting distances of ambient objects, a LiDAR sensor installed on the vehicle body for constructing a three-dimensional spatial model for positioning and navigation, a panoramic camera installed on the vehicle body for recognizing images of ambient individuals, and a gas detector installed on the vehicle body for detecting leaked gases having a temperature different from room temperature. The patrol and inspection vehicle can automatically inspect whether there are gas leaks in pipelines and detect if individuals have accidentally entered restricted areas, thereby reducing the manpower required for patrols and enhancing factory safety.

Abstract: A computer implemented method (60) for remote analyzer monitoring, comprising: obtaining (62), via a computing device (20) comprising a camera (21), visual representation data (70) of at least a display interface (P1-D) of an automated analyzer (P1) after the automated analyzer (P1) has performed a predefined operation, wherein the visual representation data (70) of the display interface (P1-D) comprises data associated with an outcome of the predefined operation performed by the automated analyzer (P1); processing (64) the visual representation data to extract data (74) relating to an outcome of the predefined operation computed by the automated analyzer (P1) and comprised in the visual representation data (70) associated with the predefined operation; evaluating (66) the data associated with the predefined operation according to at least one evaluation criterion to thus generate evaluation data (76); and storing (68) the evaluation data associated with the predefined operation.

Abstract: A system having a Reconfigurable ReflectArray (RRA) structure includes a radiation layer and a control layer. The radiation layer includes at least one P-Intrinsic-N (P-I-N) diode and a plurality of reconfigurable reflective units. At least one part of the reconfigurable reflective units is electrically connected to the at least one P-I-N diode. The control layer includes at least one switch element and at least one control unit. The at least one switch element is electrically connected to the radiation layer. The at least one control unit is electrically connected to the at least one switch element. The number of the reconfigurable reflective units is different from the number of the at least one switch element.

Abstract: Disclosed is an expression vector comprising a polynucleotide encoding for a glutamine synthetase with reduced activity compared to a wild type glutamine synthetase. Also disclosed are host cells, methods for preparing stable cell line, methods of producing polypeptide of interest, and kits thereof.

Abstract: The present disclosure provides a memory device including a substrate including a first and a second surfaces opposite to each other, a first interconnection structure disposed on the first surface of the substrate, a first and second elements disposed in the substrate and/or the first interconnection structure, a second interconnection structure disposed on the first interconnection structure, and a third interconnection structure disposed on the second surface of the substrate. The first interconnection structure includes first wiring layers configured to be closest to the first and second elements. The third interconnection structure includes second wiring layers configured to be closest to the first and second elements. Each of the first and second elements includes a first electrical connection path through the first wiring layer and a second electrical connection path through the second wiring layer.

Abstract: An antenna system with switchable radiation gain includes a signal feeding element, a first antenna element, a second antenna element, a first diode, a first switch element, a second switch element, a first impedance transformer, and a second impedance transformer. The first antenna element is coupled to a first connection point. The second antenna element is coupled to a second connection point. The first diode has an anode coupled to the first connection point, and a cathode coupled to the second connection point. The first switch element and the second switch element are configured to select either the first impedance transformer or the second impedance transformer as a first target transformer, and the selected first target transformer is coupled between the first connection point and the signal feeding element.

Abstract: A process for fabricating a semiconductor structure is disclosed. The process includes: forming an isolation trench in a substrate; forming a trench fill layer to at least fill the isolation trench in the substrate, the silicon oxide trench fill layer comprising a portion in contact with the substrate below an upper surface of the substrate; exposing a sidewall of the isolation trench and without exposing a bottom of the isolation trench in the substrate; and forming a gate structure over the substrate, wherein the gate structure contacts the sidewall of the isolation trench.

Abstract: A memory circuit includes a substrate with a front side and a back side opposite the front side. An interconnect structure is situated on or over the substrate and has first and second metal layers and a via electrically connecting the first and second metal layers. A word line driver circuit is configured to output a word line enable signal to a word line of a memory array. The word line driver circuit has an inverter circuit configured to receive a word line signal, and an enable transistor electrically connected to an output of the inverter circuit by a metal line that includes the first metal layer, the second metal layer, and the via.

Abstract: A pixel structure is provided. The pixel structure includes a substrate, a photo detecting region, a first transfer gate, and a second transfer gate. The photo detecting region is in the substrate and has a first doping type. The first transfer gate includes a first portion in contact with a first side of the substrate and a second portion connected with the first portion and embedded in the substrate. An end of the second portion of the first transfer gate is adjacent to a side of the photo detecting region. The second transfer gate is adjacent to the first transfer gate. An end of the second transfer gate in the substrate is projectively over the photo detecting region. A method for manufacturing a pixel structure is also provided.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes first nanostructures formed over a substrate along a first direction, and second nanostructures formed over the substrate along the first direction. The semiconductor structure includes a first gate structure formed over the first nanostructures along a second direction, and a first S/D structure formed adjacent to the first gate structure. The semiconductor structure includes a second gate structure formed over the second nanostructures along the second direction, and a second S/D structure formed adjacent to the second gate structure. The semiconductor structure includes a dielectric wall structure formed along the first direction. The dielectric wall structure includes a first portion between the first S/D structure and the second S/D structure and a second portion between the first gate structure and the second gate structure.

Abstract: A reconfigurable intelligent surface includes a radiant layer, a sensing feeding circuit layer, a processing layer and a controlling circuit layer. The radiant layer includes at least two antennas and a plurality of reflecting units. Each of the at least two antennas is configured for sensing a polarization, a frequency or a direction angle of an incident electromagnetic wave. The reflecting units are arranged to form a reflecting surface. The sensing feeding circuit layer is signally connected to the antennas. The processing layer is signally connected to the sensing feeding circuit layer, and the processing layer is configured to produce a controlling signal corresponding thereto. The controlling circuit layer is signally connected to the radiant layer and the processing layer, wherein the controlling circuit layer receives the controlling signal and controls the reflecting units according to the controlling signal to adjust and form a reflecting electromagnetic wave.

Abstract: Organic light emitting materials and devices comprising phosphorescent metal complexes comprising ligands comprising aryl or heteroaryl groups substituted at both ortho positions are described. An organic light emitting device, comprising: an anode, a hole transport layer; an organic emissive layer comprising an emissive layer host and an emissive dopant; an electron impeding layer; and electron transport layer, and a cathode disposed, in that order, over a substrate.

Abstract: A circuit carrier includes a substrate, a capacitive electrode layer, a plurality of metal pads and a plurality of bridges, and a plurality of conductive pillars. The capacitive electrode layer formed on a surface of the substrate and includes a plurality of first electrodes and a plurality of second electrodes. At least two of the first electrodes are connected to each other and be arranged across a die-bonding region of the substrate for separating at least two of the second electrodes that partially protrude from the die-bonding region to respectively form extensions. The metal pads and the bridges are formed on another surface of the substrate and are located outside of the die-bonding region. Each of the bridges connects two of the metal pads, and each of the conductive pillars is embedded in the substrate and connects one of the extensions and a corresponding one of metal pads.

Abstract: An autonomous mobile robot and an operating method thereof are provided. The autonomous mobile robot includes a movement module, a detection module, a control module and an interaction module. The control module includes a determination unit and a navigation unit. The determination unit determines whether there is an obstacle near or on a predetermined path of the autonomous mobile robot according to the environment information. When the obstacle is on the predetermined path, the navigation unit decides an obstacle avoidance strategy according to the environment information and the type of the obstacle. The obstacle avoidance strategy at least includes moving along a side path, stopping aside to yield, moving backward and stopping at a yielding point to yield, and detouring. When the obstacle is near or on the predetermined path, the interaction module performs an interaction action according to the obstacle avoidance strategy and the type of the obstacle.

Abstract: A semiconductor structure including device structures arranged in a stack is provided. The device structures include substrates and through-substrate vias (TSVs). The TSVs are located in the substrates. The TSVs includes first TSVs. Each of the device structures includes the corresponding substrate and the corresponding first TSV. Each of the first TSVs passes through the corresponding substrate. The number of the TSVs in the endmost device structure is less than the number of the TSVs in another of the device structures. The first TSV in the endmost device structure and the first TSV in another of the device structures are aligned with each other and electrically connected to each other.

Abstract: In some embodiments, the present disclosure relates to a method of forming a transistor device. The method includes forming a source contact over a substrate, forming a drain contact over the substrate, and forming a gate contact material over the substrate. The gate contact material is patterned to define a gate structure that wraps around the source contact along a continuous and unbroken path.

Abstract: A through-substrate via (TSV) test structure including a substrate, a first TSV, and a test device is provided. The substrate includes a test region. The first TSV is located in the substrate of the test region. The test device is located on the substrate of the test region. The test device and the first TSV are separated from each other. The shortest distance between the test device and the first TSV is less than 10 ?m.

Abstract: A multi-directional output device includes a printed circuit board on which first and second magnetic sensors are arranged, and a direction control unit arranged above the printed circuit board. The direction control unit includes: first and second rotating driving bodies; first and second sliding driving bodies respectively movably connected to the first and second rotating driving bodies; first and second magnets respectively fixed on the first and second sliding driving bodies; and a lower cover on which first and second slide grooves are provided, wherein the first and second sliding driving bodies are respectively slidably arranged in the first and second slide grooves, and the first magnetic sensor and the second magnetic sensor are arranged corresponding to the first slide groove and the second slide groove, respectively.

Abstract: This disclosure relates to a fixing frame including a guiding element, a movable element, and a handle. The guiding element is configured for an interface card to be placed into the guiding element along a first direction. The movable element is movably disposed in the guiding element. The movable element includes a pushing portion and an abutted portion. The handle is pivotably disposed on the guiding element. The handle includes an abutting portion. The abutting portion selectively abuts the abutted portion of the movable element, so that the pushing portion of the movable element pushes the interface card along a second direction opposite to the first direction.