Patents by Inventor Chun On To

Chun On To has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942868
    Abstract: A power provider includes: first, second, and third inductors; a first transistor connected to the second inductor; a second transistor connected to the third inductor; and a power integrated chip (IC) including input terminals connected to the first, second, and third inductors, and an output terminal connected to a power line. The power provider may supply the power voltage using the first inductor and the power IC when power current is less than a first reference value, supply the power voltage using the second inductor, the first transistor, and the power IC when the power current is greater than the first reference value and less than a second reference value, and supply the power voltage using the second and third inductors, the first and second transistors, and the power IC when the power current is greater than the second reference value.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yoon Young Lee, Sung Chun Park
  • Patent number: 11938220
    Abstract: Provided is an anesthetic composition for locally administering a local anesthetic agent to a subject in need thereof. The anesthetic composition has a lipid based complex prepared by hydrating a lipid cake containing a local anesthetic agent and a lipid mixture with an aqueous buffer solution at a pH higher than 5.5. Also provided is a method to prepare an anesthetic composition using a simpler and more robust for large-scale manufacture and for providing a high molar ratio of local anesthetic agent to phospholipid content as compared to the prior art. This anesthetic composition has a prolonged duration of efficacy adapted to drug delivery.
    Type: Grant
    Filed: March 30, 2019
    Date of Patent: March 26, 2024
    Assignees: Taiwan Liposome Co., Ltd, TLC Biopharmaceuticals, Inc.
    Inventors: Keelung Hong, Yun-Long Tseng, Chun-Yen Lai, Wan-Ni Yu, Hao-Wen Kao, Yi-Yu Lin
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Patent number: 11943838
    Abstract: Apparatus with I/O modules such as a networked security camera with a plurality of wireless connections to continue to use at least one network connection is presented. The apparatus, comprising a plurality of RF units, a plurality of SIM card interfaces, at least one processing unit, at least one non-transitory computer readable storage medium and at least on input/output module, is able to continue sending and receiving data through one or more wireless networks using a plurality of RF units. Further, when more bandwidth and/or higher reliability is required, the apparatus aggregates data connections established with different wireless networks.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: March 26, 2024
    Assignee: Pismo Labs Technology Limited
    Inventors: Ming Pui Chong, Wan Chun Leung, Chan Neng Leong, Uzair Ahmed Chughtai
  • Patent number: 11937631
    Abstract: An aerosol generation device includes a first housing including an inner accommodating space and an opening exposing the inner accommodating space to an outside of the first housing; a second housing including an inner space and coupled to the first housing with a fastening portion; a battery inserted into the inner space of the second housing and having a part exposed to an outside of the second housing; a case into which the second housing is inserted, the case covering at least one of the first housing or the second housing; and a cap coupled to the first housing and covering the first housing, wherein the case covers the part of the battery exposed to the outside of the second housing.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: March 26, 2024
    Assignee: KT&G CORPORATION
    Inventors: Jong Sub Lee, In Seoung Chun, Sung Rok Oh
  • Patent number: 11942174
    Abstract: Methods, systems, and devices for topology-based retirement in a memory system are described. In some examples, a memory system or memory device may be configured to evaluate error conditions relative to a physical or electrical organization of a memory array, which may support inferring the presence or absence of defects in one or more structures of a memory device. For example, based on various evaluations of detected errors, a memory system or a memory device may be able to infer a presence of a short-circuit, an open circuit, a dielectric breakdown, or other defects of a memory array that may be related to wear or degradation over time, and retire a portion of a memory array based on such an inference.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: March 26, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Chun S. Yeung, Deping He, Jonathan S. Parry
  • Patent number: 11942568
    Abstract: A light-emitting diode device includes an epitaxial structure that contains first-type and second-type semiconductor units and an active layer interposed therebetween, a light transmittable dielectric element that is disposed on the first-type semiconductor unit opposite to the active layer and is formed with a first through hole, an adhesive layer that is disposed on the dielectric element and is formed with a second through hole corresponding in position to the first through hole, and a metal contact element that is disposed on the adhesive layer. The adhesive layer has a thickness of at most one fifth of that of the dielectric element. The metal contact element extends into the first and second through holes, and electrically contacts the first-type semiconductor unit. A method for manufacturing the LED device is also disclosed.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: March 26, 2024
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Dongyan Zhang, Yuehua Jia, Cheng Meng, Jing Wang, Chun-I Wu, Duxiang Wang
  • Patent number: 11943761
    Abstract: A user equipment (UE) may make a joint decision of adaptive receive diversity (ARD) and adaptive transmit diversity (ATD) configurations, including transmit (Tx) and receive (Rx) antennas selection and/or blanking based on downlink (DL) and uplink (UL) traffic conditions. The UE may disable at least one Tx chain for a transmission of a codebook-based sounding reference signal (SRS) (SRS-CB) based on one or more of at least one DL traffic condition or at least one UL traffic condition, and transmit, to a base station, upon disabling the at least one Tx chain, the SRS-CB via an antenna associated with at least one active Tx chain.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Peter Pui Lok Ang, Enoch Shiao-Kuang Lu, Alexei Yurievitch Gorokhov, Aamod Khandekar, Brian Clarke Banister, Raghu Narayan Challa, Kuo-Chun Lee, Arvind Vardarajan Santhanam, Jianming Zhu, Arash Ebadi Shahrivar, Pranay Sudeep Rungta
  • Patent number: 11940692
    Abstract: An electronic device includes a substrate, a plurality of first retaining walls, a second retaining wall, and a light emitting element. The first retaining walls are arranged on the substrate. The second retaining wall is arranged on the substrate and disposed within one of the first retaining walls. The light emitting element is arranged on the substrate and disposed between the second retaining wall and one of the first retaining walls adjacent to the second retaining wall. In a cross section, there are a first distance between the light emitting element and the one of the first retaining walls, and a second distance between the light emitting element and the second retaining wall, wherein the second distance is smaller than the first distance.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: March 26, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Wei-Tsung Hsu, Chun-Fang Chen, Wei-Ning Shih
  • Patent number: 11941841
    Abstract: A computer-implemented method according to one embodiment includes running an initial network on a plurality of images to detect actors pictured therein and body joints of the detected actors. The method further includes running fully-connected networks in parallel, one fully-connected network for each of the detected actors, to reconstruct complete three-dimensional poses of the actors. Sequential model fitting is performed on the plurality of images. The sequential model fitting is based on results of running the initial network and the fully-connected networks. The method further includes determining, based on the sequential model fitting, a locational position for a camera in which the camera has a view of a possible point of collision of two or more of the actors. The camera is instructed to be positioned in the locational position.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: March 26, 2024
    Assignee: International Business Machines Corporation
    Inventors: Yu-Siang Chen, Ching-Chun Liu, Ryan Young, Ting-Chieh Yu
  • Patent number: 11943999
    Abstract: Novel Pt tetradentate complexes having Pt—O bond is disclosed. These complexes are useful as emitters in phosphorescent OLEDs.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: March 26, 2024
    Assignee: UNIVERSAL DISPLAY CORPORATION
    Inventors: Chun Lin, Chuanjun Xia, Jui-Yi Tsai
  • Patent number: 11943732
    Abstract: A method for performing, by a user equipment (UE), a registration to a network in a wireless communication system is disclosed. More specifically, the UE performs a registration to a first public land mobile network (PLMN) via a first base station, receives a disaster related message indicating that a disaster roaming service is provided, checks whether the UE is provided with the disaster roaming service based on the disaster related message, selects a second PLMN providing the disaster roaming service when the UE is provided with the disaster roaming service as a result of the check, transmits a registration request message to the selected second PLMN based on the disaster related message, and receives, from the second PLMN, a response message to the registration request message.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: March 26, 2024
    Assignee: LG ELECTRONICS INC.
    Inventor: Sungduck Chun
  • Patent number: 11938699
    Abstract: A system for forming a pressware product from a web of a roll of material comprises a positive mold, a negative mold, a heating element, an actuator, a force sensor, and a control system. The positive mold forms a top surface of the pressware product. The negative mold forms a bottom surface of the pressware product. The heating element is coupled to the positive mold or the negative mold. The actuator shifts the positive mold or the negative mold to cut and form the pressware product in a single stroke. The force sensor detects the forming force applied by the actuator, and the control system directs the actuator to adjust the forming force.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: March 26, 2024
    Assignee: Brown LLC
    Inventors: Victor L. Chun, Steffen Brown, Philip Eichbauer
  • Patent number: 11940645
    Abstract: A front light module includes a reflective display device, a front light guide, and a light emitting unit plate. The front light guide plate includes a micro-structure. The micro-structure has a first angle between a surface thereof close to the light emitting unit and an upper surface of the front light guide plate. The micro-structure has a second angle between a surface thereof away from the light emitting unit and the upper surface of the front light guide plate. The micro-structure has a third angle between the surface thereof close to the light emitting unit and the surface thereof away from the light emitting unit. The first angle is within a range between 30 degrees and 60 degrees, the second angle is within a range between 30 degrees and 59 degrees, and the third angle is greater than 90 degrees.
    Type: Grant
    Filed: September 12, 2022
    Date of Patent: March 26, 2024
    Assignee: DARWIN PRECISIONS CORPORATION
    Inventors: Chun-Te Wang, Yu-Shan Shen, Yen-Lung Chen
  • Patent number: 11942169
    Abstract: A semiconductor memory device includes a first word line formed over a first active region. In some embodiments, a first metal line is disposed over and perpendicular to the first word line, where the first metal line is electrically connected to the first word line using a first conductive via, and where the first conductive via is disposed over the first active region. In some examples, the semiconductor memory device further includes a second metal line and a third metal line both parallel to the first metal line and disposed on opposing sides of the first metal line, where the second metal line is electrically connected to a source/drain region of the first active region using a second conductive via, and where the third metal line is electrically connected to the source/drain region of the first active region using a third conductive via.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Wen Su, Kian-Long Lim, Wen-Chun Keng, Chang-Ta Yang, Shih-Hao Lin
  • Patent number: 11942940
    Abstract: Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: March 26, 2024
    Assignee: Renesas Electronics America Inc.
    Inventors: Aaron Shreeve, Chun Cheung, Michael Jason Houston, Mehul Shah
  • Patent number: 11942373
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin, a second fin and a third fin therebetween. A first insulating structure includes a first insulating layer formed between the first and third fins, a capping structure covering the first insulating layer, a first insulating liner covering sidewall surfaces of the first insulating layer and the capping structure and a bottom surface of the first insulating layer, and a second insulating liner formed between the first insulating liner and the first fin and between the first insulating liner and the third fin. The second insulating structure includes a second insulating layer formed between the second fin and the third fin and a third insulating liner formed between the second insulating layer and the second fin and between the second insulating layer and the third fin.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chu-An Lee, Chen-Hao Wu, Peng-Chung Jangjian, Chun-Wen Hsiao, Teng-Chun Tsai, Huang-Lin Chao
  • Patent number: 11940828
    Abstract: A voltage tracking circuit is provided. The voltage tracking circuit includes first and second P-type transistors and a control circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The gate and the drain of the second P-type transistor are respectively coupled to the first voltage terminal and a second voltage terminal. The control circuit is coupled to the first and second voltage terminals and generates a control voltage according to the first voltage and the second voltage. The sources of the first and second P-type transistors are coupled to an output terminal of the voltage tracking circuit, and the output voltage is generated at the output terminal. In response to the second voltage being higher than the first voltage, the control circuit generates the control signal to turn off the first P-type transistor.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: March 26, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shao-Chang Huang, Yeh-Ning Jou, Ching-Ho Li, Kai-Chieh Hsu, Chun-Chih Chen, Chien-Wei Wang, Gong-Kai Lin, Li-Fan Chen
  • Patent number: 11944000
    Abstract: Fluorine substituted metal complexes as efficient phosphorescent emitters is disclosed. The fluorine substitution is at para position of a phenyl group.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: March 26, 2024
    Assignee: UNIVERSAL DISPLAY CORPORATION
    Inventors: Bin Ma, Chuanjun Xia, Chun Lin
  • Patent number: D1019648
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: March 26, 2024
    Assignee: Dell Products L.P.
    Inventors: Victor C. Cheung, Chun Long Goh