Patents by Inventor Chun-Ren Cheng

Chun-Ren Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210231603
    Abstract: A sensor array includes a semiconductor substrate, a first plurality of FET sensors and a second plurality of FET sensors. Each of the FET sensors includes a channel region between a source and a drain region in the semiconductor substrate and underlying a gate structure disposed on a first side of the channel region, and a dielectric layer disposed on a second side of the channel region opposite from the first side of the channel region. A first plurality of capture reagents is coupled to the dielectric layer over the channel region of the first plurality of FET sensors, and a second plurality of capture reagents is coupled to the dielectric layer over the channel region of the second plurality of FET sensors. The second plurality of capture reagents is different from the first plurality of capture reagents.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 29, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Hui LIN, Chun-Ren CHENG, Shih-Fen HUANG, Fu-Chun HUANG
  • Publication number: 20210193904
    Abstract: A method of manufacturing a semiconductor device includes: forming a first substrate includes a membrane stack over a first dielectric layer, the membrane stack having a first electrode, a second electrode over the first electrode and a piezoelectric layer between the first electrode and the second electrode, a third electrode over the first dielectric layer, and a second dielectric layer over the membrane stack and the third electrode; forming a second substrate, including: a redistribution layer (RDL) over a third substrate, the RDL having a fourth electrode; and a first cavity on a surface of the RDL adjacent to the fourth electrode; forming a second cavity in one of the first substrate and the second substrate; and bonding the first substrate to the second substrate.
    Type: Application
    Filed: March 5, 2021
    Publication date: June 24, 2021
    Inventors: YI HENG TSAI, FU-CHUN HUANG, CHING-HUI LIN, CHUN-REN CHENG
  • Patent number: 10989685
    Abstract: A method of sensing a biological sample includes introducing a fluid containing the biological sample through a first opening in a substrate. The method further includes passing the fluid from the first opening to a first cavity through at least one microfluidic channel. The method further includes repelling the biological sample from a first surface of the first cavity using a first surface modification layer. The method further includes attracting the biological sample to a sensing device using a plurality of modified surface patterns, wherein a first modified surface pattern of the plurality of modified surface patterns has different surface properties from a second modified surface pattern of the plurality of modified surface patterns. The method further includes outputting the fluid through a second opening in the substrate.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: April 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shao Liu, Chun-Wen Cheng, Chun-Ren Cheng
  • Publication number: 20210116413
    Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Cheng HUANG, Yi-Hsien CHANG, Chin-Hua WEN, Chun-Ren CHENG, Shih-Fen HUANG, Tung-Tsun CHEN, Yu-Jie HUANG, Ching-Hui LIN, Sean CHENG, Hector CHANG
  • Publication number: 20210117636
    Abstract: The structure of a semiconductor device with an array of bioFET sensors, a biometric fingerprint sensor, and a temperature sensor and a method of fabricating the semiconductor device are disclosed. A method for fabricating the semiconductor device includes forming a gate electrode on a first side of a semiconductor substrate, forming a channel region between source and drain regions within the semiconductor substrate, and forming a piezoelectric sensor region on a second side of the semiconductor substrate. The second side is substantially parallel and opposite to the first side. The method further includes forming a temperature sensing electrode on the second side during the forming of the piezoelectric sensor region, forming a sensing well on the channel region, and binding capture reagents on the sensing well.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Hui LIN, Chun-Ren CHENG, Shih-Fen HUANG, Fu-Chun HUANG
  • Publication number: 20210115507
    Abstract: An integrated semiconductor device for manipulating and processing bio-entity samples and methods are described. The device includes a lower substrate, at least one optical signal conduit disposed on the lower substrate, at least one cap bonding pad disposed on the lower substrate, a cap configured to form a capped area, and disposed on the at least one cap bonding pad, a fluidic channel, wherein a first side of the fluidic channel is formed on the lower substrate and a second side of the fluidic channel is formed on the cap, a photosensor array coupled to sensor control circuitry, and logic circuitry coupled to the fluidic control circuitry, and the sensor control circuitry.
    Type: Application
    Filed: December 3, 2020
    Publication date: April 22, 2021
    Inventors: Allen Timothy Chang, Yi-Hsien Chang, Chun-Ren Cheng
  • Patent number: 10984211
    Abstract: The structure of a semiconductor device with an array of bioFET sensors, a biometric fingerprint sensor, and a temperature sensor and a method of fabricating the semiconductor device are disclosed. A method for fabricating the semiconductor device includes forming a gate electrode on a first side of a semiconductor substrate, forming a channel region between source and drain regions within the semiconductor substrate, and forming a piezoelectric sensor region on a second side of the semiconductor substrate. The second side is substantially parallel and opposite to the first side. The method further includes forming a temperature sensing electrode on the second side during the forming of the piezoelectric sensor region, forming a sensing well on the channel region, and binding capture reagents on the sensing well.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: April 20, 2021
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Fu-Chun Huang
  • Patent number: 10955379
    Abstract: A sensor array includes a semiconductor substrate, a first plurality of FET sensors and a second plurality of FET sensors. Each of the FET sensors includes a channel region between a source and a drain region in the semiconductor substrate and underlying a gate structure disposed on a first side of the channel region, and a dielectric layer disposed on a second side of the channel region opposite from the first side of the channel region. A first plurality of capture reagents is coupled to the dielectric layer over the channel region of the first plurality of FET sensors, and a second plurality of capture reagents is coupled to the dielectric layer over the channel region of the second plurality of FET sensors. The second plurality of capture reagents is different from the first plurality of capture reagents.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: March 23, 2021
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Fu-Chun Huang
  • Publication number: 20210078857
    Abstract: A hybrid ultrasonic transducer and a method of manufacturing the same are provided. A method of manufacturing a semiconductor device includes the forming of a first substrate and a second substrate. The forming of the first substrate includes: depositing a membrane stack over a first dielectric layer; forming a third electrode over the first dielectric layer; and depositing a second dielectric layer over the membrane stack and the third electrode. The forming of the second substrate includes: forming a redistribution layer (RDL) having a fourth electrode; and etching a first cavity on a surface of the RDL adjacent to the fourth electrode. The method further includes: forming a second cavity in one of the first substrate and the second substrate; and bonding the first substrate to the second substrate.
    Type: Application
    Filed: September 17, 2019
    Publication date: March 18, 2021
    Inventors: YI HENG TSAI, FU-CHUN HUANG, CHING-HUI LIN, CHUN-REN CHENG
  • Patent number: 10944041
    Abstract: A hybrid ultrasonic transducer and a method of manufacturing the same are provided. A method of manufacturing a semiconductor device includes the forming of a first substrate and a second substrate. The forming of the first substrate includes: depositing a membrane stack over a first dielectric layer; forming a third electrode over the first dielectric layer; and depositing a second dielectric layer over the membrane stack and the third electrode. The forming of the second substrate includes: forming a redistribution layer (RDL) having a fourth electrode; and etching a first cavity on a surface of the RDL adjacent to the fourth electrode. The method further includes: forming a second cavity in one of the first substrate and the second substrate; and bonding the first substrate to the second substrate.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: March 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi Heng Tsai, Fu-Chun Huang, Ching-Hui Lin, Chun-Ren Cheng
  • Publication number: 20210061641
    Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 4, 2021
    Inventors: Fan Hu, Chun-Ren Cheng, Hsiang-Fu Chen, Wen-Chuan Tai
  • Patent number: 10876997
    Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: December 29, 2020
    Inventors: Jui-Cheng Huang, Yi-Hsien Chang, Chin-Hua Wen, Chun-Ren Cheng, Shih-Fen Huang, Tung-Tsun Chen, Yu-Jie Huang, Ching-Hui Lin, Sean Cheng, Hector Chang
  • Patent number: 10865443
    Abstract: An integrated semiconductor device for manipulating and processing bio-entity samples and methods are described. The device includes a lower substrate, at least one optical signal conduit disposed on the lower substrate, at least one cap bonding pad disposed on the lower substrate, a cap configured to form a capped area, and disposed on the at least one cap bonding pad, a fluidic channel, wherein a first side of the fluidic channel is formed on the lower substrate and a second side of the fluidic channel is formed on the cap, a photosensor array coupled to sensor control circuitry, and logic circuitry coupled to the fluidic control circuitry, and the sensor control circuitry.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Allen Timothy Chang, Yi-Hsien Chang, Chun-Ren Cheng
  • Publication number: 20200361763
    Abstract: A method of manufacturing a semiconductor structure includes providing a first substrate, disposing and patterning a plate over the first substrate, disposing a first sacrificial oxide layer over the plate, forming a plurality of recesses over a surface of the first sacrificial oxide layer, disposing and patterning a membrane over the first sacrificial oxide layer, disposing a second sacrificial oxide layer to surround the membrane and cover the first sacrificial oxide layer; and forming a plurality of conductive plugs passing through the plate or the membrane, wherein the plate includes a semiconductive member and a tensile member, and the semiconductive member is disposed within the tensile member.
    Type: Application
    Filed: July 30, 2020
    Publication date: November 19, 2020
    Inventors: YI-HSIEN CHANG, CHUN-REN CHENG, WEI-CHENG SHEN, WEN-CHIEN CHEN
  • Patent number: 10829364
    Abstract: A method includes the following operations: forming a piezoelectric substrate including a piezoelectric structure and a conductive contact structure, in which the piezoelectric structure has a conductive layer and a piezoelectric layer in contact with the conductive layer, and the conductive contact structure is electrically connected to the piezoelectric structure and protrudes beyond a principal surface of the piezoelectric substrate; forming a semiconductor substrate having a conductive receiving feature and a semiconductor device electrically connected thereto; aligning the conductive contact structure of the piezoelectric substrate with the conductive receiving feature of the semiconductor substrate; and bonding the piezoelectric substrate with the semiconductor substrate such that the conductive contact structure is in contact with the conductive receiving feature.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: November 10, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Ren Cheng, Richard Yen, Yi-Hsien Chang, Wei-Cheng Shen
  • Publication number: 20200350311
    Abstract: A method for manufacturing a semiconductor structure is provided, wherein the method includes the following operations. A substrate having a transistor is received, wherein the transistor includes a channel region and a gate on a first side of the channel region. A second side of the channel region of the transistor is exposed, wherein the second side is opposite to the first side. A metal oxide is formed on the second side of the channel region of the transistor, wherein the metal oxide contacts the channel region and is exposed to the environment. A semiconductor structure and an operation of a semiconductor structure thereof are also provided.
    Type: Application
    Filed: July 8, 2020
    Publication date: November 5, 2020
    Inventors: Fu-Chun Huang, Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Alexander Kalnitsky
  • Publication number: 20200346926
    Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer, wherein the formation of the plurality of scribe lines includes removing portions of the second wafer from the second surface towards the first surface to form a third surface between the first surface and the second surface, and the plurality of scribe lines protrudes from the third surface of the second wafer.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 5, 2020
    Inventors: WEI-CHENG SHEN, YI-HSIEN CHANG, YI-HENG TSAI, CHUN-REN CHENG
  • Publication number: 20200290863
    Abstract: A micro-electro-mechanical system (MEMS) device includes a substrate, a proof mass, and a piezoelectric bump. The substrate has a surface. The proof mass is suspended over the surface of the substrate, wherein the proof mass is movable with respect to the substrate. The piezoelectric bump is disposed on the surface of the substrate and extends a distance from the surface of the substrate toward the proof mass.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 17, 2020
    Inventors: FAN HU, WEN-CHUAN TAI, HSIANG-FU CHEN, CHUN-REN CHENG
  • Patent number: 10756086
    Abstract: A method of manufacturing a semiconductor structure is provided, wherein the method includes the following operations. A substrate having a transistor is received, wherein the transistor includes a channel region and a gate on a first side of the channel region. The second side of the channel region of the transistor is exposed, wherein the second side is opposite to the first side. A metal oxide is formed on the second side of the channel region of the transistor, wherein the metal oxide contacts the channel region and is exposed to the environment. A semiconductor structure and an operation of a semiconductor structure thereof are also provided.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: August 25, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fu-Chun Huang, Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Alexander Kalnitsky
  • Patent number: 10737936
    Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer; wherein the plurality of scribe lines protrudes from a third surface of the second wafer, and the third surface is between the first surface and the second surface.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: August 11, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Cheng Shen, Yi-Hsien Chang, Yi-Heng Tsai, Chun-Ren Cheng