Abstract: An antenna structure includes a metal frame. The metal frame includes a first surface, a second surface, and a third surface. The third surface is located between the first surface and the second surface. The metal frame includes at least one antenna. The at least one antenna includes a first gap, a second gap, and a feed portion. The first gap is disposed between the first surface and the second surface. The second gap is disposed in the third surface. The feed portion is mounted on the first surface and spans the first gap. When the feed portion supplies an electric current, the electric current is coupled to the first gap and the second gap.

Abstract: An image analysis method includes: inputting a to-be analyzed image into a region-based convolutional neural network (RCNN) model; outputting a masked image; calculating the center of a masked object in the masked image using the region-based convolutional neural network model; calculating the center of a masked object in the masked image; regarding the center as a origin of coordinate, searching for the farthest coordinate point from the origin of coordinate in each of the four quadrants relative to the origin of coordinate; generating an image analysis block for each of the farthest coordinate points; and performing post-processing on the image analysis blocks to obtain an object range.

Abstract: A manufacturing method of a semiconductor device includes forming a hard mask layer and a photoresist on a substrate having a layer to be etched, and performing exposure and development such that the patterned photoresist has first trenches and to expose the hard mask layer, wherein ends of the first trenches have a width gradually decreased toward an end point. The exposed hard mask layer is removed using the patterned photoresist to transfer the pattern of the first trenches to the hard mask layer such that the patterned hard mask layer has second trenches, and the ends of the second trenches have a width gradually decreased toward an end point. Spacers are formed on inner walls of the second trenches. The hard mask layer is removed such that the layer to be etched is exposed. The exposed layer to be etched is removed using the spacers as an etch mask.

Abstract: A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but leaving at least one elongated portion of the substrate inside the trench. A first isolation layer is formed over the patterned hard mask layer. The first isolation layer fills the trench and covers the at least one elongated portion of the substrate. A portion of the first isolation layer is removed to expose the at least one elongated portion of the substrate. The at least one elongated portion of the substrate is thereafter removed to form a first opening. A second isolation layer is formed over the first opening, the patterned hard mask layer, and the first isolation layer, the second isolation layer sealing the first opening to form an air gap.

Abstract: The present invention relates to an anti-static photomask, including a substrate and a patterned mask layer formed on the substrate. The patterned mask layer includes a conductive strip and a conductive string, wherein the conductive strip includes an end, and the conductive string includes an isolated end. The end of the conductive strip is connected to the conductive string.

Abstract: In order to prevent formation of voids in STI film, after a second buried insulating layer is filled and planarized, a high density cap is formed embedded in the center region of the second buried insulating layer of the STI trench. The high density cap shields and protects the weaker center region of the second buried insulating layer of the STI trench from the subsequent processing steps and prevents formation of voids in the second buried insulating layer.

Abstract: An antenna structure applied in a wireless communication device includes a metal frame. The wireless communication device includes at least one electronic component. The metal frame includes a substrate. The substrate includes an antenna. The antenna includes a feed portion and a gap. The feed portion spans the gap. The metal frame is spaced from the electronic component. A clearance is formed between the metal frame and the electronic component.

Abstract: An antenna structure includes a metal frame, at least one feed source, and a feed portion. The metal frame includes at least one radiating portion and at least one slot. The at least one slot is disposed in the at least one radiating portion or adjacent to the at least one radiating portion. The at least one feed source and the at least one radiating portion form a first antenna. The feed portion and the at least one slot form a second antenna. The at least one feed source supplies an electric current for the first antenna, thereby exciting a first working mode and generating a radiation signal in a first frequency band. The feed portion spans the at least one slot to supply the electric current for the second antenna, thereby exciting a second working mode and generating a radiation signal in a second frequency band.

Abstract: An antenna structure includes a metal frame. The metal frame includes a first surface, a second surface, and a third surface. The third surface is located between the first surface and the second surface. The metal frame includes at least one antenna. The at least one antenna includes a first gap, a second gap, and a feed portion. The first gap is disposed between the first surface and the second surface. The second gap is disposed in the third surface. The feed portion is mounted on the first surface and spans the first gap. When the feed portion supplies an electric current, the electric current is coupled to the first gap and the second gap.

Abstract: Methods for producing monocrystalline silicon ingots in which the pull rate during neck growth is monitored are disclosed. A moving average of the pull rate may be calculated and compared to a target moving average to determine if dislocations were not eliminated and the neck is not suitable for producing an ingot main body suspended from the neck.

Abstract: Methods for producing monocrystalline silicon ingots in which the pull rate during neck growth is monitored are disclosed. A moving average of the pull rate may be calculated and compared to a target moving average to determine if dislocations were not eliminated and the neck is not suitable for producing an ingot main body suspended from the neck.

Abstract: Methods for producing monocrystalline silicon ingots in which the pull rate during neck growth is monitored are disclosed. A moving average of the pull rate may be calculated and compared to a target moving average to determine if dislocations were not eliminated and the neck is not suitable for producing an ingot main body suspended from the neck.

Abstract: An attachment lock is connected with a coupling orifice of a portable device, a size of a cross section of an accommodation chamber of the coupling orifice is more than an opening of the coupling orifice. The attachment lock contains: a body, a fastener, and a lock mechanism. The fastener includes a pair of locking parts movably connected in the body and changeably inserted into the coupling orifice via the opening of the coupling orifice so as to retract. Furthermore, the pair of locking parts are changeably connected in the coupling orifice so as to expand after moving into the coupling orifice. The pair of locking parts respectively include a first contacting portion and a second contacting portion which have a first arcuation edge and a second arcuation edge individually. The lock mechanism is configured to lock the fastener, when the pair of locking parts changeably expand.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a dielectric layer over a semiconductor substrate and forming a contact plug in the dielectric layer. The method also includes partially removing the contact plug to form a recess over the contact plug. The method further includes forming a capacitor element in the recess.

Abstract: The lockset includes a first body and a second body. The first body includes a lock body disposed in the first body, a first upper face having a lock hole and a first side face having a positioning hole. The second body includes a second upper face and a second side face. A rotatable buckle having a rotating unit and a lock unit is disposed on the second upper face. One end of the rotating unit is pivotally connected with the second upper face and the other end is connected with the lock unit. A positioning unit is disposed on the second side face. When the first side face is in a lock position, the positioning unit inserts into the positioning hole, and the rotatable unit may be rotated to insert the lock unit into the lock hole, wherein the lock body restricts the lock unit from leaving the lock hole.

Abstract: A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but leaving at least one elongated portion of the substrate inside the trench. A first isolation layer is formed over the patterned hard mask layer. The first isolation layer fills the trench and covers the at least one elongated portion of the substrate. A portion of the first isolation layer is removed to expose the at least one elongated portion of the substrate. The at least one elongated portion of the substrate is thereafter removed to form a first opening. A second isolation layer is formed over the first opening, the patterned hard mask layer, and the first isolation layer, the second isolation layer sealing the first opening to form an air gap.

Abstract: A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but leaving at least one elongated portion of the substrate inside the trench. A first isolation layer is formed over the patterned hard mask layer. The first isolation layer fills the trench and covers the at least one elongated portion of the substrate. A portion of the first isolation layer is removed to expose the at least one elongated portion of the substrate. The at least one elongated portion of the substrate is thereafter removed to form a first opening. A second isolation layer is formed over the first opening, the patterned hard mask layer, and the first isolation layer, the second isolation layer sealing the first opening to form an air gap.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a gate stack over the semiconductor substrate. The semiconductor device structure includes spacers over opposite sidewalls of the gate stack. The spacers and the gate stack surround a recess over the gate stack. The semiconductor device structure includes a first insulating layer over the gate stack and an inner wall of the recess. The semiconductor device structure includes a second insulating layer over the first insulating layer. Materials of the first insulating layer and the second insulating layer are different, and a first thickness of the first insulating layer is less than a second thickness of the second insulating layer.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a dielectric layer over a semiconductor substrate and forming a contact plug in the dielectric layer. The method also includes partially removing the contact plug to form a recess over the contact plug. The method further includes forming a capacitor element in the recess.

Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device also includes a contact plug in the dielectric layer, and a recess extending from a surface of the dielectric layer towards the contact plug. The semiconductor device further includes a capacitor element in the recess and electrically connected to the contact plug.