Abstract: A memory device includes a memory array comprising a plurality of memory cells arranged over a plurality of rows, the rows including a plurality of word lines, respectively, a first group of the memory cells coupled to an even-numbered one of the word lines and a second group of the memory cells coupled to an odd-numbered one of the word lines. The even-numbered word line is disposed in a first one of a plurality of metallization layers formed vertically above a substrate, wherein the even-numbered word line extends along a first lateral direction and includes a first stitch portion extending in a second lateral direction perpendicular to the first lateral direction. The odd-numbered word line is disposed in a second one of the plurality of metallization layers, wherein the odd-numbered word line extends along the first lateral direction and includes a second stitch portion extending in the second lateral direction.

Abstract: An organic electroluminescent device (OLED) comprising an anode; a cathode; and an emissive region comprising a first emissive layer disposed between the anode and the cathode is provided. The OLED further comprises a microcavity structure, the first emissive layer comprises a first emitter, which is a phosphorescent emitter or a fluorescent emitter; the first emissive layer emits a first luminescent radiation when a voltage is applied across the OLED; the first emissive layer has a photoluminescent spectrum with a peak emission wavelength ?max, a first area T, and a second area M; the OLED has a luminance at normal incidence l0, and a luminance at 60 degrees from normal incidence l60; and one of the following conditions is true: the first emitter is a phosphorescent emitter where M/T ratio?0.38 and l60/l0?15%; or??(1) the first emitter is a fluorescent emitter where M/T ratio?0.42 and l60/l0?25%.

Abstract: Provided are organometallic compounds including a ligand LA having a structure of Also provided are formulations comprising these organometallic compounds. Further provided are OLEDs and related consumer products that utilize these organometallic compounds.

Abstract: Provided are organometallic compounds comprising a ligand which is at least a two-dentate ligand which comprises at least one 5-membered nitrogen containing heterocyclic ring, the nitrogen of which is bonded to the central metal atom. Also provided are formulations comprising these organometallic compounds. Further provided are organic light emitting devices (OLEDs) and related consumer products that utilize these organometallic compounds.

Abstract: Provided are organometallic compounds including a ligand LA of the following Formula I Also provided are formulations including these organometallic compounds. Further provided are OLEDs and related consumer products that utilize these organometallic compounds.

Abstract: Provided are compounds of formula Ir(LA)2LC where: each ligand LA can be the same or different and has Formula I Also provided are formulations comprising these iridium complexes comprising pyridine-azole ligands. Further provided are OLEDs and related consumer products that utilize these iridium complexes comprising pyridine-azole ligands.

Abstract: Disclosed is a methods and apparatus which can improve defect tolerability of a hardware-based neural network. In one embodiment, a method for performing a calculation of values on first neurons of a first layer in a neural network, includes: receiving a first pattern of a memory cell array; determining a second pattern of the memory cell array according to a third pattern; determining at least one pair of columns of the memory cell array according to the first pattern and the second pattern; switching input data of two columns of each of the at least one pair of columns of the memory cell array; and switching output data of the two columns in each of the at least one pair of columns of the memory cell array so as to determine the values on the first neurons of the first layer.

Abstract: A reference voltage generator includes an input terminal configured to receive an enable signal and an output terminal configured to provide an output signal. A voltage generator circuit is arranged to generate a first output voltage signal, and a pre-settling circuit is arranged to generate a second output voltage. The pre-settling circuit is configured to provide the second output voltage signal at the output terminal in response to the enable signal received at the input terminal, and following a first time period provide the first output voltage at the output terminal.

Abstract: Provided are organometallic compounds comprising a ligand comprising at least two moieties A and B which are linked by a linking group L2, wherein the ligand is coordinated to a central metal atom M. Also provided are formulations comprising these organometallic compounds. Further provided are organic light emitting devices (OLEDs) and related consumer products that utilize these organometallic compounds.

Abstract: A compound comprising a first ligand LA of Formula I, is provided. In Formula I, each of moieties A, B, C, and D are a monocyclic ring or a polycyclic fused ring system; Z is N, P, B, CR, SiR, or GeR; each of Z1 to Z10 is independently C or N; each of K1 and K2 is a direct bond or a linker; each R, RA, RB, RC, RD, R?, and R? is hydrogen or a General Substituent defined herein; and any two substituents may be joined or fused to form a ring. Formulations, OLEDs, and consumer products containing the same are also provided.

Abstract: A memory circuit includes a column of memory cells configured to receive a set of kth bits of a number H of bits of each input data element of a plurality of input data elements, and each memory cell of the column of memory cells is configured to multiply the kth bit of a corresponding input data element of the plurality of data elements with a first weight data element stored in the memory cell, and to generate a corresponding first product data element. The memory circuit includes an adder tree configured to generate a summation data element based on each of the first product data elements.

Abstract: Systems and methods are provided for a computing-in memory circuit that includes a bit line and a plurality of computing cells connected to the bit line. Each of the plurality of computing cells includes a memory element, having a data output terminal; a logic element, having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the data output terminal of the memory element, the second input terminal receives a select signal; and a capacitor, having a first terminal and a second terminal, where the first terminal is coupled to the output terminal of the logic element, the second terminal is coupled to the bit line. A voltage of the bit line is driven by the plurality of computing cells.

Abstract: A memory cell includes a memory circuit and a computing-in memory (CIM) circuit. The memory cell is configured to store a first value of a first signal of a first storage node. The CIM circuit is coupled to the memory cell, and configured to generate an output signal in response to the first signal and a second signal. The output signal corresponding to a CIM product operation of the first signal and the second signal. The CIM circuit includes an output node configured to output the output signal, a first transistor coupled to the output node and the memory cell, and being configured to receive at least the second signal, and an initialization circuit coupled to the first transistor by the output node, and being configured to initialize the CIM circuit in response to a third signal.

Abstract: Provided are organometallic compounds comprising two moieties A and B which are each independently a monocyclic ring or a polycyclic fused ring structure, wherein the monocyclic ring or each ring of the polycyclic fused ring structure is independently a 5-membered to 10-membered carbocyclic or heterocyclic ring which are linked by a direct bond and which are further bridged by a linker comprising two groups which are each independently selected from the group consisting of O, S, Se, NR, BR, BRR?, PR, CR, C?O, C?NR, C?CRR?, C?S, CRR?, SO, SO2, P(O)R, SiRR?, and GeRR?. Also provided are formulations comprising these organometallic compounds. Further provided are organic light emitting devices (OLEDs) and related consumer products that utilize these organometallic compounds.

Abstract: A memory device includes a plurality of circuit layers, a plurality of first conductive through via structures and a plurality of bitlines. The circuit layers are disposed one above another, and each circuit layer includes one or more memory cell arrays. The first conductive through via structures penetrates though the circuit layers. Each of the bitlines includes a plurality of bitline segments disposed on the circuit layers respectively. The bitline segments are electrically connected through one of the first conductive through via structures. Each bitline segment is coupled to a plurality of memory cells of a memory cell array of a circuit layer where the bitline segment is disposed.

Abstract: A memory device includes a plurality of magnetoresistive random-access memory (MRAM) cells including a first one-time programmable (OTP) MRAM cell. A first OTP select transistor is connected to the first OTP MRAM cell. The first OTP select transistor configured to selectively apply a breakdown current to the first OTP MRAM cell to write the first OTP MRAM cell to a breakdown state.

Abstract: A circuit includes a first transistor and a second transistor cross-coupled with each other such that a source of the first transistor and a source of the second transistor are connected to a power supply, a gate of the first transistor is connected to a drain of the second transistor at a first node, a gate of the second transistor is connected to a drain of the first transistor at a second node. The circuit can provide a first level of a word line voltage to the memory cell by directly coupling the power supply configured at a first level to the memory cell through the second transistor and a third transistor, and provide a second level of the word line voltage by directly coupling the power supply configured at a second level to the memory cell through the second transistor and the third transistor.

Abstract: A compound comprising a first ligand LA comprising a structure of Formula I, is provided. In Formula I, each of moiety A and moiety B is a monocyclic ring or a polycyclic fused ring system; each of X1 to X4 and Z1 to Z4 is C or N; at least one of X1 to X4 is N; each of K1 and K2 is a direct bond or a linker; Y is a linker; each R, R?, R?, R?, RA, RB, and RC is hydrogen or a substituent; LA is coordinated to a metal M; and at least one of five conditions related to X1 to X4 and/or RC is met. Formulations, OLEDs, and consumer products containing the compound are also provided.

Abstract: A heteroleptic compound of formula Ir(LA)m(LB)n(LC)p is provided wherein LA has a structure of Formula IA, or Formula IB, LB has a structure of Formula II, and LC is a bidentate ligand; and wherein m is 1 or 2; n is 1 or 2; and p is 0 or 1; and m+n+p=3 In Formulae I and II, moieties A and D are heterocyclic ring or a polycyclic ring system; each of X1 to X12 is C or N; Ring B is connected to moiety A by a C; at least one of X9 to X12 is N; Y is a linking group that forms a 5-membered ring; each R, R?, R?, RA, RB, RC, RD, and RE is hydrogen or a General Substituent as defined herein; LA forms a 5-membered chelate ring with Ir. Formulations, OLEDs, and consumer products containing the compound are also provided.

Abstract: A micro light emitting device display apparatus including a substrate, a plurality of micro light emitting devices, an isolation layer, and at least one first air gap is provided. The substrate has a plurality of connection pads. The micro light emitting devices are discretely disposed on the substrate. The isolation layer is disposed between the substrate and each of the micro light emitting devices. The at least one first air gap is disposed between the substrate and a surface of the isolation layer facing the substrate.