Abstract: A compound semiconductor material for forming an active layer of a thin film transistor device is disclosed, which has a group II-VI compound doped with a dopant ranging from 0.1 to 30 mol %, wherein the dopant is selected from a group consisting of alkaline-earth metals, group IIIA elements, group IVA elements, group VA elements, group VIA elements, and transitional metals. The method for forming an active layer of a thin film transistor device by using the compound semiconductor material of the present invention is disclosed therewith.

Abstract: A vertical nanotube transistor and a process for fabricating the same. First, a source layer and a catalyst layer are successively formed on a substrate. A dielectric layer is formed on the catalyst layer and the substrate. Next, the dielectric layer is selectively removed to form a first dielectric mesa, a gate dielectric layer spaced apart from the first dielectric mesa by a first opening, and a second dielectric mesa spaced apart from the gate dielectric layer by a second opening. Next, a nanotube layer is formed in the first opening. Finally, a drain layer is formed on the nanotube layer and the first dielectric mesa, and a gate layer is formed in the second opening. The formation position of the nanotubes can be precisely controlled.

Abstract: The invention relates to a method for carbon nanotube emitter surface treatment, which is used to increase the number of carbon nanotube exposed on the triode structure device. For advancing the current density and magnitude of CNT emitter, the invention uses a method of casting surface treatment on the CNT emitter including the steps of coating an adhesive material on the surface of device; heating the adhesive material for adhibitting the surface; and lifting the adhesive material off.

Abstract: A field emission display (FED) having a grid plate with spacer structure and fabrication method thereof. A first plate having first electrodes and electron emitters on a first surface is provided. A second plate having second electrodes and phosphor regions on a second surface is also provided, wherein the second surface is opposite the first surface. A grid plate with spacer structure and passages having grid electrodes is positioned between the two plates to maintain a predetermined interval. When a specific voltage is applied between the first electrode and the second electrode, electrons extracted from the electron emitters are accelerated by the grid electrodes through the passages to impact the phosphor regions.

Abstract: A method for increasing the capacity of an integrated circuit device. The method includes the steps of defining a catalyst area on a substrate, forming a nanotube, nanowire, or nanobelt on the catalyst area, forming a first dielectric layer on the nanotube, nanowire, or nanobelt and the substrate, and forming an electrode layer on the first dielectric layer. According to above method, the capacity is substantially increased without extending the original bottom area of the capacitor electrode by using the surface area of the nanotube, nanowire, or nanobelt as the area of the capacitor electrode.

Abstract: A triode structure of a field emission display and fabrication method thereof. A plurality of cathode layers arranged in a matrix is formed overlying a dielectric layer. A plurality of emitting layers arranged in a matrix is formed overlying the cathode layers, respectively. A plurality of lengthwise-extending gate lines is formed on the dielectric layer, in which each of the gate layers is disposed between two adjacent columns of the cathode layers.

Abstract: An improved FED driving method, which uses a voltage control different from the prior FED, to turn an electron beam on/off and increase the resolution. The improved FED driving method is characterized in increasing a positive voltage applied to the FED's anode, grounding the FED's emitter and applying a negative voltage to the FED's gate. When driving the FED, the anode can pull electron beam out of the cathode with high accelerate voltage and the applied negative voltage on the gate can turn the electron beam on/off. As such, this allows a higher resolution because the electron beam is not influenced by the gate's lateral attraction and high lighting efficiency with high anode accelerate voltage.

Abstract: A nanotube field emission display. The nanotube field emission display includes a nanotube field emission cell, an active device, and a capacitor. The nanotube field emission cell includes a cathode, a gate, and an anode, wherein the cathode has nanotubes for field emission where the gate is used. The active device includes a first electrode, a second electrode, and a control electrode, wherein the second electrode is coupled to the gate of the nanotube field emission cell.

Abstract: The present invention provides a method for manufacturing a carbon nanotube field emission display. The method comprises the steps of providing a substrate, screen printing a first conducting layer on the substrate, sintering the first conducting layer, screen printing an isolation layer on the first conducting layer and a second conducting layer on the isolation layer, etching the second conducting layer and the isolation layer, whereby a cavity exposing the first conducting layer is formed, sintering the second conducting layer and the isolation layer, and forming a carbon nanotube layer on the first conducting layer in the cavity.

Abstract: A vertical nanotube transistor and a process for fabricating the same. First, a source layer and a catalyst layer are successively formed on a substrate. A dielectric layer is formed on the catalyst layer and the substrate. Next, the dielectric layer is selectively removed to form a first dielectric mesa, a gate dielectric layer spaced apart from the first dielectric mesa by a first opening, and a second dielectric mesa spaced apart from the gate dielectric layer by a second opening. Next, a nanotube layer is formed in the first opening. Finally, a drain layer is formed on the nanotube layer and the first dielectric mesa, and a gate layer is formed in the second opening. The formation position of the nanotubes can be precisely controlled.

Abstract: An active matrix current source controlled gray level tunable FED. The inventive FED uses active devices to convert a voltage-controlled signal into an output current and a capacitor to record and hold the voltage-controlled signal, thereby producing a low control voltage and active current source driving FED. As such, adjustment and maintenance of the gray level brightness of the FED is achieved because the brightness fixed by the active devices and the capacitor can obtain a high transient brightness when the FED operates in a lower voltage and brightness, thereby producing a high average brightness and avoiding an arc from high-voltage operation or poor vacuum.

Abstract: An improved FED driving method, which uses a voltage control different from the prior FED, to turn an electron beam on/off and increase the resolution. The improved FED driving method is characterized in increasing a positive voltage applied to the FED's anode, grounding the FED's emitter and applying a negative voltage to the FED's gate. When driving the FED, the anode can pull electron beam out of the cathode with high accelerate voltage and the applied negative voltage on the gate can turn the electron beam on/off. As such, this allows a higher resolution because the electron beam is not influenced by the gate's lateral attraction and high lighting efficiency with high anode accelerate voltage.

Abstract: A method for increasing the capacity of an integrated circuit device. The method includes the steps of defining a catalyst area on a substrate, forming a nanotube, nanowire, or nanobelt on the catalyst area, forming a first dielectric layer on the nanotube, nanowire, or nanobelt and the substrate, and forming an electrode layer on the first dielectric layer. According to above method, the capacity is substantially increased without extending the original bottom area of the capacitor electrode by using the surface area of the nanotube, nanowire, or nanobelt as the area of the capacitor electrode.

Abstract: The present invention provides a method for manufacturing a carbon nanotube field emission display. The method comprises the steps of providing a substrate, screen printing a first conducting layer on the substrate, sintering the first conducting layer, screen printing an isolation layer on the first conducting layer and a second conducting layer on the isolation layer, etching the second conducting layer and the isolation layer, whereby a cavity exposing the first conducting layer is formed, sintering the second conducting layer and the isolation layer, and forming a carbon nanotube layer on the first conducting layer in the cavity.