Patents by Inventor Chun-Ting Kuo
Chun-Ting Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240194646Abstract: A semiconductor package includes a substrate, first bumps, a first chip, metal pillars, second bumps and a second chip. The substrate includes first and second conductive pads which are located on a top surface of the substrate. Both ends of the first bumps are connected to the first conductive pads and the first chip, respectively. Both ends of the metal pillars are connected to the second conductive pads and one end of the second bumps, respectively. A cross-sectional area of each of the metal pillars is larger than that of each of the second bumps. The second chip is connected to the other end of the second bumps and located above the first chip.Type: ApplicationFiled: September 29, 2023Publication date: June 13, 2024Inventors: Chin-Tang Hsieh, Lung-Hua Ho, Chih-Ming Kuo, Chen-Yu Wang, Chih-Hao Chiang, Pai-Sheng Cheng, Kung-An Lin, Chun-Ting Kuo, Yu-Hui Hu, Wen-Cheng Hsu
-
Publication number: 20230378044Abstract: A flip-chip bonding structure includes a substrate and a chip. A lead of the substrate includes a body, a hollow opening, a bonding island and at least one connecting bridge. The hollow opening is in the body and surrounded by the body. The bonding island is located in the hollow opening such that there is a hollow space in the hollow opening and located between the body and the bonding island. The connecting bridge is located in the hollow space to connect the body and the bonding island. A bump of the chip is bonded to the bonding island by a solder. The solder is restricted on the bonding island and separated from the body by the hollow space so as to avoid the solder from overflowing to the body and avoid the chip from shifting.Type: ApplicationFiled: February 14, 2023Publication date: November 23, 2023Inventors: Chin-Tang Hsieh, Lung-Hua Ho, Chih-Ming Kuo, Chun-Ting Kuo, Yu-Hui Hu, Chih-Hao Chiang, Chen-Yu Wang, Kung-An Lin, Pai-Sheng Cheng
-
Publication number: 20230251258Abstract: Methods and systems for improved labeling and/or de-labeling a molecule or cell in the context of scientific experimentation, industrial applications, and clinical investigation, including the means to repeat the process of labeling and de-labeling in an efficient manner.Type: ApplicationFiled: April 20, 2023Publication date: August 10, 2023Applicant: University of WashingtonInventors: Daniel T. Chiu, Chun-Ting Kuo, Li Wu
-
Patent number: 11668713Abstract: Methods and systems for improved labeling and/or de-labeling a molecule or cell in the context of scientific experimentation, industrial applications, and clinical investigation, including the means to repeat the process of labeling and de-labeling in an efficient manner.Type: GrantFiled: November 16, 2017Date of Patent: June 6, 2023Assignee: UNIVERSITY OF WASHINGTONInventors: Daniel T. Chiu, Chun-Ting Kuo, Li Wu
-
Publication number: 20230170301Abstract: A semiconductor structure includes a substrate, a dielectric layer, a connection layer and wire layers. The dielectric layer is disposed on a surface of the substrate and includes vias showing the surface. The connection layer is disposed on the dielectric layer, a first connection portion of the connection layer is located in the vias and connected to the surface, a second connection portion of the connection layer is connected to the dielectric layer. A first ground portion of the ground metal layer is connected to the first connection portion of the connection layer, and a second ground portion of the ground metal layer is connected to the second connection portion of the connection layer. Each of the wire layers is disposed on the second connection portion of the connection layer, and the second ground portion is located between the adjacent wire layers.Type: ApplicationFiled: October 25, 2022Publication date: June 1, 2023Inventors: Chin-Tang Hsieh, You-Ming Hsu, Chun-Ting Kuo, Lung-Hua Ho, Chih-Ming Kuo
-
Patent number: 11309298Abstract: A light-emitting diode device with a driving mechanism is provided. A first light-emitting diode chip, a second light-emitting diode chip and a third light-emitting diode chip are arranged on a driver circuit chip, and respectively configured to emit red light, green light and blue light. A first contact of the light-emitting diode chip, a first contact of the second light-emitting diode chip and a first contact of the third light-emitting diode chip are respectively in direct electrical contact with a first output contact, a second output contact and a third output contact of the driver circuit chip in a flip-chip manner. A second contact of the first light-emitting diode chip, a second contact of the second light-emitting diode chip and a second contact of the third light-emitting diode chip are in direct electrical contact with a common contact of the driver circuit chip.Type: GrantFiled: August 24, 2020Date of Patent: April 19, 2022Assignee: MY-SEMI INC.Inventors: Cheng-Han Hsieh, Kuo-Lun Huang, Chun-Ting Kuo
-
Publication number: 20210066270Abstract: A light-emitting diode device with a driving mechanism is provided. A first light-emitting diode chip, a second light-emitting diode chip and a third light-emitting diode chip are arranged on a driver circuit chip, and respectively configured to emit red light, green light and blue light. A first contact of the light-emitting diode chip, a first contact of the second light-emitting diode chip and a first contact of the third light-emitting diode chip are respectively in direct electrical contact with a first output contact, a second output contact and a third output contact of the driver circuit chip in a flip-chip manner. A second contact of the first light-emitting diode chip, a second contact of the second light-emitting diode chip and a second contact of the third light-emitting diode chip are in direct electrical contact with a common contact of the driver circuit chip.Type: ApplicationFiled: August 24, 2020Publication date: March 4, 2021Inventors: CHENG-HAN HSIEH, KUO-LUN HUANG, CHUN-TING KUO
-
Patent number: 10656073Abstract: Methods of optically marking and sorting adherent cells are provided. The methods include providing a plurality of adherent cells attached to a substrate, each adherent cell of the plurality of adherent cells having an optical marker. The methods also include selectively applying light energy to a subset of the plurality of adherent cells, and detaching the plurality of adherent cells from the substrate. These methods also provide the sorting of the plurality of adherent cells.Type: GrantFiled: August 7, 2019Date of Patent: May 19, 2020Assignee: University of WashingtonInventors: Daniel T. Chiu, Chun-Ting Kuo, Jiangbo Yu
-
Publication number: 20200057060Abstract: Methods and systems for improved labeling and/or de-labeling a molecule or cell in the context of scientific experimentation, industrial applications, and clinical investigation, including the means to repeat the process of labeling and de-labeling in an efficient manner.Type: ApplicationFiled: November 16, 2017Publication date: February 20, 2020Applicant: University of WashingtonInventors: Daniel T. Chiu, Chun-Ting Kuo, Li Wu
-
Publication number: 20190360917Abstract: Methods of optically marking and sorting adherent cells are provided. The methods include providing a plurality of adherent cells attached to a substrate, each adherent cell of the plurality of adherent cells having an optical marker. The methods also include selectively applying light energy to a subset of the plurality of adherent cells, and detaching the plurality of adherent cells from the substrate. These methods also provide the sorting of the plurality of adherent cells.Type: ApplicationFiled: August 7, 2019Publication date: November 28, 2019Applicant: University of WashingtonInventors: Daniel T. Chiu, Chun-Ting Kuo, Jiangbo Yu
-
Patent number: 10429294Abstract: Methods of optically marking and sorting adherent cells are provided. The methods include providing a plurality of adherent cells attached to a substrate, each adherent cell of the plurality of adherent cells having an optical marker. The methods also include selectively applying light energy to a subset of the plurality of adherent cells, and detaching the plurality of adherent cells from the substrate. These methods also provide the sorting of the plurality of adherent cells.Type: GrantFiled: April 1, 2016Date of Patent: October 1, 2019Assignee: University of WashingtonInventors: Daniel T. Chiu, Chun-Ting Kuo, Jiangbo Yu
-
Patent number: 10140927Abstract: A driving circuit for driving a light emitting unit includes a gray scale generation circuit and a driving unit, and a gray scale generation circuit, includes a shift register unit and a data storage unit. The shift register unit receives a luminance-related data, and the shift register unit is a k-bit shift register unit. The data storage unit has parallel input ends and a serial output end. The data storage unit receives the luminance-related data via its parallel input ends and serially outputs bits of the luminance-related data to generate a serial signal. The data storage unit determines time points to output different bits of the serial signal to generate a gray-scale control signal according to a serial-out control signal. The driving unit is coupled to the gray scale generation circuit to adjust a light-emitting time of the light emitting unit according to the gray-scale control signal.Type: GrantFiled: August 22, 2017Date of Patent: November 27, 2018Assignee: MY-SEMI INC.Inventors: Chun-Ting Kuo, Cheng-Han Hsieh
-
Patent number: 10140908Abstract: A LED driving circuit comprises a high bit driving circuit, a low bit driving circuit and a driving output terminal. The high bit driving circuit coupled to a high bit signal of the grayscale signal determines a first current continuously driven during a grayscale period according to the value of the high bit signal. The first current is invariant during the grayscale period. The low bit driving circuit coupled to a low bit signal of the grayscale signal determines a second current driven in at least two time intervals during the grayscale period according to the value of the low bit signal. The driving output terminal coupled to the high bit driving circuit and the low bit driving circuit outputs the driving current added by the first current and the second current. Accordingly, the LED display can be improved with higher refresh rate and/or better uniformity in low grayscale.Type: GrantFiled: September 9, 2016Date of Patent: November 27, 2018Assignee: MY-SEMI INC.Inventors: Chun-Ting Kuo, Cheng-Han Hsieh
-
Publication number: 20180268761Abstract: A driving circuit for driving a light emitting unit includes a gray scale generation circuit and a driving unit, and a gray scale generation circuit, includes a shift register unit and a data storage unit. The shift register unit receives a luminance-related data, and the shift register unit is a k-bit shift register unit. The data storage unit has parallel input ends and a serial output end. The data storage unit receives the luminance-related data via its parallel input ends and serially outputs bits of the luminance-related data to generate a serial signal. The data storage unit determines time points to output different bits of the serial signal to generate a gray-scale control signal according to a serial-out control signal. The driving unit is coupled to the gray scale generation circuit to adjust a light-emitting time of the light emitting unit according to the gray-scale control signal.Type: ApplicationFiled: August 22, 2017Publication date: September 20, 2018Inventors: CHUN-TING KUO, CHENG-HAN HSIEH
-
Publication number: 20180080863Abstract: The present disclosure provides a method of optically marking and sorting adherent cells. In some aspects, the method comprises: providing a plurality of adherent cells attached to a substrate, each adherent cell of the plurality of adherent cells comprising an optical marker; selectively applying light energy to a subset of the plurality of adherent cells; detaching the plurality of adherent cells from the substrate; and sorting the plurality of adherent cells.Type: ApplicationFiled: April 1, 2016Publication date: March 22, 2018Inventors: Daniel T. Chiu, Chun-Ting Kuo, Jiangbo Yu
-
Publication number: 20170270845Abstract: A LED driving circuit comprises a high bit driving circuit, a low bit driving circuit and a driving output terminal. The high bit driving circuit coupled to a high bit signal of the grayscale signal determines a first current continuously driven during a grayscale period according to the value of the high bit signal. The first current is invariant during the grayscale period. The low bit driving circuit coupled to a low bit signal of the grayscale signal determines a second current driven in at least two time intervals during the grayscale period according to the value of the low bit signal. The driving output terminal coupled to the high bit driving circuit and the low bit driving circuit outputs the driving current added by the first current and the second current. Accordingly, the LED display can be improved with higher refresh rate and/or better uniformity in low grayscale.Type: ApplicationFiled: September 9, 2016Publication date: September 21, 2017Inventors: CHUN-TING KUO, CHENG-HAN HSIEH
-
Patent number: 9676114Abstract: A wafer edge trim blade includes a round blade body and at least one slot formed inward from an outside edge of the round blade body. The at least one slot is configured to remove debris generated during wafer edge trimming using the wafer edge trim blade.Type: GrantFiled: February 29, 2012Date of Patent: June 13, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Ting Kuo, Kei-Wei Chen, Ying-Lang Wang, Kuo-Hsiu Wei
-
Patent number: 9566683Abstract: A method of grinding a wafer includes positioning a wafer beneath a grinding wheel and aligning the wafer and the grinding wheel. The method further includes contacting a grinding surface of an outer base of the grinding wheel with the wafer while rotating at least one of the wafer and the grinding wheel, contacting a grinding surface of an inner frame of the grinding wheel with the wafer while rotating at least one of the wafer and the grinding wheel, without changing the alignment between the wafer and the grinding wheel, and tilting one of the wafer and the grinding wheel relative to the other during at least one of the first and the second contacting steps. The method also includes removing the wafer from the position beneath the grinding wheel.Type: GrantFiled: August 31, 2015Date of Patent: February 14, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hsiu Wei, Kei-Wei Chen, Ying-Lang Wang, Chun-Ting Kuo
-
Patent number: 9570311Abstract: Methods of thinning a plurality of semiconductor wafers and apparatuses for carrying out the same are disclosed. A grinding module within a set of grinding modules receives and grinds a semiconductor wafer. A polishing module receives the semiconductor wafer from the grinding module and polishes the wafer. The polishing module is configured to polish the semiconductor wafer in less time than the grinding module is configured to grind the corresponding wafer.Type: GrantFiled: February 10, 2012Date of Patent: February 14, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Ting Kuo, Kei-Wei Chen, Ying-Lang Wang, Kuo-Hsiu Wei
-
Publication number: 20150367475Abstract: A grinding wheel comprises an outer base with a first attached grain pad; and an inner frame with a second attached grain pad; and a spindle axis shared by the outer base and the inner frame, wherein at least one of the outer base and the inner frame can move independently along the shared spindle axis; and wherein the outer base, the inner frame, and the shared spindle axis all have a same center. A grinding system comprises an above said grinding wheel, and a wheel head attached to the shared spindle axis, capable of moving vertically, in addition to a motor driving the grinding wheel to spin; and a chuck table for fixing a wafer on top of the chuck table; wherein the grinding wheel overlaps a portion of the chuck table, each capable of spinning to the opposite direction of another.Type: ApplicationFiled: August 31, 2015Publication date: December 24, 2015Inventors: Kuo-Hsiu Wei, Kei-Wei Chen, Ying-Lang Wang, Chun-Ting Kuo