Patents by Inventor Chun-Wei Chen

Chun-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087902
    Abstract: The present disclosure is directed to methods and devices for devices including multiple die. A wafer is received having a plurality of die and a plurality of scribe lines. A dicing process is performed on the wafer. The dicing process includes identifying a first scribe line of the plurality of scribe lines, the first scribe line interposing a first die and a second die of the plurality of die; and performing a partial cut on the first scribe line. In embodiments, other scribe lines of the wafer are, during the dicing process, fully cut. After the dicing, the first die and the second die are mounted on a substrate such as an interposer. The first die and the second die are connected by a portion of the first scribe line, e.g., remaining from the partial cut, during the mounting.
    Type: Application
    Filed: January 19, 2023
    Publication date: March 14, 2024
    Inventors: Chieh-Lung LAI, Meng-Liang LIN, Chun-Yueh YANG, Hsien-Wei CHEN
  • Publication number: 20240087951
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
  • Patent number: 11929398
    Abstract: Present disclosure provides a FinFET structure, including a substrate, a fin protruding from the substrate, including a first portion and a second portion below the first portion, wherein the first portion includes a first dopant concentration of a dopant, and the second portion includes a second dopant concentration of the dopant, the second dopant concentration is greater than the first dopant concentration, a gate over the fin, wherein the second portion of the fin is below a bottom surface of the gate, and an insulating layer over the substrate and proximal to the second portion of the fin, wherein at least a first portion of the insulating layer includes a third dopant concentration of the dopant, the third dopant concentration is greater than the first dopant concentration.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Lai-Wan Chong, Chien-Wei Lee, Kei-Wei Chen
  • Publication number: 20240079356
    Abstract: An integrated circuit package includes an interposer, the interposer including: a first redistribution layer, a second redistribution layer over the first redistribution layer in a central region of the interposer, a dielectric layer over the first redistribution layer in a periphery of the interposer, the dielectric layer surrounding the second redistribution layer in a top-down view, a third redistribution layer over the second redistribution layer and the dielectric layer, and a first direct via extending through the dielectric layer. A conductive feature of the third redistribution layer is coupled to a conductive feature of the first redistribution layer through the first direct via.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 7, 2024
    Inventors: Hsien-Wei Chen, Chieh-Lung Lai, Meng-Liang Lin, Chun-Yueh Yang, Shin-Puu Jeng
  • Publication number: 20240076417
    Abstract: The present disclosure provides a method for manufacturing an auto-crosslinked hyaluronic acid gel, comprising conducting auto-crosslinking reaction of a colloid containing hyaluronic acid continuously at low temperature in an acidic environment, and treating the reaction product with steam at high temperature to obtain the auto-crosslinked hyaluronic acid gel with high viscosity.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 7, 2024
    Applicant: SCIVISION BIOTECH INC.
    Inventors: TAI-SHIEN HAN, TSUNG-WEI PAN, TOR-CHERN CHEN, CHUN-CHANG CHEN, PO-HSUAN LIN, LI-SU CHEN
  • Patent number: 11923396
    Abstract: An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wei Hsu, Tsai-Hao Hung, Chung-Yu Lin, Ying-Hsun Chen
  • Patent number: 11923199
    Abstract: Aspects of the disclosure provide a method. The method includes forming a structure over a substrate, and forming a spacer layer on the structure, wherein the spacer layer has a recess. The method includes forming a mask layer over the spacer layer and in the recess, the mask layer including a first layer, a second layer and a third layer. The method includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer to form an opening to expose the recess of the spacer layer, wherein the opening in the second layer has a first width; and. The method includes removing the second layer using a wet etchant, wherein the opening in the third layer has a second width, and the second with is greater than the first width.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai-Chia Chen, Wan Hsuan Hsu, Chia-Wei Wu, Neng-Jye Yang, Chun-Li Chou
  • Publication number: 20240069618
    Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.
    Type: Application
    Filed: April 27, 2023
    Publication date: February 29, 2024
    Inventors: Wen Che CHUNG, Hui Chuan LO, Hao-Hsuan LIN, Chun TSAO, Jun-Fu CHEN, Ming-Hung YAO, Jia-Wei ZHANG, Kuan-Lun CHEN, Ting-Chao LIN, Cheng-Yen LIN, Chunyen LAI
  • Publication number: 20240070809
    Abstract: A method can include receiving a low-resolution (LR) image, extracting a first feature embedding from the LR image, performing a first upsampling to the LR image by a first upsampling factor to generate a upsampled image, receiving a LR coordinate of a pixel within the LR image and a first cell size of the LR coordinate, generating a first residual image based on the first feature embedding, the LR coordinate, and the first cell size of the LR coordinate using a local implicit image function, and generating a first high-resolution (HR) image by combining the first residual image and the upsampled image via element-wise addition.
    Type: Application
    Filed: April 12, 2023
    Publication date: February 29, 2024
    Applicants: MEDIATEK INC., National Tsing Hua University
    Inventors: Yu-Syuan XU, Hao-Wei CHEN, Chun-Yi LEE
  • Publication number: 20240069069
    Abstract: A probe pin cleaning pad including a foam layer, a cleaning layer, and a polishing layer is provided. The cleaning layer is disposed between the foam layer and the polishing layer. A cleaning method for a probe pin is also provided.
    Type: Application
    Filed: November 10, 2023
    Publication date: February 29, 2024
    Applicant: Alliance Material Co., Ltd.
    Inventors: Chun-Fa Chen, Yu-Hsuen Lee, Ching-Wen Hsu, Chao-Hsuan Yang, Ting-Wei Lin
  • Publication number: 20240016838
    Abstract: Provided herein, inter alia, are compositions including engineered NK cells and methods for preparing the same. The engineered NK cells provided herein include integrated nucleic acid sequences encoding Cas9 proteins (e.g. dCas9). The engineered NK cells are contemplated to be effective for treating and/or preventing cancer, particularly leukemia.
    Type: Application
    Filed: October 26, 2021
    Publication date: January 18, 2024
    Inventors: Srividya Swaminathan, Anil Kumar, Sung June Lee, Adeleh Taghi Khani, Chun-Wei Chen
  • Publication number: 20240014147
    Abstract: A semiconductor package may include a package substrate including a dummy via on a first side of the package substrate, an interposer module on a second side of the package substrate opposite the first side of the package substrate, and a stiffener ring on the second side of the package substrate and including an edge that is substantially aligned with the dummy via.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 11, 2024
    Inventors: Chin-Hua Wang, Po-Chen Lai, Chun-Wei Chen, Shin-Puu Jeng
  • Publication number: 20230402818
    Abstract: A semiconductor package includes a printed circuit board (PCB), a semiconductor device, a first signal bonding wire, and a first ground bonding wire. The PCB includes a first PCB ground pad and a first PCB signal trace. The semiconductor device includes a first device ground pad and a first device signal pad. The first signal bonding wire is coupled between the first device signal pad and the first PCB signal trace. The first ground bonding wire is coupled between the first device ground pad and the first PCB ground pad, wherein the first ground bonding wire crosses over the first signal bonding wire.
    Type: Application
    Filed: November 28, 2022
    Publication date: December 14, 2023
    Applicant: Airoha Technology Corp.
    Inventors: Chun-Wei Chen, Ming-Yin Ko, Yan-Bin Luo
  • Publication number: 20230402416
    Abstract: A semiconductor die includes a processing circuit, a first bond pad, and a second bond pad. The first bond pad is electrically connected to a first node of the processing circuit and a first bond wire. The second bond pad is electrically connected to a second node of the processing circuit and a second bond wire. The first bond wire and the second bond wire are magnetically coupled to form a first bond wire T-coil circuit with equivalent negative inductance.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 14, 2023
    Applicant: Airoha Technology (HK) Limited
    Inventors: Huan-Sheng Chen, Ming-Yin Ko, Chun-Wei Chen
  • Patent number: 11806168
    Abstract: A physiological detection system including a light source module, a photo sensor and a processor is provided. The light source module is configured to provide light to illuminate a skin region. The photo sensor is configured to detect emergent light passing the skin region with at least one signal source parameter and output an image signal. The processor is configured to calculate a confident level according to the image signal to accordingly adjust the at least one signal source parameter.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: November 7, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Sheau-Foong Chong, Chun-Wei Chen
  • Publication number: 20230351633
    Abstract: There is provided a vehicle system including a sensing unit, a processing unit, a control unit and a display unit. The sensing unit is configured to capture an image frame containing an eyeball image from a predetermined distance. The processing unit is configured to calculate a pupil position of the eyeball image in the image frame and generate a drive signal corresponding to the pupil position. The control unit is configured to trigger a vehicle device associated with the pupil position according to the drive signal. The display unit is configured to show information of the vehicle device.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 2, 2023
    Inventors: CHUN-WEI CHEN, SHIH-WEI KUO
  • Patent number: 11795953
    Abstract: An air mover is provided. The air mover includes a housing, a spacer, a co-axial motor, a first fan and a second fan. The housing includes a first housing member and a second housing member. A first inlet, a second inlet and an outlet are formed on the housing. The first inlet is formed on the first housing member and the second inlet is formed on the second housing member. The spacer is disposed between the first housing member and the second housing member. The co-axial motor includes a shaft, wherein the co-axial motor is disposed on the spacer. The shaft includes a first free end and a second free end. The first free end extends in a first direction, and the second free end extends in a second direction.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: October 24, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Jhih-Jhong Chen, Chun-Wei Chen, Wen-Hsiang Lin
  • Patent number: 11741630
    Abstract: There is provided a vehicle system including a sensing unit, a processing unit, a control unit and a display unit. The sensing unit is configured to capture an image frame containing an eyeball image from a predetermined distance. The processing unit is configured to calculate a pupil position of the eyeball image in the image frame and generate a drive signal corresponding to the pupil position. The control unit is configured to trigger a vehicle device associated with the pupil position according to the drive signal. The display unit is configured to show information of the vehicle device.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: August 29, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Chun-Wei Chen, Shih-Wei Kuo
  • Publication number: 20230238349
    Abstract: A semiconductor package includes a printed circuit board (PCB), a semiconductor device, an interposer, and a conductive adhesive. The PCB has a top surface with at least one ground area formed thereon. The semiconductor device has a bottom surface with at least one first first-type contact formed thereon. The interposer is located between the semiconductor device and the PCB. The bottom surface of the semiconductor device is adhered to a top surface of the interposer by the conductive adhesive. The conductive adhesive overflows from an edge of the top surface of the interposer to have contact with the at least one ground area on the top surface of the PCB.
    Type: Application
    Filed: June 6, 2022
    Publication date: July 27, 2023
    Applicant: Airoha Technology (HK) Limited
    Inventors: Chun-Wei Chen, Yan-Bin Luo, Ming-Yin Ko
  • Patent number: D993199
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: July 25, 2023
    Assignees: EPISTAR CORPORATION, YENRICH TECHNOLOGY CORPORATION
    Inventors: Min-Hsun Hsieh, Jen-Chieh Yu, Chun-Wei Chen, Chun-Hung Liu