Patents by Inventor Chun Wei

Chun Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11795953
    Abstract: An air mover is provided. The air mover includes a housing, a spacer, a co-axial motor, a first fan and a second fan. The housing includes a first housing member and a second housing member. A first inlet, a second inlet and an outlet are formed on the housing. The first inlet is formed on the first housing member and the second inlet is formed on the second housing member. The spacer is disposed between the first housing member and the second housing member. The co-axial motor includes a shaft, wherein the co-axial motor is disposed on the spacer. The shaft includes a first free end and a second free end. The first free end extends in a first direction, and the second free end extends in a second direction.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: October 24, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Jhih-Jhong Chen, Chun-Wei Chen, Wen-Hsiang Lin
  • Patent number: 11799511
    Abstract: A transceiver includes: a radio-frequency (RF) front-end circuit; a dedicated RF front-end circuit; and a switchable matching circuit, integrated in a chip. The RF front-end circuit deals with communications of a first wireless standard, and the dedicated RF front-end circuit deals with communications of a second wireless standard. The switchable matching circuit provides impedance matching between the signal port and the RF front-end circuit when the RF front-end circuit is in operation, and provides impedance matching between the signal port and the dedicated RF front-end circuit when the dedicated RF front-end circuit is in operation, and includes: a first capacitive circuit coupled to the signal port; a first switch circuit coupled between the first capacitive circuit and the dedicated RF front-end circuit; a second capacitive circuit coupled to the dedicated RF front-end circuit; and a second switch circuit coupled to a second terminal of the second capacitive circuit.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: October 24, 2023
    Assignee: MEDIATEK INC.
    Inventors: Wei-Chia Chan, Tse-Yu Chen, Hui-Hsien Liu, Jui-Lin Hsu, Chun-Wei Lin
  • Publication number: 20230334220
    Abstract: An electromigration (EM) sign-off methodology that utilizes a system for analyzing an integrated circuit design layout to identify heat sensitive structures, self-heating effects, heat generating structures, and heat dissipating structures. The EM sign-off methodology includes a memory and a processor configured for calculating adjustments of an evaluation temperature for a heat sensitive structure by calculating the effects of self-heating within the temperature sensitive structure as well as additional heating and/or cooling as a function of thermal coupling to surrounding heat generating structures and/or heat dissipating elements located within a defined thermal coupling volume or range of the heat sensitive structures.
    Type: Application
    Filed: June 26, 2023
    Publication date: October 19, 2023
    Inventors: Hsien Yu TSENG, Amit KUNDU, Chun-Wei CHANG, Szu-Lin LIU, Sheng-Feng LIU
  • Patent number: 11787014
    Abstract: A vice jaw deflecting structure, comprising a vice main body, a lead screw positioning seat, a lead screw, a first flexible jaw set and a second flexible jaw set; the guide slot of the vice main body has a bottom surface, a first side wall surface, and a second side wall surface; the first flexible jaw set and the second flexible jaw set have a slide, a jaw and a limiting component; the slide is configured with a limiting block protruding toward the jaw, the limiting block protrudes toward the lead screw positioning seat and is formed with a -shaped stop block having a curved top view; the jaw bottom surface has a first convex wall surface and a second convex wall surface matching and contacting the first side wall surface and the second side wall surface.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: October 17, 2023
    Inventor: Chun-Wei Chang
  • Patent number: 11791729
    Abstract: The technology described herein is directed to a DC input power supply unit with an auxiliary boost control circuit (or controller) that facilitates continuous supply of power to a standby output load of the power supply unit in a bootloader mode. More specifically, the auxiliary boost circuit (or controller) is configured to assume control of a primary power boost stage from a primary controller in a bootloader mode so that the power supply unit can continue to supply power to the standby output with a protection function regardless of the state of the power supply unit or primary controller.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: October 17, 2023
    Assignee: Astec International Limited
    Inventors: Chih-hao Hsu, Chang-Chieh Yu, Carl Walker, Chun-Wei Chang, Po-Tso Chen
  • Patent number: 11789090
    Abstract: A power detection circuit is provided for detecting current total input power of a resonant circuit. The power detection circuit includes a detection circuit and an estimation circuit. The detection circuit receives a current signal and obtains resonant-slot baseband power according to the current signal to generate the baseband power value. The current signal represents a resonant-slot current generated by the resonant circuit. The estimation circuit receives the baseband power value and estimates the current total input power according to the baseband power value to generate an estimated power value.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: October 17, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Ming-Shi Huang, Zheng-Feng Li, Jhih-Cheng Hu, Yi-Liang Lin, Yu-Min Meng, Chun-Wei Lin, Chun Chang, Thiam-Wee Tan
  • Publication number: 20230326815
    Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.
    Type: Application
    Filed: June 15, 2023
    Publication date: October 12, 2023
    Inventors: Chun-Liang LU, Chun-Wei CHIA, Chun-Hao CHOU, Kuo-Cheng LEE
  • Publication number: 20230327676
    Abstract: Systems and methods reduce a locking time of a type-II all-digital phase-locked loop (ADPLL) circuit by performing steps that comprise receiving a reference signal having a reference frequency and setting a digitally controlled oscillator (DCO) to a target frequency greater than the reference frequency. The DCO generates an output signal that is used to generate a feedback signal. A time-to-digital converter is used to determine an initial phase difference between the reference signal and the feedback signal, and a digital initial phase compensation circuit adjusts the initial phase difference to a substantially zero phase difference to reduce the locking time of the ADPLL circuit such that the ADPLL circuit reaches a steady-state condition in ten or fewer cycles of the reference signal.
    Type: Application
    Filed: February 23, 2023
    Publication date: October 12, 2023
    Applicant: Maxim Integrated Products, Inc.
    Inventors: Cheng-Hsien HUNG, Chun-Wei HSU, ChunCheng CHOU
  • Publication number: 20230324699
    Abstract: A head-mounted display device assembly and an external adjustment module are provided. The head-mounted display device assembly includes a head-mounted display device and the external adjustment module. The head-mounted display device has a first lens and a second lens corresponding to both eyes, and also has a driven mechanism. The first lens and the second lens are respectively coupled to the driven mechanism. The external adjustment module is used for assembling and electrically connecting to the head-mounted display device, and includes a driving element and a transmission element. In a coupling state, the transmission element is coupled to the driving element and the driven mechanism, and the driving element drives the driven mechanism via the transmission element to adjust a distance between the first lens and the second lens. In a separation state, at least one of the driving element and the driven mechanism is separated from the transmission element.
    Type: Application
    Filed: October 11, 2022
    Publication date: October 12, 2023
    Applicant: HTC Corporation
    Inventors: Chun-Wei Chang, Ying-Chieh Huang, Pei-Yu Su, Yen-Te Chiang, Chun-Kai Yang, Wei-Ting Hsiao, Yien-Chun Kuo
  • Patent number: 11784214
    Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor is provided. The MIM capacitor includes a substrate, a first metal layer, a deposition structure, a dielectric layer and a second metal layer. The first metal layer is disposed on the substate and has a planarized surface. The deposition structure is disposed on the first metal layer, and at least a portion of the deposition structure extends into the planarized surface, wherein the first metal layer and the deposition structure have the same material. The dielectric layer is disposed on the deposition structure. The second metal layer is disposed on the dielectric layer.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: October 10, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bo-Wei Huang, Chun-Wei Kang, Ho-Yu Lai, Chih-Sheng Chang
  • Patent number: 11782311
    Abstract: A backlight module includes a housing, a diffuser plate, an optical film, a holder and a light source. The housing has a groove. The groove is arranged along a periphery of the housing. The diffuser plate is disposed in the housing and has an edge located in the groove. The optical film is disposed on the diffuser plate and has a thru-hole. The holder is disposed in the groove of the housing and includes a holding portion and a hanging portion. The holding portion engages the edge of the diffuser plate. The hanging portion is connected to the holding portion and extends through the thru-hole of the optical film. The light source is disposed in the housing.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: October 10, 2023
    Assignee: AmTRAN Technology Co., Ltd.
    Inventors: Chun-Wei Liu, Chen-Han Huang, Chih-Kuei Wang
  • Publication number: 20230317508
    Abstract: The present application discloses a method for fabricating the semiconductor device. The method for fabricating the semiconductor device includes forming a first dielectric layer on a substrate; forming a feature opening to exposing the substrate; performing a pre-cleaning treatment including a pre-cleaning solution to the feature opening; performing a cleaning process to the feature opening; and forming a conductive feature in the feature opening. The pre-cleaning solution includes a chelating agent and a corrosion inhibitor.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 5, 2023
    Inventors: WEI-CHEN PAN, CHUN-WEI WANG
  • Publication number: 20230319790
    Abstract: In an example, a User Equipment (UE) is configured with one or more first Physical Uplink Control Channel (PUCCH) resources on a primary cell (PCell) and configured with one or more second PUCCH resources on a secondary cell (SCell). The PCell and the SCell are associated with a PUCCH group. Before a first slot, the UE changes an active uplink (UL) bandwidth part (BWP) of a cell. The cell associated with the changing the active UL BWP is the PCell or the SCell. A first occasion of the PCell is before the changing the active UL BWP. A second occasion of the SCell is before the changing the active UL BWP. The first occasion and the second occasion are associated with the first slot. The UE determines whether or not to include Hybrid Automatic Repeat request (HARQ) information, associated with the second occasion, in a HARQ codebook based on whether or not the SCell, associated with transmitting the HARQ codebook, is the same as the cell associated with the changing the active UL BWP.
    Type: Application
    Filed: December 19, 2022
    Publication date: October 5, 2023
    Inventors: Chun-Wei Huang, Ming-Che Li
  • Patent number: 11778599
    Abstract: A method and apparatus such as a device to perform sidelink communication including receiving a sidelink grant from a network node, wherein the sidelink grant schedules or assigns multiple sidelink resources, generating a data packet comprising or multiplexing sidelink data from Sidelink (SL) logical channel(s) with SL Hybrid Automatic Request (HARQ) feedback enabled, performing two sidelink transmissions for the data packet on two adjacent, neighbor, or consecutive sidelink resources among the multiple sidelink resources if a time gap of the two adjacent, neighbor, or consecutive sidelink resources is larger than or equal to a minimum time gap, and the device being allowed to drop, skip, or cancel a sidelink transmission on one sidelink resource of the two adjacent, neighbor, or consecutive sidelink resources among the multiple sidelink resources if the time gap of the two adjacent, neighbor, or consecutive sidelink resources is less than a minimum time gap.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 3, 2023
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Chun-Wei Huang, Li-Chih Tseng
  • Patent number: 11774691
    Abstract: A light-emitting device and a light emitting module are provided. The light emitting module includes a housing, at least one light guide element, and at least one light emitting element. The housing includes at least one passage passing through its a first surface and a second surface, and a coupling portion formed on an inner surface adjacent to the second surface. The light guide element arranged in the at least one passage has a light emergent surface exposed at one end of the at least one passage and a light incident surface exposed at the other end of the at least one passage. The light emitting element is coupled to the housing by the coupling portion. The light emitting element includes a light emitting surface facing to the light incident surface of the light guide element and a soldering portion exposed from the housing.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: October 3, 2023
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Cheng-Han Wang, Szu-Tsung Kao, Chih-Li Yu, Cheng-Hong Su, Chun-Wei Huang, Chen-Hsiu Lin
  • Patent number: 11773353
    Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: October 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pinlei Edmund Chu, Chun-Wei Hsu, Ling-Fu Nieh, Chi-Jen Liu, Liang-Guang Chen, Yi-Sheng Lin
  • Patent number: 11778518
    Abstract: A method and apparatus are disclosed from the perspective of a first device for performing sidelink transmission in a sidelink resource pool. In one embodiment, the first device has a configuration of the sidelink resource pool, wherein the sidelink resource pool is enabled with resource reservation for different Transport Blocks (TBs). The first device also has a configuration of a list of reserved periods. Furthermore, the first device selects or determines a first reserved period from the list of reserved periods, wherein the first selected or determined reserved period is within a first set of reserved periods. In addition, the first device randomly selects a first integer in a first interval, wherein the first interval is based on a scaling factor and a second interval, and the scaling factor is derived based on a largest reserved period in the first set of reserved periods, and wherein the first integer indicates a number of transmission opportunities of different TBs with the first reserved period.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: October 3, 2023
    Assignee: ASUSTek Computer Inc.
    Inventors: Chun-Wei Huang, Ming-Che Li
  • Patent number: 11768866
    Abstract: In some examples, dark web content analysis and identification may include ascertaining data that includes text and images, and analyzing the data by performing deep learning based text and image processing to extract text embedded in the images, and deep embedded clustering to generate clusters. Clusters that are to be monitored may be ascertained from the generated clusters. A determination may be made as to whether the ascertained data is sufficient for classification. If so, a deep convolutional generative adversarial networks (DCGAN) based detector may be utilized to analyze further data with respect to the ascertained clusters, and alternatively, a convolutional neural network (CNN) based detector may be utilized to analyze the further data with respect to the ascertained clusters. Based on the analysis of the further data, an operation associated with a website related to the further data may be controlled.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: September 26, 2023
    Assignee: ACCENTURE GLOBAL SOLUTIONS LIMITED
    Inventors: Kamal Mannar, Tau Herng Lim, Chun Wei Wu, Fransisca Fortunata
  • Publication number: 20230298244
    Abstract: In some implementations, the disclosed systems and methods can create a customized pet avatar by applying artificial intelligence to photographs and videos of a real-world pet. In some implementations, the disclosed systems and methods can geospatially map user-generated content within a VR environment. In some implementations, the disclosed systems and methods can receive user-generated content (e.g., images, videos, text, etc.) about a particular destination, such as a business listing, restaurant, or other location of interest. In some implementations, the disclosed systems and methods can build a selected virtual object of a plurality of virtual objects in an artificial reality world.
    Type: Application
    Filed: April 21, 2023
    Publication date: September 21, 2023
    Applicant: Meta Platforms Technologies, LLC
    Inventors: Chun-Wei CHAN, Meng WANG, Maria Alejandra RUIZ GUTIERREZ, Michelle Jia-Ying CHEUNG, Jiemin ZHANG, Vincent Charles CHEUNG
  • Patent number: D1001787
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: October 17, 2023
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Robert Stewart, Andrew Nicholas Toth, Amrit Bamzai, Christopher Emmons, Reid Schlegel, Po-Chang Chu, Yi-Chieh Lin, Ming-Hung Hung, Bo-Yen Chen, Man Ning Lu, Lan-Chun Yang, Bing-Chun Chung, Chun-Wei Wang, Bau-Yi Huang