Patents by Inventor Chun-Wen Cheng
Chun-Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230382716Abstract: Various embodiments of the present disclosure are directed towards an electronic device that comprises a semiconductor substrate having a first surface opposite a second surface. The semiconductor substrate at least partially defines a cavity. A first microelectromechanical systems (MEMS) device is disposed along the first surface of the semiconductor substrate. The first MEMS device comprises a first backplate and a diaphragm vertically separated from the first backplate. A second MEMS device is disposed along the first surface of the semiconductor substrate. The second MEMS device comprises spring structures and a moveable element. The spring structures are configured to suspend the moveable element in the cavity. A segment of the semiconductor substrate continuously laterally extends from under a sidewall of the first MEMS device to under a sidewall of the second MEMS device.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Inventors: Chun-Wen Cheng, Chia-Hua Chu, Chun Yin Tsai, Wen Cheng Kuo
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Publication number: 20230382720Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) package comprising a wire-bond damper. A housing structure overlies a support substrate, and a MEMS structure is between the support substrate and the housing structure. The MEMS structure comprises an anchor, a spring, and a movable mass. The spring extends from the anchor to the movable mass to suspend and allow movement of the movable mass in a cavity between the support substrate and the housing structure. The wire-bond damper is on the movable mass or structure surrounding the movable mass. For example, the wire-bond damper may be on a top surface of the movable mass. As another example, the wire-bond damper may be on the support substrate, laterally between the anchor and the movable mass. Further, the wire-bond damper comprises a wire formed by wire bonding and configured to dampen shock to the movable mass.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Inventors: Tsung-Lin Hsieh, Wei-Jhih Mao, Shang-Ying Tsai, Kuei-Sung Chang, Chun-Wen Cheng
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Publication number: 20230382712Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a dielectric structure disposed over a first semiconductor substrate, where the dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the dielectric structure. The second semiconductor substrate includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity. An anti-stiction structure is disposed between the movable mass and the dielectric structure, where the anti-stiction structure is a first silicon-based semiconductor.Type: ApplicationFiled: August 3, 2023Publication date: November 30, 2023Inventors: Kuei-Sung Chang, Chun-Wen Cheng, Fei-Lung Lai, Shing-Chyang Pan, Yuan-Chih Hsieh, Yi-Ren Wang
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Patent number: 11827513Abstract: A MEMS support structure and a cap structure are provided. At least one vertically-extending trench is formed into the MEMS support structure or a portion of the cap structure. A vertically-extending outgassing material portion having a surface that is physically exposed to a respective vertically-extending cavity is formed in each of the at least one vertically-extending trench. A matrix material layer is attached to the MEMS support structure. A movable element laterally confined within a matrix layer is formed by patterning the matrix material layer. The matrix layer is bonded to the cap structure. A sealed chamber containing the movable element is formed. Each vertically-extending outgassing material portion has a surface that is physically exposed to the sealed chamber, and outgases a gas to increase the pressure in the sealed chamber.Type: GrantFiled: October 8, 2021Date of Patent: November 28, 2023Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Kuei-Sung Chang, Tai-Bang An, Chun-Wen Cheng, Hung-Hua Lin
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Publication number: 20230375501Abstract: A method of making a biochip includes forming an opening extending completely through a fluidic substrate. Forming the opening includes defining a plurality of sidewalls on the fluidic substrate, wherein the plurality of sidewalls defines a channel in fluid communication with the opening, and each of the plurality of sidewalls comprises polydimethylsiloxane (PDMS). The method further includes coating a surface of the fluidic substrate with a silicon oxide coating wherein, the silicon oxide coating is between adjacent sidewalls of the plurality of sidewalls. The method further includes bonding the fluidic substrate to a detection substrate.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Inventors: Yi-Shao LIU, Chun-Ren CHENG, Chun-Wen CHENG
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Publication number: 20230370783Abstract: A MEMS device and a method of manufacturing the same are provided. A semiconductor device includes a substrate; and a membrane over the substrate and configured to generate charges in response to an acoustic wave, the membrane being in a polygonal shape including vertices. The membrane includes a via pattern includes: first lines that partition the membrane into slices and extend to the vertices of the membrane such that the slices are separated from each other near an anchored region of the membrane and connected to each other around a central region; and second lines extending from the anchored region of the membrane toward the central region of the membrane, each of the first lines or each of the second lines including non-straight lines.Type: ApplicationFiled: July 21, 2023Publication date: November 16, 2023Inventors: CHUN-WEN CHENG, CHUN YIN TSAI, CHIA-HUA CHU
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Publication number: 20230365398Abstract: A MEMS support structure and a cap structure are provided. At least one vertically-extending trench is formed into the MEMS support structure or a portion of the cap structure. A vertically-extending outgassing material portion having a surface that is physically exposed to a respective vertically-extending cavity is formed in each of the at least one vertically-extending trench. A matrix material layer is attached to the MEMS support structure. A movable element laterally confined within a matrix layer is formed by patterning the matrix material layer. The matrix layer is bonded to the cap structure. A sealed chamber containing the movable element is formed. Each vertically-extending outgassing material portion has a surface that is physically exposed to the sealed chamber, and outgases a gas to increase the pressure in the sealed chamber.Type: ApplicationFiled: July 25, 2023Publication date: November 16, 2023Inventors: Kuei-Sung Chang, Tai-Bang An, Chun-Wen Cheng, Hung-Hua Lin
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Patent number: 11814283Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a dielectric structure disposed over a first semiconductor substrate, where the dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the dielectric structure. The second semiconductor substrate includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity. An anti-stiction structure is disposed between the movable mass and the dielectric structure, where the anti-stiction structure is a first silicon-based semiconductor.Type: GrantFiled: June 16, 2021Date of Patent: November 14, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuei-Sung Chang, Chun-Wen Cheng, Fei-Lung Lai, Shing-Chyang Pan, Yuan-Chih Hsieh, Yi-Ren Wang
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Patent number: 11807521Abstract: Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) device. The method includes forming a filter stack over a carrier substrate. The filter stack comprises a particle filter layer having a particle filter. A support structure layer is formed over the filter stack. The support structure layer is patterned to define a support structure in the support structure layer such that the support structure has one or more segments. The support structure is bonded to a MEMS structure.Type: GrantFiled: March 31, 2021Date of Patent: November 7, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Wen Cheng, Chia-Hua Chu, Wen Cheng Kuo
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Publication number: 20230317753Abstract: Optical modules and methods of forming the same are provided. In an embodiment, an exemplary method includes forming multiple first optical elements over a first wafer, forming multiple second optical elements over a second wafer, forming multiple third optical elements over a third wafer, aligning the first wafer with the second wafer such that, upon the aligning of the first wafer with the second wafer, each first optical element is vertically overlapped with a corresponding second optical element. The method also includes bonding the first wafer with the second wafer to form a first bonded structure, aligning the second wafer with the third wafer such that, and upon bonding the second wafer of the first bonded structure to the third wafer, where upon the aligning of the second wafer with the third wafer, each second optical element is vertically overlapped with a corresponding third optical element.Type: ApplicationFiled: August 31, 2022Publication date: October 5, 2023Inventors: Jung-Huei Peng, Chun-Wen Cheng, Yi-Chien Wu
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Patent number: 11768170Abstract: A biochip including a fluidic substrate having an opening extending completely through the fluidic substrate. The biochip further includes a silicon oxide coating on the fluidic substrate. The biochip further includes a plurality of sidewalls on the fluidic substrate, wherein the plurality of sidewalls defines a channel in fluid communication with the opening, the silicon oxide coating is between adjacent sidewalls of the plurality of sidewalls, and each of the plurality of sidewalls comprises polydimethylsiloxane (PDMS). The biochip further includes a detection substrate spaced from the fluidic substrate.Type: GrantFiled: April 2, 2021Date of Patent: September 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
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Patent number: 11769741Abstract: An organic interposer includes interconnect-level dielectric material layers embedding redistribution interconnect structures, at least one dielectric capping layer overlying a topmost interconnect-level dielectric material layer, a bonding-level dielectric layer overlying the at least one dielectric capping layer, and a dual-layer inductor structure, which may include a lower conductive coil embedded within the topmost interconnect-level dielectric material layer, a conductive via structure vertically extending through the at least one dielectric capping layer, and an upper conductive coil embedded within the bonding-level dielectric layer and comprising copper.Type: GrantFiled: May 27, 2022Date of Patent: September 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Wei-Han Chiang, Ming-Da Cheng, Ching-Ho Cheng, Wei Sen Chang, Hong-Seng Shue, Ching-Wen Hsiao, Chun-Hung Chen
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Publication number: 20230278856Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.Type: ApplicationFiled: May 11, 2023Publication date: September 7, 2023Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
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Patent number: 11750980Abstract: A MEMS device and a method of manufacturing the same are provided. A semiconductor device includes a substrate; and a membrane over the substrate and configured to generate charges in response to an acoustic wave, the membrane being in a polygonal shape including vertices. The membrane includes a via pattern having first lines that partition the membrane into slices and extend to the vertices of the membrane such that the slices are separated from each other near an anchored region of the membrane and connected to each other around a central region. The via pattern further includes second lines extending from the anchored region of the membrane toward the central region of the membrane. Each of the second lines includes a length less than a length of each of the first lines.Type: GrantFiled: July 27, 2022Date of Patent: September 5, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Wen Cheng, Chun Yin Tsai, Chia-Hua Chu
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Publication number: 20230257256Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC) including a substrate. A plurality of adhesive structures is disposed on the substrate. A microelectromechanical systems (MEMS) structure is disposed on the adhesive structures. The MEMS structure comprises a movable element disposed within a cavity. A first plurality of stopper bumps is disposed between the movable element and the substrate.Type: ApplicationFiled: March 9, 2022Publication date: August 17, 2023Inventors: Wei-Jhih Mao, Shang-Ying Tsai, Kuei-Sung Chang, Chun-Wen Cheng
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Publication number: 20230246080Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The gate stack includes a gate dielectric layer, a first metal-containing layer, a silicon-containing layer, a second metal-containing layer, and a gate electrode layer sequentially stacked over the substrate, the silicon-containing layer is between the first metal-containing layer and the second metal-containing layer, and the silicon-containing layer includes an oxide material.Type: ApplicationFiled: April 10, 2023Publication date: August 3, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsueh-Wen TSAU, Chun-I WU, Ziwei FANG, Huang-Lin CHAO, I-Ming CHANG, Chung-Liang CHENG, Chih-Cheng LIN
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Patent number: 11713242Abstract: In some embodiments, a sensor is provided. The sensor includes a microelectromechanical systems (MEMS) substrate disposed over an integrated chip (IC), where the IC defines a lower portion of a first cavity and a lower portion of a second cavity, and where the first cavity has a first operating pressure different than an operating pressure of the second cavity. A cap substrate is disposed over the MEMS substrate, where a first pair of sidewalls of the cap substrate partially define an upper portion of the first cavity, and a second pair of sidewalls of the cap substrate partially define an upper portion of the second cavity. A sensor area comprising a movable portion of the MEMS substrate and a dummy area comprising a fixed portion of the MEMS substrate are both disposed in the first cavity. A pressure enhancement structure is disposed in the dummy area.Type: GrantFiled: November 11, 2021Date of Patent: August 1, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Wen Cheng, Fei-Lung Lai, Kuei-Sung Chang, Shang-Ying Tsai
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Patent number: 11703475Abstract: A method includes mounting an integrated electro-microfluidic probe card to a device area on a bio-sensor device wafer, wherein the electro-microfluidic probe card has a first major surface and a second major surface opposite the first major surface. The method further includes electrically connecting at least one electronic probe tip extending from the first major surface to a corresponding conductive area of the device area. The method further includes stamping a test fluid onto the device area. The method further includes measuring via the at least one electronic probe tip a first electrical property of one or more bio-FETs of the device area based on the test fluid.Type: GrantFiled: September 30, 2019Date of Patent: July 18, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Shao Liu, Fei-Lung Lai, Chun-Ren Cheng, Chun-Wen Cheng
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Publication number: 20230223302Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.Type: ApplicationFiled: May 13, 2022Publication date: July 13, 2023Inventors: Pin-Wen Chen, Chang-Ting Chung, Yi-Hsiang Chao, Yu-Ting Wen, Kai-Chieh Yang, Yu-Chen Ko, Peng-Hao Hsu, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
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Publication number: 20230192476Abstract: A MEMS device includes a first multi-layer structure, a second multi-layer structure over the first multi-layer structure, a first semiconductor layer between the first and second multilayer structures, a first air gap separating the first multi-layer structure and the first semiconductor layer, a second air gap separating the first semiconductor layer and the second multi-layer structure, a plurality of semiconductor pillars, and a plurality of second semiconductor pillars. The first semiconductor pillars are exposed to the first air gap, and coupled to the first semiconductor layer and the first multi-layer structure. The second semiconductor pillars are exposed to the second air gap, and coupled to the first semiconductor layer and the second multi-layer structure.Type: ApplicationFiled: February 12, 2023Publication date: June 22, 2023Inventors: CHEN HSIUNG YANG, CHUN-WEN CHENG, CHIA-HUA CHU, EN-CHAN CHEN