Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.

Abstract: An organic interposer includes interconnect-level dielectric material layers embedding redistribution interconnect structures, at least one dielectric capping layer overlying a topmost interconnect-level dielectric material layer, a bonding-level dielectric layer overlying the at least one dielectric capping layer, and a dual-layer inductor structure, which may include a lower conductive coil embedded within the topmost interconnect-level dielectric material layer, a conductive via structure vertically extending through the at least one dielectric capping layer, and an upper conductive coil embedded within the bonding-level dielectric layer and comprising copper.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC) including a substrate. A plurality of adhesive structures is disposed on the substrate. A microelectromechanical systems (MEMS) structure is disposed on the adhesive structures. The MEMS structure comprises a movable element disposed within a cavity. A first plurality of stopper bumps is disposed between the movable element and the substrate.

Abstract: A MEMS support structure and a cap structure are provided. At least one vertically-extending trench is formed into the MEMS support structure or a portion of the cap structure. A vertically-extending outgassing material portion having a surface that is physically exposed to a respective vertically-extending cavity is formed in each of the at least one vertically-extending trench. A matrix material layer is attached to the MEMS support structure. A movable element laterally confined within a matrix layer is formed by patterning the matrix material layer. The matrix layer is bonded to the cap structure. A sealed chamber containing the movable element is formed. Each vertically-extending outgassing material portion has a surface that is physically exposed to the sealed chamber, and outgases a gas to increase the pressure in the sealed chamber.

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

Abstract: A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming a source/drain region over the fin adjacent to the gate structure; forming an interlayer dielectric (ILD) layer over the source/drain region around the gate structure; forming an opening in the ILD layer to expose the source/drain region; forming a silicide region and a barrier layer successively in the openings over the source/drain region, where the barrier layer includes silicon nitride; reducing a concentration of silicon nitride in a surface portion of the barrier layer exposed to the opening; after the reducing, forming a seed layer on the barrier layer; and forming an electrically conductive material on the seed layer to fill the opening.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a dielectric layer formed over the substrate. The semiconductor device structure further includes a movable membrane formed over the dielectric layer. In addition, the movable membrane includes first recessed portions arranged in a ring shape in a top view and second recessed portions surrounded by the first recessed portions.

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first conductive structure and a second conductive structure. A dielectric structure is arranged between the first conductive structure and the second conductive structure. The dielectric structure comprises an upper region over a lower region. The lower region comprises a first lateral surface and a second lateral surface on opposing sides of the upper region. A passivation layer overlies the second conductive structure and the dielectric structure. The passivation layer comprises a lateral segment contacting the first lateral surface. A height of the lateral segment is greater than a height of the upper region. A top surface of the lateral segment is below a top surface of the passivation layer.

Abstract: The present disclosure provides a gas sensor. The gas sensor includes a substrate, an insulating layer over the substrate, a conductor layer over and in contact with a top surface of the substrate, and a gas sensing film. The conductor layer includes a conductive pattern having a plurality of openings, and the conductive pattern is embedded in the insulating layer. The gas sensing film is formed over a portion of the conductive pattern.

Abstract: Various embodiments of the present disclosure are directed towards an electronic device that comprises a semiconductor substrate having a first surface opposite a second surface. The semiconductor substrate at least partially defines a cavity. A first microelectromechanical systems (MEMS) device is disposed along the first surface of the semiconductor substrate. The first MEMS device comprises a first backplate and a diaphragm vertically separated from the first backplate. A second MEMS device is disposed along the first surface of the semiconductor substrate. The second MEMS device comprises spring structures and a moveable element. The spring structures are configured to suspend the moveable element in the cavity. A segment of the semiconductor substrate continuously laterally extends from under a sidewall of the first MEMS device to under a sidewall of the second MEMS device.

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a first dielectric layer formed over the substrate. The semiconductor device structure also includes a first movable membrane formed over the first dielectric layer. In addition, the first movable membrane has a first corrugated portion and a first edge portion connecting to the first corrugated portion. The semiconductor device structure further includes a second dielectric layer formed over the first movable membrane. In addition, the first edge portion is sandwiched between the first dielectric layer and the second dielectric layer, the first corrugated portion is partially sandwiched between the first dielectric layer and the second dielectric layer and is partially exposed by a cavity, and a bottom surface of the first corrugated portion is lower than a bottom surface of the first edge portion.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The gate stack includes a gate dielectric layer, a first metal-containing layer, a silicon-containing layer, a second metal-containing layer, and a gate electrode layer sequentially stacked over the substrate, the silicon-containing layer is between the first metal-containing layer and the second metal-containing layer, and the silicon-containing layer includes an oxide material.

Abstract: The present disclosure provides a gas sensor. The gas sensor includes a substrate, a conductor layer over the substrate, wherein the conductor layer includes a conductive pattern including a plurality of openings, the openings being arranged in a repeating pattern, an insulating layer in the plurality of openings and over a top surface of the conductive pattern, wherein the conductive pattern is embedded in the insulating layer, and a gas sensing film over a portion of the insulating layer.

Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) package comprising a wire-bond damper. A housing structure overlies a support substrate, and a MEMS structure is between the support substrate and the housing structure. The MEMS structure comprises an anchor, a spring, and a movable mass. The spring extends from the anchor to the movable mass to suspend and allow movement of the movable mass in a cavity between the support substrate and the housing structure. The wire-bond damper is on the movable mass or structure surrounding the movable mass. For example, the wire-bond damper may be on a top surface of the movable mass. As another example, the wire-bond damper may be on the support substrate, laterally between the anchor and the movable mass. Further, the wire-bond damper comprises a wire formed by wire bonding and configured to dampen shock to the movable mass.

Abstract: A micro-electro mechanical system (MEMS) device includes a MEMS substrate, at least one movable element laterally confined within a matrix layer that overlies the MEMS substrate, and a cap substrate bonded to the matrix layer through bonding material portions. A first movable element selected from the at least one movable element is located inside a first chamber that is laterally bounded by the matrix layer and vertically bounded by a first capping surface that overlies the first movable element. The first capping surface includes an array of downward-protruding bumps including respective portions of a dielectric material layer. Each of the downward-protruding bumps has a vertical cross-sectional profile of an inverted hillock. The MEMS device can include, for example, an accelerometer.

Abstract: Various embodiments of the present disclosure are directed towards a camera module comprising flat lenses. Flat lenses have reduced thicknesses compared to other types of lenses, whereby the camera module may have a small size and camera bumps may be omitted or reduced in size on cell phones and the like incorporating the camera module. The flat lenses are configured to focus visible light into a beam of white light, split the beam into sub-beams of red, green, and blue light, and guide the sub-beams respectively to separate image sensors for red, green, and blue light. The image sensors generate images for corresponding colors and the images are combined into a full-color image. Optically splitting the beam into the sub-beams and using separate image sensors for the sub-beams allows color filters to be omitted and smaller pixel sensors. This, in turn, allows higher quality imaging.

Abstract: An optical device includes a substrate, a first electrode, a second electrode, and a first lens. The first electrode and the second electrode are over the substrate and configured to generate a first electric field. The first lens is between the first electrode and the second electrode and has a focal length that varies in response to the first electric field applied to the first lens.

Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) package comprising a wire-bond damper. A housing structure overlies a support substrate, and a MEMS structure is between the support substrate and the housing structure. The MEMS structure comprises an anchor, a spring, and a movable mass. The spring extends from the anchor to the movable mass to suspend and allow movement of the movable mass in a cavity between the support substrate and the housing structure. The wire-bond damper is on the movable mass or structure surrounding the movable mass. For example, the wire-bond damper may be on a top surface of the movable mass. As another example, the wire-bond damper may be on the support substrate, laterally between the anchor and the movable mass. Further, the wire-bond damper comprises a wire formed by wire bonding and configured to dampen shock to the movable mass.