Abstract: A method includes forming isolation regions extending into a semiconductor substrate. A semiconductor strip is between the isolation regions. The method further includes recessing the isolation regions so that a top portion of the semiconductor strip protrudes higher than top surfaces of the isolation regions to form a semiconductor fin, measuring a fin width of the semiconductor fin, generating an etch recipe based on the fin width, and performing a thinning process on the semiconductor fin using the etching recipe.

Abstract: A transmitter is provided. the transmitter includes a hybrid feedback circuit and a hybrid driving circuit. The hybrid feedback circuit compares a reference voltage with a feedback voltage in closed-loop, determines whether to perform polarity reversal according to a mode control signal, controls power output according to a comparison result and the mode control signal, and generates a first output signal. The hybrid driving circuit, coupled to the hybrid feedback circuit, receives the first output signal of the hybrid feedback circuit, generates a transmitter output signal according to an input data, and generates a second output signal according to the transmitter output signal. The first output signal and the second output signal are transmitted back to the hybrid feedback circuit.

Abstract: A transmitter is provided. the transmitter includes a hybrid feedback circuit and a hybrid driving circuit. The hybrid feedback circuit compares a reference voltage with a feedback voltage in closed-loop, determines whether to perform polarity reversal according to a mode control signal, controls power output according to a comparison result and the mode control signal, and generates a first output signal. The hybrid driving circuit, coupled to the hybrid feedback circuit, receives the first output signal of the hybrid feedback circuit, generates a transmitter output signal according to an input data, and generates a second output signal according to the transmitter output signal. The first output signal and the second output signal are transmitted back to the hybrid feedback circuit.

Abstract: A multimedia communication apparatus, suitable for a first multimedia apparatus, is adapted to transmit or receive multimedia data and is electrically connectable to a standard connector. The standard connector may be non-reversibly or reversibly connected to a plug of a standard cable, and includes a plurality of the pins. The pins include multiple differential signal pins serving as multiple multimedia channels, a power pin serving as a power line, a first polarity pin, a first data pin and a ground pin. The multimedia communication apparatus includes a control logic and a multimedia signal processor. The multimedia signal processor transmits or receives multimedia data to/from a second multimedia apparatus through the multimedia channels, and further power handshakes or exchanges information with the second multimedia apparatus. The information is for controlling a multiplexer to switch the multimedia channels.

Abstract: An electronic device includes a transmission interface, a driving circuit, a receiving circuit, a sampling circuit, a detecting circuit, a timing control circuit and a processing circuit. The transmission interface is for connecting to another electronic device via a connecting cable. The driving circuit outputs a backward signal via the transmission interface to the another electronic device. The receiving circuit receives a received signal including the backward signal and a forward signal from the transmission interface. The sampling circuit samples the received signal to obtain a plurality of sample results. The detecting circuit detects transitions of the sample results to obtain a plurality of detection results. The processing circuit generates a control signal according to the detection results, and adjusts a time point at which the driving circuit outputs the backward signal through the timing control circuit.

Abstract: A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.

Abstract: A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.

Abstract: An electronic device includes a transmission interface, a driving circuit, a receiving circuit, a sampling circuit, a detecting circuit, a timing control circuit and a processing circuit. The transmission interface is for connecting to another electronic device via a connecting cable. The driving circuit outputs a backward signal via the transmission interface to the another electronic device. The receiving circuit receives a received signal including the backward signal and a forward signal from the transmission interface. The sampling circuit samples the received signal to obtain a plurality of sample results. The detecting circuit detects transitions of the sample results to obtain a plurality of detection results. The processing circuit generates a control signal according to the detection results, and adjusts a time point at which the driving circuit outputs the backward signal through the timing control circuit.

Abstract: A display controller, video signal transmitting method and system thereof are provided. The display controller includes a processing circuit; a transmitting channel, coupled to the processing circuit; a receiving channel, coupled to the processing circuit; and a clock generator, that generates an internal clock signal and an external clock signal. Upon receiving a video signal, the processing circuit processes a first partial pixel data of the video signal to output a first display control signal. The transmitting channel converts a second partial pixel data of the video signal to a partial video signal having a multiple data rate according to the internal clock signal to be outputted.

Abstract: A clock data recovery apparatus includes an oscillator, a phase detector and an oscillator control circuit. The oscillator generates an original clock signal. The phase detector includes a first sampling circuit, a frequency dividing circuit, a second sampling circuit and a selecting circuit. The first sampling circuit samples a data signal using the original clock signal to generate a first set of sample results. The frequency dividing circuit divides the original clock signal to generate a frequency divided clock signal. The second sampling circuit performs sampling using the frequency divided clock signal to generate a second set of sample results. The selecting circuit selectively outputs one of the first and second sets of sample results as a final set of sample results. The oscillator control circuit controls the oscillator according to the final set of sample results.

Abstract: A multimedia communication apparatus, suitable for a first multimedia apparatus, is adapted to transmit or receive multimedia data and is electrically connectable to a standard connector. The standard connector may be non-reversibly or reversibly connected to a plug of a standard cable, and includes a plurality of the pins. The pins include multiple differential signal pins serving as multiple multimedia channels, a power pin serving as a power line, a first polarity pin, a first data pin and a ground pin. The multimedia communication apparatus includes a control logic and a multimedia signal processor. The multimedia signal processor transmits or receives multimedia data to/from a second multimedia apparatus through the multimedia channels, and further power handshakes or exchanges information with the second multimedia apparatus. The information is for controlling a multiplexer to switch the multimedia channels.

Abstract: A clock data recovery apparatus includes an oscillator, a phase detector and an oscillator control circuit. The oscillator generates an original clock signal. The phase detector includes a first sampling circuit, a frequency dividing circuit, a second sampling circuit and a selecting circuit. The first sampling circuit samples a data signal using the original clock signal to generate a first set of sample results. The frequency dividing circuit divides the original clock signal to generate a frequency divided clock signal. The second sampling circuit performs sampling using the frequency divided clock signal to generate a second set of sample results. The selecting circuit selectively outputs one of the first and second sets of sample results as a final set of sample results. The oscillator control circuit controls the oscillator according to the final set of sample results.

Abstract: An integrated circuit capable of preventing current backflow to a power line is provided. The integrated circuit includes an input circuit. The input circuit includes a bonding pad and a pull-up circuit, a pull-up switch, a bulk controlled switch and a control circuit. The pull-up switch includes a first control node and a first bulk node. The bulk controlled switch includes a second control node and a second bulk node. The control circuit controls the first and second control nodes according to an internal signal, a power voltage of the power line and a pad voltage of the bonding pad. When the power voltage is a predetermined voltage, the control circuit turns on the bulk controlled switch. When the power line is at a ground voltage and the bonding pad voltage is at the predetermined voltage, the control circuit turns off the bulk controlled switch and the pull-up switch.

Abstract: An integrated circuit capable of preventing current backflow to a power line is provided. The integrated circuit includes an input circuit. The input circuit includes a bonding pad and a pull-up circuit, a pull-up switch, a bulk controlled switch and a control circuit. The pull-up switch includes a first control node and a first bulk node. The bulk controlled switch includes a second control node and a second bulk node. The control circuit controls the first and second control nodes according to an internal signal, a power voltage of the power line and a pad voltage of the bonding pad. When the power voltage is a predetermined voltage, the control circuit turns on the bulk controlled switch. When the power line is at a ground voltage and the bonding pad voltage is at the predetermined voltage, the control circuit turns off the bulk controlled switch and the pull-up switch.

Abstract: A low-leakage IO circuit is provided. The IO circuit includes an impedance path between a pad and a power supply. The impedance path bypasses a signal path of the pad and includes a switch circuit. According to a relationship between voltages of the power supply and the pad of the IO circuit, the switch circuit selectively conducts the impedance path. When the power supply provides power normally, the switch circuit conducts the impedance path to provide a pull-up resistor between the pad and the power supply. When the power supply provides no power and its voltage is lower than a voltage of the pad, the switch circuit disconnects the conducting path to effectively reduce power leakage.

Abstract: A multi-state indicator comprises a voltage generator, for generating M voltages, with M being an integer larger than 3; and a multi-state detector, coupled to the voltage generator, for receiving M voltages, having a voltage input end for receiving an input voltage to generate an indication signal whereby the indication signal is capable of indicating the input voltage with reference to the M voltages. Unlike the prior art, a multi-state detector having level shifters according to the present invention alleviates problems of static currents and over-large areas for circuits implementing typical differential comparators.

Abstract: A transmitter comprises a protection circuit; a first termination resistor having a first end coupled to a first voltage source, and a second end coupled to the protection circuit; a second termination resistor having a first end coupled to the first voltage source, and a second end coupled to the protection circuit, wherein the second end of the first termination resistor and the second end of the second termination resistor form a differential output pair; a current switch coupled to the protection circuit; a current source coupled to the current switch; and a pre-driver circuit coupled to the current switch, for controlling the current switch, making the differential output pair generate an output current. Wherein, the pre-driver circuit receives a second voltage source, and the first voltage source is higher than the second voltage source.

Abstract: A variable-frequency network connection establishing method is adapted for establishing a connection between a local network device and a remote network device. The variable-frequency network connection establishing method includes the steps of: providing a plurality of local communications protocols including a local standard communications protocol and a local variable-frequency communications protocol to the remote network device; receiving a remote communications protocol provided by the remote network device; generating an indicator signal in accordance with the remote communications protocol and the plurality of local communications protocols; and operating in one of a standard mode and variable-frequency mode according to the indicator signal.

Abstract: A network communications device is capable of promoting connection quality, and includes: a plurality of transmitting units for outputting a plurality of analog transmit-signals to another network communications device based on a plurality of digital transmit-signals; a plurality of receiving units for outputting a plurality of digital receive-signals based on a plurality of analog receive-signals sent from the another network communications device; an echo canceller for providing a signal for canceling an echo in one of the digital receive-signals; a near end crosstalk canceller for providing a signal for canceling near end crosstalk in one of the digital receive-signals; a decoding circuit for generating a decoded signal based on one of the digital receive-signals subsequent to cancellation of the echo and the near end crosstalk therein; and a power-increasing control circuit for increasing operating power so as to promote connection quality.

Abstract: A low-leakage IO circuit is provided. The IO circuit includes an impedance path between a pad and a power supply. The impedance path bypasses a signal path of the pad and includes a switch circuit. According to a relationship between voltages of the power supply and the pad of the IO circuit, the switch circuit selectively conducts the impedance path. When the power supply provides power normally, the switch circuit conducts the impedance path to provide a pull-up resistor between the pad and the power supply. When the power supply provides no power and its voltage is lower than a voltage of the pad, the switch circuit disconnects the conducting path to effectively reduce power leakage.