Patents by Inventor Chun-Yen Lin
Chun-Yen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230194625Abstract: Multiphase trans-inductor voltage regulator fault diagnostic. One example is a method of detecting electrical faults in a multiphase power converter, the method comprising: driving, by a controller of the multiphase power converter, a first phase of the power converter, the first phase comprising a phase-one transformer module; driving, by the controller, a second phase of the power converter, the second phase comprising a phase-two transformer module distinct from the phase-one transformer module; testing, by the controller of the multiphase power converter, for a phase-one electrical fault associated with the phase-one transformer module; testing, by the controller, for a phase-two electrical fault associated with the phase-two transformer module; and driving, by the controller, a fault indicator in the presence of a phase-one or phase-two electrical fault.Type: ApplicationFiled: May 31, 2022Publication date: June 22, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Alessandro ZAFARANA, Salvatore LEONE, Chun-Yen LIN
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Patent number: 11620850Abstract: A fingerprint sensing device and a driving method for a fingerprint sensing panel thereof are provided. The driving method includes: detecting whether a finger touch occurs on the fingerprint sensing panel; during a period of the finger touch, switching the brightness mode of the fingerprint sensing panel from a normal brightness mode to a high brightness mode so as to sense a fingerprint; driving the fingerprint sensing panel to sense the fingerprint before a mode switching time point at which the brightness mode of the fingerprint sensing panel is switched to the high brightness mode. The fingerprint sensing panel includes a pixel row, wherein the pixel row is subjected to a reset, an exposure period and a sampling in sequence to output a row sensing result, the reset is earlier than the mode switching time point, and the sampling is later than the mode switching time point.Type: GrantFiled: August 21, 2022Date of Patent: April 4, 2023Assignee: Novatek Microelectronics Corp.Inventors: Chun-Yen Lin, Chi-Ting Chen
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Publication number: 20230057293Abstract: A method includes receiving an integrated circuit (IC) design layout including a layout block, where the layout block including first line patterns disposed along a first direction, extending lengths of the first line patterns, connecting portions of the first line patterns disposed within a distance less than a preset value, forming second line patterns disposed outside the layout block parallel to the first line patterns, forming mandrel bar patterns overlapping edges of the layout block, where the mandrel bar patterns oriented along a second direction perpendicular to the first direction, and outputting a pattern layout for mask fabricating, where the pattern layout includes the layout block, the first and second line patterns, and the mandrel bar patterns.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Inventors: Chun-Yen Lin, Tung-Heng Hsieh, Bao-Ru Young
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Publication number: 20230011276Abstract: A memory device includes a pair of memory cells, an analog-to-digital converter (ADC), and a processing circuit. The pair of memory cells has a first memory cell and a second memory cell. The ADC, having a first input terminal and a second input terminal, is configured to convert a first data signal at the first input terminal and a second data signal at the second input terminal into a digital output indicating a data value associated with a particular state stored in the pair of memory cells. The processing circuit, coupled to a storage node of the first memory cell, a storage node of the second memory cell, and the first and the second input terminals, is configured to selectively adjust the first data signal and the second data signal according to first data stored in the first memory cell and second data stored in the second memory cell.Type: ApplicationFiled: December 27, 2021Publication date: January 12, 2023Inventors: Chih-Chieh CHIU, Chun-Yen LIN, Chih-Lung CHEN
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Publication number: 20230010087Abstract: The present disclosure provides a memory array. The memory array includes a first memory cell, a first word line, a second word line, a first bit line, a first complementary bit line, a second bit line, a second complementary bit line, a first sense amplifier, a second sense amplifier and a first logic circuit. When the memory array operates in a binary content-addressable memory (BCAM) mode, during a search operation, a first logic output indicates whether a logic level of the first word line matches a first logic value at a first terminal of a first data storage of the first memory cell, and whether a logic level of the second word line matches a first complementary logic value at a second terminal of the first data storage of the first memory cell.Type: ApplicationFiled: November 10, 2021Publication date: January 12, 2023Inventors: Chun-Heng CHEN, Chun-Yen LIN, Chih-Chieh CHIU
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Publication number: 20220406343Abstract: A sense enable circuit for enabling a sense amplifier is provided. The sense enable circuit includes a signal generator circuit, a group of reference memory cells and a control circuit. The signal generator circuit is configured to generate a sense amplifier enable signal according to a trigger signal. The sense amplifier is enabled by the sense amplifier enable signal to sense data stored in a memory cell. Each reference memory cell is coupled to a reference wordline and a reference bitline. The reference wordline is activated in response to activation of a wordline coupled to the memory cell. The reference memory cell is configured to, in response to activation of the reference wordline, couple a first reference signal to the reference bitline. The control circuit is configured to adjust a signal level of the reference bitline, and generate the trigger signal according to the signal level of the reference bitline.Type: ApplicationFiled: September 23, 2021Publication date: December 22, 2022Inventors: CHIH-CHIEH CHIU, CHUN-YEN LIN
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Publication number: 20210264090Abstract: In some embodiments, the present disclosure relates to a method that includes removing portions of a substrate to form a continuous fin over the substrate. Further, a doping process is performed to selectively increase a dopant concentration of a first portion of the continuous fin. A first gate electrode is formed over a second portion of the continuous fin, and a second gate electrode is formed over a third portion of the continuous fin. The first portion of the continuous fin is between the second portion and the third portion of the continuous fin. A dummy gate electrode is formed over the first portion of the continuous fin. Upper portions of the continuous fin that are arranged between the first gate electrode, the second gate electrode, and the dummy gate electrode are removed, and source/drain regions are formed between the first, the second, and the dummy gate electrodes.Type: ApplicationFiled: November 25, 2020Publication date: August 26, 2021Inventors: Chun-Yen Lin, Bao-Ru Young, Tung-Heng Hsieh
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Patent number: 10990782Abstract: An operating method of an optical fingerprint capture apparatus includes: by the apparatus upon receipt of a scan command from a host, entering an exposure mode where an image sensor thereof is exposed to light carrying information of a fingerprint; by the apparatus upon complete exposure of the image sensor to the light, entering a sample mode where multiple pieces of pixel data that cooperatively represent an image of the fingerprint are obtained and written to a data buffer thereof; and by the apparatus at a predetermined output time point that is later than a start of the sample mode and earlier than an end of the sample mode, outputting an interrupt request to cause the host to start reading the pieces of pixel data from the data buffer.Type: GrantFiled: November 7, 2019Date of Patent: April 27, 2021Assignee: NOVATEK MICROELECTRONICS CORP.Inventors: Chun-Yen Lin, Ping Liu, Chi-Ting Chen
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Publication number: 20210093825Abstract: A respiratory system includes a gas supply unit and a heating and humidifying unit. The gas supply unit includes a gas supply port; the heating and humidifying unit is detachably combined with the gas supply unit. The heating and humidifying unit includes a base, an adapter and a water tank. The base includes a control element, and the adapter is combined with the base and can rotate at least 90 degrees relative to the base. The water tank is detachably combined with the base, and the water tank includes a gas inlet and a gas outlet, wherein when the water tank is combined with the base, the gas inlet penetrates through an aperture of the base to be fluidly connected to the gas supply port, and the gas outlet is fluidly connected to the adapter.Type: ApplicationFiled: September 25, 2020Publication date: April 1, 2021Inventors: Chun-Yen LIN, Chung-Yi LIN, Jhih-Teng YAO, Chih-Tsan CHIEN, Tsung-Chung KAN, Hao-Yu CHAN
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Publication number: 20210082769Abstract: A method and structure for mitigating leakage current in devices that include a continuous active region. In some embodiments, a threshold voltage at the cell boundary is increased by changing a photomask logic operation (LOP) to reverse a threshold voltage type at the cell boundary. Alternatively, in some cases, the threshold voltage at the cell boundary is increased by performing a threshold voltage implant (e.g., an ion implant) at the cell boundary, and into a dummy gate disposed at the cell boundary. Further, in some embodiments, the threshold voltage at the cell boundary is increased by use of a silicon germanium (SiGe) channel at the cell boundary. In some cases, the SiGe may be disposed within the substrate at the cell boundary and/or the SiGe may be part of the dummy gate disposed at the cell boundary.Type: ApplicationFiled: November 9, 2020Publication date: March 18, 2021Inventors: Chia-Sheng FAN, Chun-Yen LIN, Tung-Heng HSIEH, Bao-Ru YOUNG
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Publication number: 20210073508Abstract: An operating method of an optical fingerprint capture apparatus includes: by the apparatus upon receipt of a scan command from a host, entering an exposure mode where an image sensor thereof is exposed to light carrying information of a fingerprint; by the apparatus upon complete exposure of the image sensor to the light, entering a sample mode where multiple pieces of pixel data that cooperatively represent an image of the fingerprint are obtained and written to a data buffer thereof; and by the apparatus at a predetermined output time point that is later than a start of the sample mode and earlier than an end of the sample mode, outputting an interrupt request to cause the host to start reading the pieces of pixel data from the data buffer.Type: ApplicationFiled: November 7, 2019Publication date: March 11, 2021Inventors: Chun-Yen LIN, Ping LIU, Chi-Ting CHEN
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Patent number: 10867101Abstract: In some embodiments, the present disclosure relates to a method that includes receiving an initial layout design for a circuit schematic. The initial layout design includes a first gate electrode, a second gate electrode, and a third gate electrode arranged over a continuous fin. A first source/drain region is arranged between the first gate electrode and dummy gate electrode, and a second source/drain region is arranged between the second gate electrode and the dummy gate electrode. The method further includes determining if at least one of the first or second source/drain regions corresponds to a drain in the circuit schematic, and modifying the initial layout design to increase a dummy threshold voltage associated with the dummy gate electrode when the at least one of the first or second source/drain regions corresponds to the drain in the circuit schematic to provide a modified layout design.Type: GrantFiled: February 24, 2020Date of Patent: December 15, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chun-Yen Lin, Bao-Ru Young, Tung-Heng Hsieh
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Patent number: 10832958Abstract: A method and structure for mitigating leakage current in devices that include a continuous active region. In some embodiments, a threshold voltage at the cell boundary is increased by changing a photomask logic operation (LOP) to reverse a threshold voltage type at the cell boundary. Alternatively, in some cases, the threshold voltage at the cell boundary is increased by performing a threshold voltage implant (e.g., an ion implant) at the cell boundary, and into a dummy gate disposed at the cell boundary. Further, in some embodiments, the threshold voltage at the cell boundary is increased by use of a silicon germanium (SiGe) channel at the cell boundary. In some cases, the SiGe may be disposed within the substrate at the cell boundary and/or the SiGe may be part of the dummy gate disposed at the cell boundary.Type: GrantFiled: April 29, 2019Date of Patent: November 10, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Sheng Fan, Chun-Yen Lin, Tung-Heng Hsieh, Bao-Ru Young
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Publication number: 20200067408Abstract: A method of calibrating a regulator includes: measuring at least one of a voltage and a current; comparing the measurement to a nominal value of the at least one of the voltage and the current; generating a correction parameter of the comparison of the measurement to the nominal value; and storing the correction parameter in a local memory of the regulator.Type: ApplicationFiled: October 29, 2019Publication date: February 27, 2020Inventors: Benjamim Tang, Chun-Yen Lin, Rohan Samsi, Jinghong Guo, Tim M. Ng, Richard C. Pierson
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Patent number: 10483847Abstract: Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter.Type: GrantFiled: January 21, 2015Date of Patent: November 19, 2019Assignee: Infineon Technologies Austria AGInventors: Benjamim Tang, Chun-Yen Lin, Rohan Samsi, Jinghong Guo, Tim M. Ng, Richard C. Pierson
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Patent number: 10467453Abstract: A fingerprint identification apparatus includes a force sensor, a fingerprint sensor, and a switching circuit coupled between the force sensor and the fingerprint sensor. The switching circuit is configured to alternately activate a low power force detection mode to detect the force touch using the force sensor and a low power fingerprint detection mode to detect the finger touch using the fingerprint sensor after a switching period. In response to determining that either the force touch or the finger touch is detected, the fingerprint identification apparatus detects the fingerprint using the fingerprint sensor in a normal fingerprint detection mode. Next, the fingerprint identification apparatus determines whether the detected fingerprint matches one of reference fingerprints, and outputs an interrupt signal indicating whether the detected fingerprint matches one of the reference fingerprints. A fingerprint identification method and a system for fingerprint identification are also introduced.Type: GrantFiled: October 2, 2017Date of Patent: November 5, 2019Assignee: Novatek Microelectronics Corp.Inventors: Chun-Yen Lin, Chia-Sheng Nien
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Publication number: 20190259664Abstract: A method and structure for mitigating leakage current in devices that include a continuous active region. In some embodiments, a threshold voltage at the cell boundary is increased by changing a photomask logic operation (LOP) to reverse a threshold voltage type at the cell boundary. Alternatively, in some cases, the threshold voltage at the cell boundary is increased by performing a threshold voltage implant (e.g., an ion implant) at the cell boundary, and into a dummy gate disposed at the cell boundary. Further, in some embodiments, the threshold voltage at the cell boundary is increased by use of a silicon germanium (SiGe) channel at the cell boundary. In some cases, the SiGe may be disposed within the substrate at the cell boundary and/or the SiGe may be part of the dummy gate disposed at the cell boundary.Type: ApplicationFiled: April 29, 2019Publication date: August 22, 2019Inventors: Chia-Sheng FAN, Chun-Yen LIN, Tung-Heng HSIEH, Bao-Ru YOUNG
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Patent number: 10276445Abstract: A method and structure for mitigating leakage current in devices that include a continuous active region. In some embodiments, a threshold voltage at the cell boundary is increased by changing a photomask logic operation (LOP) to reverse a threshold voltage type at the cell boundary. Alternatively, in some cases, the threshold voltage at the cell boundary is increased by performing a threshold voltage implant (e.g., an ion implant) at the cell boundary, and into a dummy gate disposed at the cell boundary. Further, in some embodiments, the threshold voltage at the cell boundary is increased by use of a silicon germanium (SiGe) channel at the cell boundary. In some cases, the SiGe may be disposed within the substrate at the cell boundary and/or the SiGe may be part of the dummy gate disposed at the cell boundary.Type: GrantFiled: August 31, 2017Date of Patent: April 30, 2019Assignee: Taiwan Semiconductor Manfacturing Co., Ltd.Inventors: Chia-Sheng Fan, Chun-Yen Lin, Tung-Heng Hsieh, Bao-Ru Young
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Publication number: 20190102600Abstract: A fingerprint identification apparatus includes a force sensor, a fingerprint sensor, and a switching circuit coupled between the force sensor and the fingerprint sensor. The switching circuit is configured to alternately activate a low power force detection mode to detect the force touch using the force sensor and a low power fingerprint detection mode to detect the finger touch using the fingerprint sensor after a switching period. In response to determining that either the force touch or the finger touch is detected, the fingerprint identification apparatus detects the fingerprint using the fingerprint sensor in a normal fingerprint detection mode. Next, the fingerprint identification apparatus determines whether the detected fingerprint matches one of reference fingerprints, and outputs an interrupt signal indicating whether the detected fingerprint matches one of the reference fingerprints. A fingerprint identification method and a system for fingerprint identification are also introduced.Type: ApplicationFiled: October 2, 2017Publication date: April 4, 2019Applicant: Novatek Microelectronics Corp.Inventors: Chun-Yen Lin, Chia-Sheng Nien
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Publication number: 20190067116Abstract: A method and structure for mitigating leakage current in devices that include a continuous active region. In some embodiments, a threshold voltage at the cell boundary is increased by changing a photomask logic operation (LOP) to reverse a threshold voltage type at the cell boundary. Alternatively, in some cases, the threshold voltage at the cell boundary is increased by performing a threshold voltage implant (e.g., an ion implant) at the cell boundary, and into a dummy gate disposed at the cell boundary. Further, in some embodiments, the threshold voltage at the cell boundary is increased by use of a silicon germanium (SiGe) channel at the cell boundary. In some cases, the SiGe may be disposed within the substrate at the cell boundary and/or the SiGe may be part of the dummy gate disposed at the cell boundary.Type: ApplicationFiled: August 31, 2017Publication date: February 28, 2019Inventors: Chia-Sheng FAN, Chun-Yen LIN, Tung-Heng HSIEH, Bao-Ru YOUNG