Patents by Inventor Chun-Yu Lee

Chun-Yu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10811548
    Abstract: An integrated circuit having an optical structure is provided. The integrated circuit includes a semiconductor substrate and a plurality of light guiding pattern layers. The light guiding pattern layers are located above the semiconductor substrate, and each of the light guiding pattern layers has a plurality of openings and a plurality of side wall portions corresponding to the openings. Each of the side wall portions surrounds the corresponding opening. A projection of one of the openings of one of the light guiding pattern layers on the semiconductor substrate at least partially overlaps a projection of one of the openings of the adjacent light guiding pattern layer on the semiconductor substrate, so as to form at least one light via hole and allow external light to be transferred to the semiconductor substrate through the light guiding pattern layers.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: October 20, 2020
    Assignee: Guangzhou Tyrafos Semiconductor Technologies Co., LTD
    Inventors: Jia-Shyang Wang, Ping-Hung Yin, Hsu-Wen Fu, Chun-Yu Lee
  • Publication number: 20200150449
    Abstract: An optical identification module including a sensor and a collimator is provided. The sensor has a plurality of sensing regions. The collimator is disposed on the plurality of sensing regions, and the collimator includes a transparent substrate, a first light shielding layer, and a plurality of microlenses. The first light shielding layer includes a plurality of first openings. The plurality of microlenses are disposed on a first surface of the transparent substrate, and the plurality of microlenses correspond to the plurality of first openings respectively.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., LTD
    Inventors: Chun-Yu Lee, Hsu-Wen Fu
  • Publication number: 20200139350
    Abstract: The present disclosure provides a method for fabricating a heterogeneous nickel-based catalyst on an aluminum oxide support. The method includes a solution preparation step, a drop-cast step, a first calcining step, and a second calcining step. The solution preparation step is provided for preparing a precursor solution. The drop-cast step is provided for dropping the precursor on the support. The first calcining step is provided for obtaining an oxidation state catalyst. The second calcining step is provided for obtaining the heterogeneous nickel-based catalysts on aluminum oxide support.
    Type: Application
    Filed: May 9, 2019
    Publication date: May 7, 2020
    Inventors: De-Hao Tsai, Hung-Yen Chang, Guan-Hung Lai, Chih-Yuan Lin, Chun-Yu Lee, Chih-Cheng Chia, Chuen-Lih Hwang, Huan-Ming Chang
  • Publication number: 20200058522
    Abstract: In an embodiment, a method includes: spinning a wafer around an axis of rotation at a center of the wafer; applying a first stream of liquid along a line starting from an initial point on the wafer adjacent to the center of the wafer, through the center of the wafer, and ending at an edge of the wafer; applying a second stream of liquid to an inner third of the line starting at the initial point and ending at a boundary point; applying a third stream of liquid to a middle third of the line starting at the boundary point; applying a fourth stream of liquid to an outer third of the line ending at the edge of the wafer; applying a fifth stream of liquid along the line starting from the initial point and ending at the edge of the wafer; and applying a stream of gas along the line starting from the initial point and ending at the edge of the wafer.
    Type: Application
    Filed: August 13, 2019
    Publication date: February 20, 2020
    Inventors: Chun-Yu LEE, Sen-Yeo PENG, Chui-Ya PENG
  • Publication number: 20200042762
    Abstract: An electronic device and a fingerprint sensing method are provided. The electronic device includes a display panel, a fingerprint sensor, and an integrated driver chip. The display panel includes a plurality of pixel units arranged in an array. The integrated driver chip integrates a display driver circuit and a fingerprint sensing circuit. When the pixel units of the display panel are in an undriven state and a finger object is in contact with a sensing area of the display panel to perform a fingerprint unlock operation, the display driver circuit drives at least a portion of the pixel units corresponding to the sensing area, so that at least a portion of the pixel units provide illumination light to the sensing area. The fingerprint sensing circuit drives the fingerprint sensor to capture a fingerprint feature image of the finger object.
    Type: Application
    Filed: January 30, 2019
    Publication date: February 6, 2020
    Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., LTD
    Inventors: Hsu-Wen Fu, Ping-Hung Yin, Jia-Shyang Wang, Chun-Yu Lee
  • Publication number: 20200042765
    Abstract: An under-screen fingerprint identification device includes an image sensing element, a display element, an optical lens, and a band pass filter element. The band pass filter element is disposed between the image sensing element and the display element. An object to be identified reflects an initial beam to generate a sensing beam, and the sensing beam is transmitted to the image sensing element through the display element, the optical lens, and the band pass filter element. The band pass filter element allows a beam with a specific wavelength range to pass. The specific wavelength range and a wavelength range of the initial beam are partially overlapped.
    Type: Application
    Filed: June 27, 2019
    Publication date: February 6, 2020
    Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., LTD
    Inventors: Chun-Yu Lee, Hsu-Wen Fu
  • Publication number: 20200026165
    Abstract: A structured light projecting apparatus including a light source module, a beam splitting element, and first and second diffraction optical elements is provided. The light source emits a light beam. The beam splitting element is disposed on a transmission path of the light beam, and splits the light beam into first and second portion light beams. The first diffraction optical element is disposed on a transmission path of the first portion light beam. Multiple light beams are produced after the first portion light beam passes through the first diffraction optical element, so as to form a first structured light. The second diffraction optical element is disposed beside the first diffraction optical element and on a transmission path of the second portion light beam. Multiple light beams are produced after the second portion light beam passes through the second diffraction optical element, so as to form a second structured light.
    Type: Application
    Filed: April 12, 2019
    Publication date: January 23, 2020
    Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., Limited
    Inventors: Hsu-Wen Fu, Chun-Yu Lee, Jun-Wen Chung, Ping-Hung Yin
  • Publication number: 20200012837
    Abstract: An optical identification module including a sensor and a collimator is provided. The sensor has a plurality of sensing regions. The collimator is disposed on the sensing regions, and the collimator includes a transparent substrate and a first light shielding layer. The first light shielding layer is disposed on a first surface of the transparent substrate. The first light shielding layer includes a plurality of first openings. A ratio of a thickness of the first light shielding layer to a width of each of the first openings is greater than 1.
    Type: Application
    Filed: March 25, 2019
    Publication date: January 9, 2020
    Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., LTD
    Inventors: Chun-Yu Lee, Hsu-Wen Fu
  • Patent number: 10514127
    Abstract: A suspension mount is provided, which is adapted to selectively suspend an electronic device on at least one first ceiling structure or at least one second ceiling structure. The suspension mount includes a mount body, a first clip member and a second clip member. The mount body includes a first body connection unit and a second body connection unit, wherein the first body connection unit is located on one side of the mount body, and the second body connection unit is located on another side of the mount body. The first clip member includes a plurality of first member connection portions, a plurality of second member connection portions and a first abutting portion abutting the ceiling structures. The second clip member includes a plurality of third member connection portions, a plurality of fourth member connection portions and a second abutting portion abutting the ceiling structures.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: December 24, 2019
    Assignee: WISTRON NEWEB CORP.
    Inventors: Yu-Shuo Wu, Chun-Yu Lee
  • Publication number: 20190305147
    Abstract: An integrated circuit having an optical structure is provided. The integrated circuit includes a semiconductor substrate and a plurality of light guiding pattern layers. The light guiding pattern layers are located above the semiconductor substrate, and each of the light guiding pattern layers has a plurality of openings and a plurality of side wall portions corresponding to the openings. Each of the side wall portions surrounds the corresponding opening. A projection of one of the openings of one of the light guiding pattern layers on the semiconductor substrate at least partially overlaps a projection of one of the openings of the adjacent light guiding pattern layer on the semiconductor substrate, so as to form at least one light via hole and allow external light to be transferred to the semiconductor substrate through the light guiding pattern layers.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 3, 2019
    Applicant: TYRAFOS Technologies Co., Limited
    Inventors: Jia-Shyang Wang, Ping-Hung Yin, Hsu-Wen Fu, Chun-Yu Lee
  • Patent number: 10365486
    Abstract: A head up display (HUD) includes a housing having an opening, a transmission mechanism disposed in the housing, a cover connected to the transmission mechanism and a drive mechanism configured to drive the transmission mechanism. The cover is movable between a closed position wherein the cover hides the opening and an opened position wherein the cover is located within the housing by the transmission mechanism. While the cover moves from the closed position to the opened position, the cover moves to an intermediate position below the opening in a vertical way, and moves away from the intermediate position below the opening to the opened position in sequence.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: July 30, 2019
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chien-Wei Huang, Chun-Yu Lee, Hui-Ching Tsai
  • Publication number: 20190203881
    Abstract: A suspension mount is provided, which is adapted to selectively suspend an electronic device on at least one first ceiling structure or at least one second ceiling structure. The suspension mount includes a mount body, a first clip member and a second clip member. The mount body includes a first body connection unit and a second body connection unit, wherein the first body connection unit is located on one side of the mount body, and the second body connection unit is located on another side of the mount body. The first clip member includes a plurality of first member connection portions, a plurality of second member connection portions and a first abutting portion abutting the ceiling structures. The second clip member includes a plurality of third member connection portions, a plurality of fourth member connection portions and a second abutting portion abutting the ceiling structures.
    Type: Application
    Filed: September 21, 2018
    Publication date: July 4, 2019
    Inventors: Yu-Shuo WU, Chun-Yu LEE
  • Patent number: 10155252
    Abstract: A semiconductor apparatus is provided. The semiconductor apparatus includes a wafer carrier, and a cup surrounding the wafer carrier. The semiconductor apparatus also includes a bottom washing device located between the wafer carrier and the cup, and configured to spray washing liquid onto the cup. Therefore, the cup can be washed by the bottom washing device.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Yu Lee, Sheng-Hung Lo, Wen-Lung Ho, Wen-Sung Tseng
  • Publication number: 20180157041
    Abstract: A head up display (HUD) includes a housing having an opening, a transmission mechanism disposed in the housing, a cover connected to the transmission mechanism and a drive mechanism configured to drive the transmission mechanism. The cover is movable between a closed position wherein the cover hides the opening and an opened position wherein the cover is located within the housing by the transmission mechanism. While the cover moves from the closed position to the opened position, the cover moves to an intermediate position below the opening in a vertical way, and moves away from the intermediate position below the opening to the opened position in sequence.
    Type: Application
    Filed: August 18, 2017
    Publication date: June 7, 2018
    Inventors: Chien-Wei Huang, Chun-Yu Lee, Hui-Ching Tsai
  • Publication number: 20160322240
    Abstract: A semiconductor apparatus is provided. The semiconductor apparatus includes a wafer carrier, and a cup surrounding the wafer carrier. The semiconductor apparatus also includes a bottom washing device located between the wafer carrier and the cup, and configured to spray washing liquid onto the cup. Therefore, the cup can be washed by the bottom washing device.
    Type: Application
    Filed: April 30, 2015
    Publication date: November 3, 2016
    Inventors: Chun-Yu LEE, Sheng-Hung LO, Wen-Lung HO, Wen-Sung TSENG
  • Patent number: 9472851
    Abstract: A nonplanar antenna embedded package structure and a method of manufacturing the same are introduced. The structure includes a nonplanar antenna component. The nonplanar antenna component comprises an antenna substrate, metal wiring, through-hole, and metal bump. The substrate surface covers the metal wiring. The through-hole penetrates the substrate from the antenna substrate bottom side but does not penetrate the metal wiring, and does not affect its appearance. The metal bump is implanted in the through-hole from the antenna substrate bottom side to join the metal wiring. An electronic component having a copper cable is provided. An end of the copper cable protrudes from the electronic component and is inserted into the through-hole of the antenna component to join the metal bump, thereby forming the nonplanar antenna embedded package structure characterized by: preventing the antenna metal wiring from exposing, and reducing interference otherwise arising from antenna resonance frequency and noise.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: October 18, 2016
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chi-Haw Chiang, Chia-Hua Chang, Chih Wang, Chun-Yu Lee
  • Publication number: 20150345040
    Abstract: A method of manufacturing a nickel-based alloy barrier layer of a wiring connection terminal includes providing a substrate having a metal wiring; electroplating a nickel or a nickel-based alloy to the metal wiring at a deposition rate of 15-30 ?m/hr to form a first layer thereon, wherein the first layer is of a thickness of 0.5 ?m-5 ?m, and the nickel-based alloy layer has nickel content of at least 50%; and plating a gold layer to the first layer to form thereon a second layer of a thickness of 0.03 ?m-0.3 ?m. The surface of the nickel-based alloy electroplated layer features a crystalline-phase structure full of micro-protuberances, and the thickness of the gold plated layer is reduced to 0.03 ?m.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 3, 2015
    Applicant: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: CHI-HAW CHIANG, CHIH WANG, YU-PING WANG, CHUN-YU LEE, REN-RUEY FANG, YANG-KUAO KUO
  • Publication number: 20150345044
    Abstract: A method of electroplating a cobalt alloy to a wiring surface includes providing a substrate having a metal wiring; electroplating a cobalt-based alloy to the metal wiring at a deposition rate of 15-30 ?m/hr to form thereon a cobalt-based alloy electroplated layer 0.5 ?m-5 ?m thick, wherein the main constituent element of the cobalt-based alloy is cobalt; plating gold to the cobalt-based alloy electroplated layer to form thereon a gold plated layer 0.03 ?m-0.3 ?m thick. The surface of the cobalt-based alloy electroplated layer features a crystalline-phase structure full of micro-protuberances, and the thickness of the gold plated layer is reduced to 0.03 ?m.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 3, 2015
    Applicant: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chi-Haw CHIANG, Chih WANG, Yu-Ping WANG, Chun-Yu LEE, Ren-Ruey FANG, Yang-Kuo KUO
  • Publication number: 20150303574
    Abstract: A nonplanar antenna embedded package structure and a method of manufacturing the same are introduced. The structure includes a nonplanar antenna component. The nonplanar antenna component comprises an antenna substrate, metal wiring, through-hole, and metal bump. The substrate surface covers the metal wiring. The through-hole penetrates the substrate from the antenna substrate bottom side but does not penetrate the metal wiring, and does not affect its appearance. The metal bump is implanted in the through-hole from the antenna substrate bottom side to join the metal wiring. An electronic component having a copper cable is provided. An end of the copper cable protrudes from the electronic component and is inserted into the through-hole of the antenna component to join the metal bump, thereby forming the nonplanar antenna embedded package structure characterized by: preventing the antenna metal wiring from exposing, and reducing interference otherwise arising from antenna resonance frequency and noise.
    Type: Application
    Filed: November 24, 2014
    Publication date: October 22, 2015
    Inventors: CHI-HAW CHIANG, CHIA-HUA CHANG, CHIH WANG, CHUN-YU LEE
  • Patent number: 8816707
    Abstract: A misalignment detection device comprising a first substrate, at least one integrated circuit, a second substrate, a third substrate, and at least one detection unit. The at least one integrated is disposed on the first substrate in a first pressing region. The third substrate is disposed on the first substrate in a second pressing region and on the second substrate on the second substrate in a third pressing region. The at least one detection unit outputs a fault signal in response to a positioning shift occurring in at least one of the first, second, and third pressing regions.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: August 26, 2014
    Assignee: Au Optronics Corp.
    Inventors: Chun-Yu Lee, Shih-Ping Chou, Chien-Liang Chen, Wen-Hung Lai