Abstract: A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.

Abstract: A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.

Abstract: A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.

Abstract: A method of fabricating a metal gate electrode of a field effect transistor includes forming a dielectric layer over an active region, and forming an opening in the dielectric layer. The method further includes partially filling the opening with a high-dielectric-constant material, partially filling the opening with a conformal first metal material over the high-dielectric-constant material, and filling the opening with a capping layer over the first metal material. The method further includes partially removing the first metal material and capping layer in the opening using a wet etching process. The method further includes fully removing the remaining capping layer in the opening using a wet etching process. The method further includes depositing a second metal material in the opening over the remaining first metal material, and planarizing the second metal material.

Abstract: An integrated circuit fabrication is disclosed, and more particularly a field effect transistor with a low resistance metal gate electrode is disclosed. An exemplary structure for a metal gate electrode of a field effect transistor comprises a lower portion formed of a first metal material, wherein the lower portion has a recess, a bottom portion and sidewall portions, wherein each of the sidewall portions has a first width; and an upper portion formed of a second metal material, wherein the upper portion has a protrusion and a bulk portion, wherein the bulk portion has a second width, wherein the protrusion extends into the recess, wherein a ratio of the second width to the first width is from about 5 to 10.

Abstract: A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.

Abstract: An integrated circuit fabrication is disclosed, and more particularly a field effect transistor with a low resistance metal gate electrode is disclosed. An exemplary structure for a metal gate electrode of a field effect transistor comprises a lower portion formed of a first metal material, wherein the lower portion has a recess, a bottom portion and sidewall portions, wherein each of the sidewall portions has a first width; and an upper portion formed of a second metal material, wherein the upper portion has a protrusion and a bulk portion, wherein the bulk portion has a second width, wherein the protrusion extends into the recess, wherein a ratio of the second width to the first width is from about 5 to 10.

Abstract: A novel heat assisted magnetic recording (HAMR) medium and the fabrication method therefor are provided. The exchange coupling effect occurring at the interface of FePt/CoTb double layers is adopted, and thus the resulting magnetic flux would be sufficient enough to be detected and readout under the room temperature. The provided HAMR medium exhibits a relatively high saturation magnetization and perpendicular coercivity, and thus possesses a great potential for the ultra-high density recording application.

Abstract: An active start judgment circuit is electrically connected to an AC/DC transforming power supply which has at least one standby power unit to transform AC to DC in regular conditions and a main power unit to transform the AC to the DC in an ON condition for operation of an electronic equipment. The start judgment circuit bridges the standby power unit and the main power unit, and generates a reference potential based on a voltage output from the standby power unit, and gets a power signal from the standby power unit to be compared with the reference potential to output a start signal to the main power unit to transform the AC to the DC. Thus the standby power unit can actively drive the main power unit to supply DC power to activate the electronic equipment.

Abstract: A novel heat assisted magnetic recording (HAMR) medium and the fabrication method therefor are provided. The exchange coupling effect occurring at the interface of FePt/CoTb double layers is adopted, and thus the resulting magnetic flux would be sufficient enough to be detected and readout under the room temperature. The provided HAMR medium exhibits a relatively high saturation magnetization and perpendicular coercivity, and thus possesses a great potential for the ultra-high density recording application.

Abstract: An active start judgment circuit is electrically connected to an AC/DC transforming power supply which has at least one standby power unit to transform AC to DC in regular conditions and a main power unit to transform the AC to the DC in an ON condition for operation of an electronic equipment. The start judgment circuit bridges the standby power unit and the main power unit, and generates a reference potential based on a voltage output from the standby power unit, and gets a power signal from the standby power unit to be compared with the reference potential to output a start signal to the main power unit to transform the AC to the DC. Thus the standby power unit can actively drive the main power unit to supply DC power to activate the electronic equipment.

Abstract: A novel heat assisted magnetic recording (HAMR) medium and the fabrication method therefor are provided. The exchange coupling effect occurring at the interface of FePt/CoTb double layers is adopted, and thus the resulting magnetic flux would be sufficient enough to be detected and readout under the room temperature. The provided HAMR medium exhibits a relatively high saturation magnetization and perpendicular coercivity, and thus possesses a great potential for the ultra-high density recording application.

Abstract: A method for fabricating an L10 alloy film is provided. The method includes steps of (a) providing a substrate; (b) heating the substrate as a preheated substrate at a first temperature ranged from 100° C. to 600° C. for a time period ranged from 5 minutes to 120 minutes, and then cooling the substrate to room temperature in the sputtering chamber; (c) depositing an alloy film on the preheated substrate; and (d) annealing the alloy film at a second temperature ranged from 200° C. to 500° C. to form the alloy film.

Abstract: The present invention includes that using single layer amorphous CoTbAg thin films as heat assisted magnetic recording (HAMR) media, and the method for producing these CoTbAg amorphous thin films. Co69.48?XTb30.52AgX films with x=0˜25.68 at. % are fabricated by DC or RF magnetron sputtering and rotating substrate. Two kinds of targets can be used. One is the CoTbAg alloy target. The other one consists of Co, Tb and Ag three targets. The CoTbAg film is prepared by co-sputtering of Co, Tb and Ag targets. The film composition can be controlled by changing the sputtering power density of each target. CoTbAg films are deposited on glass substrate or nature-oxide silicon wafer at room temperature. These films have high saturation magnetization and high perpendicular coercivity. They have amorphous structure and can be applied to HAMR media.