Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.

Abstract: An antenna structure is disposed on a heat sink. The heat sink includes a plurality of cooling fins. The antenna structure includes a feeding source, a connecting member connected to the feeding source, and an antenna unit. The feeding source is located between two of the adjacent cooling fins. The antenna unit includes a radiation portion connected to the connecting member, a first segment, a second segment, and a third segment. The first segment and the second segment are connected to the radiation portion. The second segment is arranged in alignment with the first segment and a distance apart from the cooling fins. The third segment is connected to the feeding source and overlaps with at least one of the cooling fins.

Abstract: The present disclosure provides a wireless communication system including a first host computer, a communication dongle, a second host computer and an input device. The communication dongle is connected to the first host computer via a USB interface, connected to the second host computer via a Bluetooth interface, and connected to the input device via a RF interface. The first host computer has first application software for intercepting the operating signal(s) of the input device and transferring, via the communication dongle, to the second host computer to be executed thereby. The first application software also controls the first host computer to ignore the operating signal(s) during the operating signal(s) is being transferred to the second host computer.

Abstract: An apparatus may comprise a memory communicatively coupled to a processor. The processor may be configured to receive a request to perform multiple data processing operations and determine multiple sub-dialogues corresponding to the request. The sub-dialogues are part of a plurality of IVR operations. The processor may be further configured to route the request to a microservice of the microservices based at least in part upon the sub-dialogues. The microservice may be configured to fulfill the request. The processor may generate a response to the request associated with the microservice, update publishing commands in accordance with one or more rules and policies in response to generating the response, and publish the first microservice. The publishing commands associated with the microservice may be updated in isolation from the rest of the microservices.

Abstract: A prismatic battery having a first electrode stack, second electrode stack and a thermal barrier disposed between the first and second electrode stack. The first electrode stack has a first anode, a first cathode and a first separator disposed between the first anode and the first cathode. The second electrode stack has a second anode, a second cathode and a second separator disposed between the second anode and the second cathode. The first electrode stack, the thermal barrier and the second electrode stack form a first cell or stack assembly. The first stack assembly is disposed within an interior of a housing containing an electrolyte.

Abstract: A memory cell structure includes a transistor structure and a capacitor structure, where the capacitor structure includes a hydrogen absorption layer. The hydrogen absorption layer absorbs hydrogen, which prevents or reduces the likelihood of the hydrogen diffusing into an underlying metal-oxide channel of the transistor structure. In this way, the hydrogen absorption layer minimizes and/or reduces the likelihood of hydrogen contamination in the metal-oxide channel, which may enable a low current leakage to be achieved for the memory cell structure and reduces the likelihood of data corruption and/or failure of the memory cell structure, among other examples.

Abstract: A lateral-bipolar junction transistor (BJT) including a semiconductor substrate, an insulator region disposed on the semiconductor substrate, and a well region comprising a well semiconductor of a first conductivity type disposed over the insulator region. An emitter region of a second conductivity type is disposed in the well region, and at least one collector region of a second conductivity type is disposed in the well region. A T shaped, Pi shaped or H shaped gate and gate oxide layer includes a gate portion extending between the emitter region and one or more collector regions, and a base is disposed underneath the gate portion. In other embodiments, a metal oxide semiconductor (MOS) transistor-based circuit similarly employs a compact Pi or H shaped gate and gate oxide layer.

Abstract: The disclosure provides a viewing angle control module including a first liquid crystal panel, a first polarizer, a second polarizer, and a phase retarder. The first liquid crystal panel includes a first substrate, a second substrate, a first alignment layer, a second alignment layer, a first liquid crystal layer, a first electrode layer, and a second electrode layer. A second alignment direction of the second alignment layer is antiparallel to a first alignment direction of the first alignment layer. The first electrode layer has multiple electrode patterns arranged at intervals along a first direction and extending along a second direction. A first absorption axis of the first polarizer is perpendicular to a second absorption axis of the second polarizer. An included angle between the first absorption axis and the first alignment direction is 45 degrees. A display apparatus including the viewing angle control module is also provided.

Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: An operation method of an email security system comprises the steps of: configuring security threat information synchronization data by synchronizing targeted email security threat information configured by performing a targeted email security threat inspection on an inbound mail with targeted email security threat information configured by performing a targeted email security threat inspection on an outbound mail; performing a targeted email security threat inspection corresponding to a new inbound mail or a new outbound mail using the security threat information synchronization data; and performing a targeted email security threat response process according to the targeted email security threat inspection of the new inbound mail or the new outbound mail.

Abstract: The present invention relates to an email security system and an operation method thereof for blocking and responding to targeted email attacks, which perform inspection of unauthorized email server access attack, and the method comprises the steps of: configuring security threat information synchronization data by synchronizing targeted email security threat information configured by performing a targeted email security threat inspection on an inbound mail with targeted email security threat information configured by performing a targeted email security threat inspection on an outbound mail; performing a targeted email security threat inspection corresponding to a new inbound mail or a new outbound mail using the security threat information synchronization data; and performing a targeted email security threat response process according to the targeted email security threat inspection of the new inbound mail or the new outbound mail, wherein the targeted email security threat inspection includes an unauthoriz

Abstract: According to an embodiment of the present invention, there is provided an operation method of a mail security device that configures a security network of a mail access security system and includes a security threat inspection unit for performing a security threat inspection corresponding to an inbound mail, and a mail processing unit for transferring the mail for which the security threat inspection has been completed to a mail server in the security network.

Abstract: A method for forming a semiconductor structure includes following operations. A first metallization feature is formed, and a first cap layer is formed over the first metallization feature. A first insulating layer is formed over the first cap layer and the first metallization feature. A first dielectric structure is formed over the first insulating layer. A portion of the first dielectric structure and a portion of the first insulating layer are removed to expose the first cap layer. A second cap layer is formed over the first cap layer and the first metallization feature. A second insulating layer and a patterned second dielectric structure are formed over the substrate. The patterned second dielectric structure includes a trench and a via opening coupled to a bottom of the trench. A second metallization feature is formed in the trench, and a via structure is formed in the via opening.

Abstract: A memory controller includes a scrub control circuit configured to generate a scrub command for instructing a scrub operation; and an address generation circuit configured to generate a scrub address having an address sequence in which a first column bit group of a column address, a row address, and a second column bit group of the column address are sequentially allocated from a least significant bit (LSB) to a most significant bit (MSB), and change a value of the scrub address according to the scrub command.

Abstract: A seismically suspended isolation device is installed in a suspended configuration at a fixed end and comprises a first support module, a second support module, a first displacement suppressing module and a second displacement suppressing module. The first support module includes a first fixing element, a first moving element, and at least one first roller. The first roller is disposed between the first fixing element and the first moving element. The second support module includes a second fixing element, a second moving element, and at least one second roller. The second roller is disposed between the second fixing element and the second moving element. The first support module and the second support module are stacked together in an orthogonal manner, so that the seismically suspended isolation device generates motion in the first direction and the second direction when the seismically suspended isolation device subjected to an external force.

Abstract: The present disclosure provides a method for removing particles. The method includes: receiving a pellicle including a pellicle membrane, wherein a particle is disposed on the pellicle membrane; passing a light beam through an object lens, wherein the light beam is focused on a focal region in front of the pellicle membrane by the object lens, and the particle is attracted to be trapped at the focal region; and removing the particle from the pellicle membrane at the focal region.

Abstract: Examples of an integrated circuit with a capacitor structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a substrate and a trench isolation material disposed on the substrate. An isolation structure is disposed on the trench isolation material. A first electrode disposed on the isolation structure, and a second electrode disposed on the isolation structure. A capacitor dielectric is disposed on the isolation structure between the first electrode and the second electrode. In some such examples, the isolation structure includes a first hard mask disposed on the trench isolation material, a dielectric disposed on the first hard mask, and a second hard mask disposed on the dielectric.

Abstract: The present disclosure provides a wireless communication system including a first host computer, a communication dongle, a second host computer and an input device. The communication dongle is connected to the first host computer via a USB interface, connected to the second host computer via a Bluetooth interface, and connected to the input device via a RF interface. The first host computer has first application software for intercepting the operating signal(s) of the input device and transferring, via the communication dongle, to the second host computer to be executed thereby. The first application software also controls the first host computer to ignore the operating signal(s) during the operating signal(s) is being transferred to the second host computer.

Abstract: An automatic processing device for liquid samples includes a sample region, a control module, an image identification device and a centrifuge. The sample region is configured to accommodate a plurality of centrifuge tubes. The control module includes a mechanical module. The mechanical module is configured to unscrew or tighten upper caps of the centrifuge tubes, and is configured to draw liquid from the centrifuge tubes or discharge liquid to the centrifuge tubes. The image identification device is coupled to the control module. The centrifuge is coupled to the control module. The centrifuge is configured to accommodate the centrifuge tubes and perform centrifugal treatment.

Abstract: The present disclosure provides a voice coil structure, a method for manufacturing the voice coil structure, and a loudspeaker. The voice coil structure includes a first insulation layer, a first wiring layer, a second insulation layer, at least one second wiring layer, and a third insulation layer. The second insulation layer extends to wiring gaps of the first wiring layer. The third insulation layer extends to wiring gaps of the at least one second wiring layer. Each of the first wiring layer and the at least one second wiring layer has a winding structure. The first wiring layer is electrically connected in series or in parallel with the at least one second wiring layer and forming two output terminals.