Abstract: A pseudo resistor with tunable resistance including a first transistor and a second transistor is provided. The first transistor has a first terminal, a second terminal and a control terminal. The first terminal of the first transistor serves as a first terminal of the pseudo resistor. The control terminal of the first transistor receives a control voltage. The first transistor is controlled by the control voltage, such that the first transistor operates in a weak inversion region. The second transistor has a first terminal, a second terminal and a control terminal. The first terminal of the second transistor is coupled to the second terminal of the first transistor. The second terminal of the second transistor and the control terminal of the second transistor are coupled to each other to serve as a second terminal of the pseudo resistor with tunable resistance. The second transistor operates in the weak inversion region.

Abstract: A lithium battery control circuit and a lithium battery charger are provided. The lithium battery charger includes the lithium battery control circuit. The lithium battery control circuit includes a smooth transition circuit and an off-time control circuit. The smooth transition circuit generates a first voltage according to a sense current signal and a feedback signal, and generates a second voltage according to a mode signal. The smooth transition circuit compares the first voltage with the second voltage to generate a reset signal. The off-time control circuit converts the feedback signal to generate a first current by a voltage-to-current mechanism, and generates a set signal by using the first current and a duty ratio signal. The invention can prevent a surge current and an oscillation phenomenon by the smooth transition circuit. A switching frequency and a ripple size of an output current are controlled by the off-time control circuit.

Abstract: A semiconductor structure includes a wafer comprising a plurality of viewing fields defined thereon, a plurality of dies defined by a scribe line formed in each viewing field, a plurality of mark patterns formed in the scribe line, and a plurality of anchor pattern respectively formed in the review fields, the anchor patterns being different from the mark patterns.

Abstract: A digital to analog converter is provided, including a buffer circuit, a current switch circuit, and a weighted current generating circuit. The buffer circuit receives an N-bit digital signal and a clock signal, accordingly outputs N switch control signals. The current switch circuit includes N switches which are connected or disconnected according the switch control signals. The weighted current generating circuit includes M current source arrays, where each current source array outputs K output currents. Current values of each output current of each current source array respectively ascend in a binary-weighted manner. A minimum output current of an mth current source array is two times of a maximum output current of a (m?1)th current source array, N is obtained by multiplying M by K, and 1?m?M. An output of the digital to analog converter is a total current value of the output currents outputted by the M current source arrays.

Abstract: A test structure for electron beam inspection and a method for defect determination using electron beam inspection are provided. The test structure for electron beam inspection includes a semiconductor substrate, at least two conductive regions disposed on the semiconductor substrate, a connection structure disposed on the two conductive regions, and a cap dielectric layer disposed on the connection structure. The method for defect determination using the electron beam inspection includes the following steps. An electron beam inspection is preformed to a test structure with an instant detector and a lock-in amplifier. Signals received by the detector within a period of time are amplified by the lock-in amplifier. A defect in the test structure is determined by monitoring the signals received by the detector and amplified by the lock-in amplifier. The inspection accuracy is improved by the test structure and the method for defect determination in the present invention.

Abstract: A test structure for electron beam inspection and a method for defect determination using electron beam inspection are provided. The test structure for electron beam inspection includes a semiconductor substrate, at least two conductive regions disposed on the semiconductor substrate, a connection structure disposed on the two conductive regions, and a cap dielectric layer disposed on the connection structure. The method for defect determination using the electron beam inspection includes the following steps. An electron beam inspection is preformed to a test structure with an instant detector and a lock-in amplifier. Signals received by the detector within a period of time are amplified by the lock-in amplifier. A defect in the test structure is determined by monitoring the signals received by the detector and amplified by the lock-in amplifier. The inspection accuracy is improved by the test structure and the method for defect determination in the present invention.

Abstract: A charging structure including a power supply device, a rechargeable battery and a charging management device is provided. The power supply device is configured to provide a system voltage. The charging management device is configured to switch a corresponding charging mode according to the voltage level of the positive end of the rechargeable battery. The charging management device stops charging action when a charging current for charging the rechargeable battery drops down to a pre-set current value.

Abstract: A charging structure including a power supply device, a rechargeable battery and a charging management device is provided. The power supply device is configured to provide a system voltage. The charging management device is configured to switch a corresponding charging mode according to the voltage level of the positive end of the rechargeable battery. The charging management device stops charging action when a charging current for charging the rechargeable battery drops down to a pre-set current value.

Abstract: Voltage controlled oscillators are disclosed. The voltage controlled oscillator includes an inductive circuit, a cross-coupled N-type transistor pair, and a cross-coupled P-type transistor pair. The inductive circuit includes two inductive windings stacked together, and is configured to generate a pair of differential resonance signals. The cross-coupled N-type transistor pair is coupled in series with the inductive circuit, and configured to receive the pair of differential resonance signals to generate a first oscillation signal. The cross-coupled P-type transistor pair is coupled in series with the inductive circuit, and configured to receive the pair of differential resonance signals to generate a second oscillation signal. The first oscillation signal and second oscillation signal include substantially the same frequency and are out-of-phase to each other.

Abstract: A digital-to-analog conversion device is disclosed. The digital-to-analog conversion device comprises a variable delay buffer circuit and a plurality of synchronization circuits. The buffer circuit receives a digital signal with a plurality of bits and sequentially outputs a plurality of first complementary digital signal sets delayed according to the order of from MSB to LSB. Each synchronization circuit receives the first complementary digital signal set and a clock signal, uses the clock signal as the timing reference of the first complementary digital signal set, and outputs a second complementary digital signal set corresponding to the first complementary digital signal set to a digital-to-analog conversion unit, so as to convert the second complementary digital signal sets into an analog signal. The present invention uses the delays respectively corresponding to different input bits to control the timing of current switches, whereby the transient glitches are reduced.

Abstract: The present invention relates to a digital-to-analog converter comprising a differentiation circuit, a conversion circuit, and an integration circuit. The differentiation circuit receives and differentiates a digital signal for producing a differentiation signal. The conversion circuit is coupled to the differentiation circuit. It receives the differentiation signal and produces a conversion signal according to a clock signal and the differentiation signal. The integration circuit is coupled to the conversion circuit. It receives and integrates the conversion signal for producing an analog signal. Thereby, the purpose of reducing distortion noises can be achieved.

Abstract: A digital-to-analog conversion device is disclosed. The digital-to-analog conversion device comprises a variable delay buffer circuit and a plurality of synchronization circuits. The buffer circuit receives a digital signal with a plurality of bits and sequentially outputs a plurality of first complementary digital signal sets delayed according to the order of from MSB to LSB. Each synchronization circuit receives the first complementary digital signal set and a clock signal, uses the clock signal as the timing reference of the first complementary digital signal set, and outputs a second complementary digital signal set corresponding to the first complementary digital signal set to a digital-to-analog conversion unit, so as to convert the second complementary digital signal sets into an analog signal. The present invention uses the delays respectively corresponding to different input bits to control the timing of current switches, whereby the transient glitches are reduced.

Abstract: A current mode dual-slope temperature-to-digital conversion device is disclosed. The conversion device comprises a temperature dependent current source and a reference current source. Firstly, a capacitor is charged by the temperature dependent current source. Next, the capacitor is discharged by the reference current source. The capacitor is coupled to at least one trigger, and the trigger sends out a first digital signal to a logic controller by the voltage of the capacitor. Then, the logic controller sends out a second digital signal to a time-to-digital converter according to the first digital signal. When the capacitor is discharged by the reference current source and before the first digital signal is varied, the converter receives the second digital signal and a clock signal to generate a corresponding digital output value.

Abstract: A current mode dual-slope temperature-to-digital conversion device is disclosed. The conversion device comprises a temperature dependent current source and a reference current source. Firstly, a capacitor is charged by the temperature dependent current source. Next, the capacitor is discharged by the reference current source. The capacitor is coupled to at least one trigger, and the trigger sends out a first digital signal to a logic controller by the voltage of the capacitor. Then, the logic controller sends out a second digital signal to a time-to-digital converter according to the first digital signal. When the capacitor is discharged by the reference current source and before the first digital signal is varied, the converter receives the second digital signal and a clock signal to generate a corresponding digital output value.

Abstract: The present invention relates to a digital-to-analog converter comprising a differentiation circuit, a conversion circuit, and an integration circuit. The differentiation circuit receives and differentiates a digital signal for producing a differentiation signal. The conversion circuit is coupled to the differentiation circuit. It receives the differentiation signal and produces a conversion signal according to a clock signal and the differentiation signal. The integration circuit is coupled to the conversion circuit. It receives and integrates the conversion signal for producing an analog signal. Thereby, the purpose of reducing distortion noises can be achieved.