Patents by Inventor Chung Chih Wang
Chung Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9257338Abstract: The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.Type: GrantFiled: February 6, 2015Date of Patent: February 9, 2016Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chung-Chih Wang, Pei-Jer Tzeng, Cha-Hsin Lin, Tzu-Kun Ku
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Publication number: 20150155204Abstract: The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.Type: ApplicationFiled: February 6, 2015Publication date: June 4, 2015Inventors: CHUNG-CHIH WANG, PEI-JER TZENG, CHA-HSIN LIN, TZU-KUN KU
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Publication number: 20140175614Abstract: A wafer stacking structure includes a first wafer and a second wafer. The first wafer includes a first through silicon via (TSV) opening and a first TSV filling portion formed in the first TSV opening and including a concave structure. The second wafer includes a second TSV opening and a second TSV filling portion formed in the second TSV opening and including a convex structure. A front surface of the first wafer faces a front surface of the second wafer, and the convex structure of the second TSV filling portion is inserted into the concave structure of the first TSV filling portion.Type: ApplicationFiled: December 20, 2012Publication date: June 26, 2014Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: CHUNG-CHIH WANG, CHA-HSIN LIN, TZU-KUN KU
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Publication number: 20120133030Abstract: The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.Type: ApplicationFiled: December 15, 2010Publication date: May 31, 2012Applicant: Industrial Technology Research InstituteInventors: Chung-Chih Wang, Pei-Jer Tzeng, Cha-Hsin Lin, Tzu-Kun Ku
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Publication number: 20120127625Abstract: A trench capacitor structure is provided. The trench capacitor structure includes a substrate, a trench formed in the substrate, a plurality of scallops formed in the sidewalls of the trench, and at least one capacitor formed within at least one of the scallops. The disclosure also provides a method of manufacturing the trench capacitor structure.Type: ApplicationFiled: December 13, 2010Publication date: May 24, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chung-Chih Wang, Tzu-Kun Ku, Cha-Hsin Lin, Pei-Jer Tzeng, Chi-Hon Ho
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Patent number: 7554836Abstract: A data write in control circuit for magnetic random access memory is configured with a first transistor, a second transistor connected to the first transistor, a transmission gate connected to the first transistor, a comparator having two input terminal connected to the first transistor, a storage capacitor having one end connected to the first transistor and the other end connected to a power source or a ground, and a logic circuit having one end connected to the output terminal of the comparator and the other end receiving data to be written in.Type: GrantFiled: December 28, 2007Date of Patent: June 30, 2009Assignee: Industrial Technology Research InstituteInventors: Young-Shying Chen, Chung-Chih Wang, Chia-Pao Chang, Chien-Chung Hung
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Publication number: 20090010087Abstract: A data write in control circuit for magnetic random access memory is configured with a first transistor, a second transistor connected to the first transistor, a transmission gate connected to the first transistor, a comparator having two input terminal connected to the first transistor, a storage capacitor having one end connected to the first transistor and the other end connected to a power source or a ground, and a logic circuit having one end connected to the output terminal of the comparator and the other end receiving data to be written in.Type: ApplicationFiled: December 28, 2007Publication date: January 8, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Young-Shying CHEN, Chung-Chih WANG, Chia-Pao CHANG, Chien-Chung HUNG
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Patent number: 6707979Abstract: An optical loop-back attenuator (2) includes a frame (22), a cover (21) attached to the frame, an optical fiber (24), an optical fiber fixture (23) retaining and fixing the optical fiber, and two SC plug connectors (25) receiving and retaining opposite ends of the optical fiber therein. The frame and the cover cooperate to fittingly receive the optical fiber, the optical fiber fixture and portions of the SC plug connectors therein. The optical fiber has a bent part (242) which is configured to be semicircular or to have another suitable shape that achieves a desired attenuation.Type: GrantFiled: December 27, 2001Date of Patent: March 16, 2004Assignee: Hon Hai Precision Ind. Co., Ltd.Inventors: Chung-Chih Wang, Yao-Hao Chang
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Patent number: 6636682Abstract: An electrical variable optical attenuator includes a housing (1), a cover (2), an optical module (3), and a shifting device (4). The optical module comprises a reflective device (31), a graded transmittance filter (32), a filter carrier (33), and a container (38). The reflective device is an integrated piece comprising a first reflective plane (311), a second reflective plane (312), and an opening (313) movably accommodating the graded transmittance filter therein. The first and the second reflective planes are substantially perpendicular to each other. Because the first and second reflective planes are integrally formed on the reflective device, the attenuator is relatively easy to assemble. In addition, the attenuator is able to operate reliably in rugged conditions, including applications where the attenuator may be subjected to vibration, shock or extreme temperatures.Type: GrantFiled: December 28, 2001Date of Patent: October 21, 2003Assignee: Hon Hai Precision Ind. Co., Ltd.Inventors: Chung-Chih Wang, Yao-Hao Chang, Kun-Tsan Wu
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Publication number: 20030123838Abstract: An optical loop-back attenuator (2) includes a frame (22), a cover (21) attached to the frame, an optical fiber (24), an optical fiber fixture (23) retaining and fixing the optical fiber, and two SC plug connectors (25) receiving and retaining opposite ends of the optical fiber therein. The frame and the cover cooperate to fittingly receive the optical fiber, the optical fiber fixture and portions of the SC plug connectors therein. The optical fiber has a bent part (242) which is configured to be semicircular or to have another suitable shape that achieves a desired attenuation.Type: ApplicationFiled: December 27, 2001Publication date: July 3, 2003Inventors: Chung-Chih Wang, Yao-Hao Chang
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Publication number: 20030118314Abstract: A variable optic attenuator includes a carrier movable in a longitudinal direction and a variable neutral density filter mounted to the carrier. A stepping motor is drivingly coupled to the carrier for reciprocally moving the filter. The carrier is coupled to a variable electric resistor for generating a feedback signal for controlling the stepping motor. A mount defines a channel in which the filter moves. The mount has two reference surfaces perpendicular to each other and 45 degree inclined with respect to the primary direction. Two mirrors are securely attached to the reference surfaces. The mount defines two bores parallel to the longitudinal direction. The bores receive and retain input and output optic fibers in precise alignment with the mirrors. A passage is formed between the mirrors and extends in a lateral direction perpendicular to the longitudinal direction and further extends through the filter.Type: ApplicationFiled: December 21, 2001Publication date: June 26, 2003Inventors: Chung-Chih Wang, Yao-Hao Chang
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Publication number: 20030081927Abstract: An electrical variable optical attenuator includes a housing (1), a cover (2), an optical module (3), and a shifting device (4). The optical module comprises a reflective device (31), a graded transmittance filter (32), a filter carrier (33), and a container (38). The reflective device is an integrated piece comprising a first reflective plane (311), a second reflective plane (312), and an opening (313) movably accommodating the graded transmittance filter therein. The first and the second reflective planes are substantially perpendicular to each other. Because the first and second reflective planes are integrally formed on the reflective device, the attenuator is relatively easy to assemble. In addition, the attenuator is able to operate reliably in rugged conditions, including applications where the attenuator may be subjected to vibration, shock or extreme temperatures.Type: ApplicationFiled: December 28, 2001Publication date: May 1, 2003Inventors: Chung-Chih Wang, Yao-Hao Chang, Kun-Tsan Wu
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Patent number: 6471919Abstract: An apparatus for removing fluorinated and chlorinated compounds contained in waste gas streams from semiconductor etch and deposition processes. The apparatus has a treatment chamber in which a plurality of liquid films are formed to absorb the fluorinated and chlorinated compounds contained in the waste gas streams that pass through the liquid films. The apparatus includes a tank for receiving the mixture of the absorbed fluorinated and chlorinated compounds and the liquid, and a dehumidifying device for stabilizing and dehumidifying the humidified waste gas streams.Type: GrantFiled: May 16, 2001Date of Patent: October 29, 2002Assignee: Winbond Electronics Corp.Inventors: Chung-Chih Wang, Jerry Sun, Wu-Chung Wen
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Publication number: 20010027801Abstract: The present invention relates to a pipe cleaner comprising a sprayer (2), a circulating device (3) and a gas-conducting device (4) which are used to clean cakes (100) adhered on the inner wall (10) of the exhaust pipe (1). The sprayer (2) is equipped with nozzles (20) uniformly mounted on the pipe (1) and disposed with its opening faced to the inner wall (10) of the pipe (1). The working fluid (W1) is outputted by the nozzles (20) and flushed on the inner wall (10) of the pipe (1). The energized working fluid (W1) worked on the inner wall (10) generates lots of bubbles and disturbing current flushing on cakes (100) adhered on the inner wall (10) of the pipe (1). With continuous fluid (W1) flushing on cakes (100) adhered on the inner wall (10) and the gas (400) running in the pipe (1), therefore, cakes (100) adhered on the inner wall (100) of the pipe (1) can be removed away quickly.Type: ApplicationFiled: January 19, 2001Publication date: October 11, 2001Applicant: Winbond Electronics Corp.Inventor: Chung-Chih Wang
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Patent number: 6263535Abstract: The present invention provides a scrubbing device retractably movable into a pipe to effectively separate caking from the pipe. The scrubber comprises a plurality of metal brush wheels or is provided with bristles. The scrubber is moved into the pipe by a flexible rod, and the rod can be retractably and automatically received in a chamber by a winding machine therein. Each of the brush wheels can be formed with a plurality of helical teeth located on the circumference thereof. The caking adhered on the inner wall of the pipe can be cleanly scrubbed away by the teeth, and then the removed caking and its ashes can be effectively expelled out of the pipe by the suction of a vacuum cleaner.Type: GrantFiled: August 4, 1999Date of Patent: July 24, 2001Assignee: Winbond Electronics Corp.Inventor: Chung Chih Wang
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Patent number: 6093228Abstract: A method and a device for collecting by-products individually, applied to the semiconductor manufacture factory, is disclosed. The device, adapted to be used to filter a fluid accompanied with an object, for retaining the object therein includes a body, an entrance provided on an upper portion of the body for enabling the fluid to flow into the body, a powder trap mounted in the body for filtering the fluid to retain the object therein, a guiding device mounted in the body for guiding the fluid to pass the powder trap, and an exit provided on a lower portion of the body for enabling the filtered fluid to flow out. The advantages of the present invention have: (a) preventing the by-products from being reacted with each other resulting in a fire; (b) preventing the low vacuum tube from being chocked by by-products; and (c) collecting the by-products individually.Type: GrantFiled: November 18, 1998Date of Patent: July 25, 2000Assignee: Winbond Electronics Corp.Inventor: Chung-Chih Wang
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Patent number: 5946568Abstract: A solid state memory fabrication method of DRAM chips with a self-alignment of field plate/BL isolation process includes using oxide-poly-oxide etch followed by oxidation or sidewall deposition (LPTEOS) to isolate the field plate and BL. This process uses a first etchant and a second etchant in etching the BL/N.sup.+ contact in the fabrication process. During the etch of BL/N.sup.+ contact (2C etch), a low selectivity etchant etches away Ploy-3 first. This first etchant is applied for approximately one hundred eighty seconds. And then a second etchant process is performed using a high Si selectivity etchant, which etches a way the residual oxide. The second etchant is applied for approximately ninety seconds. The exposed poly on the sidewall is isolated from the contact hole by oxidation or deposition (LPTEOS). The oxide formed on the substrate during oxidation is etched away by anisotropic etch. The self-alignment of BL/3P is thus achieved.Type: GrantFiled: May 17, 1996Date of Patent: August 31, 1999Assignee: Mosel Vitelic, Inc.Inventors: Chia-Shun Hsiao, Wei-Jing Wen, Wen-Jeng Lin, Chung-Chih Wang
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Patent number: D545892Type: GrantFiled: November 28, 2005Date of Patent: July 3, 2007Assignee: Lite-On Technology CorporationInventor: Chung-Chih Wang