TSV SUBSTRATE STRUCTURE AND THE STACKED ASSEMBLY THEREOF
The disclosure provides a TSV substrate structure and the stacked assembly of a plurality of the substrate structures, the TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.
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The present disclosure relates to a device of three-dimensional integrated circuit (3DIC), and more particularly, to a substrate structure with a through-silicon via (TSV) and the stacked assembly of a plurality of the substrate structures.
TECHNICAL BACKGROUNDThe advantages of the three-dimensional-integrated-circuit (3DIC) technique, such as high performance, low power dissipation, low cost, compactness, integration of hetero-generous IC substrates, lead to a potential trend for developing the System on Chip (SoC). Wherein the through-silicon-via (TSV) technique plays a key role of being capable of overcoming the limitations by the IC fabrication process and the low dielectric-constant material, so that the interconnection among the stacked IC chips can be with lower cost and higher performance.
However, misalignment between the TSVs of the stacked IC substrates or conductor bumps between the stacked IC chips happened frequently in the assembly process of the 3DIC, which may lead to potential errors or distortions in the communication of electrical signals. Furthermore, the reliability of the interconnection or assembly of the TSVs is subject to the bumps, which tend to increase the resistance of TSV connection and, even more, to cause cracks or defects of opened circuit. Therefore, it is in need to develop a reliable structure of TSV substrates.
TECHNICAL SUMMARYAccording to one aspect of the present disclosure, a first embodiment provides a TSV substrate structure including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.
According to another aspect of the present disclosure, a second embodiment provides a stacked assembly comprising a plurality of substrate structures stacked on each other, each of the substrate structures including: a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.
Further scope of applicability of the present application will become more apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the disclosure, are given by way of illustration only, since various changes and modifications within the spirit and scope of the disclosure will become apparent to those skilled in the art from this detailed description.
The present disclosure will become more fully understood from the detailed description given herein below and the accompanying drawings which are given by way of illustration only, and thus are not limitative of the present disclosure and wherein:
For further understanding and recognizing the fulfilled functions and structural characteristics of the disclosure, several exemplary embodiments cooperating with detailed description are presented as the following. Hereinafter, for the description of the embodiments, in the case of describing as forming each layer (film), portions, patterns or structures “on” or “under” substrates, each layer (film), portions, or patterns, “on” or “under” includes all of “directly” or “indirectly” formed things. In addition, a standard about “on” or “under” each layer will be described based on the drawings. In the drawings, a thickness or size of each layer is shown roughly, exaggeratedly, or briefly for sake of convenience of description or for a definite description. In addition, a size of each element does not reflect entirely real size.
Please refer to
The substrate 110 has a top and a bottom surfaces, or in terms of the first surface 111 and second surface 112 in this embodiment. The substrate 110 includes at least one TSV 130, which communicates the first surface 111 with the second surface 112 through the substrate body. The TSV 130 itself has a column-shaped space to receive conductor or metal, so as to connect the two sides of the substrate 110 electrically or thermally. For sake of simplicity, only one TSV is depicted in the specification and drawings to illustrate the structure and fabrication of the embodiments; but is not limited thereby, which can be more than one TSV. Moreover, the TSV 130 or the conductor unit 120 has a column body with a circular cross-section; but is not limited thereby, which can be with a cross-section of rectangle, rhombus, polygon, or other shapes in accordance with the practical demand.
As shown in
The conductor unit 120, which completely fills the TSV 130 and has a conductor body 125 corresponding to the TSV 130, has a top and bottom terminals, or in terms of the first end 121 and second end 122, corresponding to the first and second surfaces 111/112 of the substrate, respectively. This embodiment is characterized partly by the solid and complete filling of the conductor body 125 in the TSV 130, so as to increase conductivity and reliability of the conductor unit 120. This embodiment is also characterized by an extensional part 123 formed on the side surface of the conductor body in proximity to the first or/and second ends of the conductor unit 120. As shown in
In order to facilitate alignment and assembly of the IC substrates with TSVs and to enhance the structural robustness of the assembly, the conductor unit 120 further comprises a recess 127 formed in the base surface of the conductor body 125 at the first end 121 and a protrusion 128 formed on the other base surface of the conductor body 125 at the second end 122, as the embodiment illustrated in
The formation of the protrusion on or the recess in the base surfaces of the two ends the conductor unit 120 may be in the other type. For example, a recess may be formed in the bottom surface of the conductor body while a protrusion formed on the top surface of the conductor body. Further, two protrusions may be formed respectively on both base surfaces of the conductor body as shown in
To construct a 3DIC device, IC substrates of various potential types of conductor units in the TSV in the first embodiment may be stacked on each other or on a carrier. In a second embodiment according this present disclosure, a stacked assembly comprises: a first TSV substrate structure formed of one of possible types of conductor units in the TSV according to the first embodiment, a second TSV substrate structure formed of one of possible types of conductor units in the TSV according to the first embodiment, wherein the second TSV substrate structure is stacked on the first TSV substrate structure. Preferably, the TSV in the first TSV substrate structure corresponds to the TSV in the second TSV substrate structure.
Please refer to
Based on the TSV substrate structures of the recesstop-protrusionbottom type, several more exemplary embodiments of various TSV substrate structures are provided below. Example 4 provides the stacked assembly of the TSV substrate structures as schematically shown in
Example 7 provides the stacked assembly of the TSV substrate structures as schematically shown in
Here is an exemplary embodiment of the fabrication process to fabricate the TSV substrate structure in the foregoing embodiments. Referring to
With respect to the above description then, it is to be realized that the optimum dimensional relationships for the parts of the disclosure, to include variations in size, materials, shape, form, function and manner of operation, assembly and use, are deemed readily apparent and obvious to one skilled in the art, and all equivalent relationships to those illustrated in the drawings and described in the specification are intended to be encompassed by the present disclosure.
Claims
1. A substrate structure comprising:
- a substrate comprising a first surface, a corresponding second surface, and a through-silicon via (TSV) communicating the first surface with the second surface through the substrate; and
- a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second surfaces of the substrate, respectively.
2. The substrate structure of claim 1, wherein the conductor unit further comprises a first extensional part formed on the side surface of the conductor body in proximity to the first end.
3. The substrate structure of claim 2, wherein the first extensional part surrounds the conductor body.
4. The substrate structure of claim 2, wherein the conductor unit further comprises a second extensional part formed on the side surface of the conductor body in proximity to the second end.
5. The substrate structure of claim 4, wherein the second extensional part surrounds the conductor body.
6. The substrate structure of claim 1, wherein the conductor unit further comprises:
- a first protrusion formed on the base surface of the conductor body at the first end.
7. The substrate structure of claim 6, wherein the conductor unit further comprises:
- a second protrusion formed on the base surface of the conductor body at the second end.
8. The substrate structure of claim 6, wherein the conductor unit further comprises:
- a recess formed in the base surface of the conductor body at the second end, wherein the recess is not smaller than the protrusion in area and is not higher than the protrusion in highness.
9. The substrate structure of claim 1, wherein the conductor unit further comprises:
- a first recess formed in the base surface of the conductor body at the first end.
10. The substrate structure of claim 9, wherein the conductor unit further comprises:
- a second recess formed in the base surface of the conductor body at the second end.
11. The substrate structure of claim 1, wherein the substrate is selected from the group consisting of a die, a chip, a wafer, an interposer, or the combinations thereof.
12. The substrate structure of claim 1, wherein the substrate further comprises:
- a first insulator layer formed on the side surface of the TSV.
13. The substrate structure of claim 12, wherein the first insulator layer further comprises:
- a first recessed portion formed on the base surface of the conductor body at the first end, wherein the area of the first recessed portion is not larger than the cross-sectional area of the conductor body.
14. The substrate structure of claim 13, wherein the first insulator layer further comprises:
- a second recessed portion formed on the base surface of the conductor body at the second end, wherein the area of the second recessed portion is not larger than the cross-sectional area of the conductor body.
15. The substrate structure of claim 1, wherein the substrate further comprises:
- a second insulator layer formed on the first surface of the substrate.
16. The substrate structure of claim 15, wherein the substrate further comprises:
- a third insulator layer formed on the second surface of the substrate.
17. A stacked assembly comprising a plurality of substrate structures stacked on each other, each of the substrate structures comprising:
- a substrate comprising a first surface, a corresponding second surface, and a TSV communicating the first surface with the second surface through the substrate; and
- a conductor unit completely filling the TSV, the conductor unit comprising a conductor body which has a first and a second ends corresponding to the first and second sides of the substrate, respectively.
18. The stacked assembly of claim 17, wherein the conductor unit further comprises a first extensional part formed on the side surface of the conductor body in proximity to the first end.
19. The stacked assembly of claim 18, wherein the first extensional part surrounds the conductor body.
20. The stacked assembly of claim 18, wherein the conductor unit further comprises a second extensional part formed on the side surface of the conductor body in proximity to the second end.
21. The stacked assembly of claim 20, wherein the second extensional part surrounds the conductor body.
22. The stacked assembly of claim 17, wherein the conductor unit further comprises:
- a first protrusion formed on the base surface of the conductor body at the first end.
23. The stacked assembly of claim 22, wherein the conductor unit further comprises:
- a second protrusion formed on the base surface of the conductor body at the second end.
24. The stacked assembly of claim 22, wherein the conductor unit further comprises:
- a recess formed in the base surface of the conductor body at the second end, wherein the recess is not smaller than the protrusion in area and is not higher than the protrusion in highness.
25. The stacked assembly of claim 17, wherein the conductor unit further comprises:
- a first recess formed in the base surface of the conductor body at the first end.
26. The stacked assembly of claim 25, wherein the conductor unit further comprises:
- a second recess formed in the base surface of the conductor body at the second end.
27. The stacked assembly of claim 17, wherein the substrate is selected from the group consisting of a die, a chip, a wafer, an interposer, or the combinations thereof.
28. The stacked assembly of claim 17, wherein the substrate further comprises:
- a first insulator layer formed on the side surface of the TSV.
29. The stacked assembly of claim 28, wherein the first insulator layer further comprises:
- a first recessed portion formed on the base surface of the conductor body at the first end, wherein the area of the first recessed portion is not larger than the cross-sectional area of the conductor body.
30. The stacked assembly of claim 29, wherein the first insulator layer further comprises:
- a second recessed portion formed on the base surface of the conductor body at the second end, wherein the area of the second recessed portion is not larger than the cross-sectional area of the conductor body.
31. The stacked assembly of claim 17, wherein the substrate further comprises:
- a second insulator layer formed on the first surface of the substrate.
32. The stacked assembly of claim 31, wherein the substrate further comprises:
- a third insulator layer formed on the second surface of the substrate.
33. The stacked assembly of claim 17, wherein the TSV of each of the substrate structures corresponds to each other.
Type: Application
Filed: Dec 15, 2010
Publication Date: May 31, 2012
Applicant: Industrial Technology Research Institute (Hsinchu)
Inventors: Chung-Chih Wang (Taipei County), Pei-Jer Tzeng (Hsinchu City), Cha-Hsin Lin (Tainan City), Tzu-Kun Ku (Hsinchu City)
Application Number: 12/969,250
International Classification: H01L 29/41 (20060101);