Patents by Inventor Chung-Ching Chen

Chung-Ching Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080266305
    Abstract: A display controller for displaying multiple windows and associated memory access method are provided. The display controller receives a first video source and a second video source for displaying multiple windows, and includes a line buffer, a deinterlacer, a scaler, and a memory interface unit. The line buffer buffers pixel data of a non-overlapped area of a main image associated with the first video source, and pixel data of a sub image associated with the second video source. The deinterlacer is coupled to the line buffer for selectively deinterlacing data in the line buffer. The scaler is coupled to the deinterlacer for selectively scaling data outputted from the deinterlacer. The memory interface unit is coupled to the line buffer for accessing an external memory.
    Type: Application
    Filed: April 30, 2008
    Publication date: October 30, 2008
    Inventors: Kun-Nan Cheng, Yuan-Chuan Hsu, Hung-Yi Lin, Chung-Ching Chen
  • Patent number: 6321301
    Abstract: A cache device and a method of using the same for data accesses according to the invention. Particularly, the cache device has a prefetch queue comparing circuit which comprises a cache hit/miss judging circuit, an address queue register and a prefetch condition judging circuit. The cache hit/miss judging circuit is used to judge whether a currently-read address coming from a bus is of cache hit or cache miss, wherein the address consists of an index address and a tag address. The address queue register directly stores the index address of the currently-read address plus a corresponding first one-bit flag signal if the cache hit/miss judging circuit judges that the currently-read address is of cache hit. The prefetch condition judging circuit is used to judge whether the index address of the currently-read address is the same as any index addresses already stored in the address queue register if the cache hit/miss judging circuit judges that the currently-read address is of cache miss.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: November 20, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Fen Lin, Chung-Ching Chen, Ming-Tsan Kao
  • Patent number: 6073881
    Abstract: A lift apparatus using the method of blowing air over the upper surface of the apparatus to generate lift by virtue of the balance of outside pressures against the body of the apparatus. It does this by using the expansion characteristic of supersonic gas stream in a divergent space to create low pressure above the upper surface and to maintain the attachment of the stream to the surface. For power source, it uses the hybrid internal combustion engine of a co-pending invention in its jet operation mode to jet the air. And it solves the working substance supply problem by recycling.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: June 13, 2000
    Inventor: Chung-ching Chen